Commit | Line | Data |
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181d6902 ID |
1 | /* |
2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project | |
3 | <http://rt2x00.serialmonkey.com> | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 2 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program; if not, write to the | |
17 | Free Software Foundation, Inc., | |
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
19 | */ | |
20 | ||
21 | /* | |
22 | Module: rt2x00lib | |
23 | Abstract: rt2x00 queue specific routines. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | ||
29 | #include "rt2x00.h" | |
30 | #include "rt2x00lib.h" | |
31 | ||
239c249d GW |
32 | struct sk_buff *rt2x00queue_alloc_rxskb(struct data_queue *queue) |
33 | { | |
34 | struct sk_buff *skb; | |
35 | unsigned int frame_size; | |
36 | unsigned int reserved_size; | |
37 | ||
38 | /* | |
39 | * The frame size includes descriptor size, because the | |
40 | * hardware directly receive the frame into the skbuffer. | |
41 | */ | |
42 | frame_size = queue->data_size + queue->desc_size; | |
43 | ||
44 | /* | |
45 | * For the allocation we should keep a few things in mind: | |
46 | * 1) 4byte alignment of 802.11 payload | |
47 | * | |
48 | * For (1) we need at most 4 bytes to guarentee the correct | |
49 | * alignment. We are going to optimize the fact that the chance | |
50 | * that the 802.11 header_size % 4 == 2 is much bigger then | |
51 | * anything else. However since we need to move the frame up | |
52 | * to 3 bytes to the front, which means we need to preallocate | |
53 | * 6 bytes. | |
54 | */ | |
55 | reserved_size = 6; | |
56 | ||
57 | /* | |
58 | * Allocate skbuffer. | |
59 | */ | |
60 | skb = dev_alloc_skb(frame_size + reserved_size); | |
61 | if (!skb) | |
62 | return NULL; | |
63 | ||
64 | skb_reserve(skb, reserved_size); | |
65 | skb_put(skb, frame_size); | |
66 | ||
67 | return skb; | |
68 | } | |
69 | EXPORT_SYMBOL_GPL(rt2x00queue_alloc_rxskb); | |
70 | ||
7050ec82 | 71 | void rt2x00queue_create_tx_descriptor(struct queue_entry *entry, |
e039fa4a | 72 | struct txentry_desc *txdesc) |
7050ec82 | 73 | { |
2e92e6f2 | 74 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
e039fa4a | 75 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); |
7050ec82 | 76 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data; |
2e92e6f2 | 77 | struct ieee80211_rate *rate = |
e039fa4a | 78 | ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); |
7050ec82 ID |
79 | const struct rt2x00_rate *hwrate; |
80 | unsigned int data_length; | |
81 | unsigned int duration; | |
82 | unsigned int residual; | |
83 | u16 frame_control; | |
84 | ||
85 | memset(txdesc, 0, sizeof(*txdesc)); | |
86 | ||
87 | /* | |
88 | * Initialize information from queue | |
89 | */ | |
90 | txdesc->queue = entry->queue->qid; | |
91 | txdesc->cw_min = entry->queue->cw_min; | |
92 | txdesc->cw_max = entry->queue->cw_max; | |
93 | txdesc->aifs = entry->queue->aifs; | |
94 | ||
95 | /* Data length should be extended with 4 bytes for CRC */ | |
96 | data_length = entry->skb->len + 4; | |
97 | ||
98 | /* | |
99 | * Read required fields from ieee80211 header. | |
100 | */ | |
101 | frame_control = le16_to_cpu(hdr->frame_control); | |
102 | ||
103 | /* | |
104 | * Check whether this frame is to be acked. | |
105 | */ | |
e039fa4a | 106 | if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) |
7050ec82 ID |
107 | __set_bit(ENTRY_TXD_ACK, &txdesc->flags); |
108 | ||
109 | /* | |
110 | * Check if this is a RTS/CTS frame | |
111 | */ | |
112 | if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) { | |
113 | __set_bit(ENTRY_TXD_BURST, &txdesc->flags); | |
e039fa4a | 114 | if (is_rts_frame(frame_control)) |
7050ec82 | 115 | __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags); |
e039fa4a | 116 | else |
7050ec82 | 117 | __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags); |
e039fa4a | 118 | if (tx_info->control.rts_cts_rate_idx >= 0) |
2e92e6f2 | 119 | rate = |
e039fa4a | 120 | ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info); |
7050ec82 ID |
121 | } |
122 | ||
123 | /* | |
124 | * Determine retry information. | |
125 | */ | |
e039fa4a JB |
126 | txdesc->retry_limit = tx_info->control.retry_limit; |
127 | if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT) | |
7050ec82 ID |
128 | __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags); |
129 | ||
130 | /* | |
131 | * Check if more fragments are pending | |
132 | */ | |
8b7b1e05 | 133 | if (ieee80211_has_morefrags(hdr->frame_control)) { |
7050ec82 ID |
134 | __set_bit(ENTRY_TXD_BURST, &txdesc->flags); |
135 | __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags); | |
136 | } | |
137 | ||
138 | /* | |
139 | * Beacons and probe responses require the tsf timestamp | |
140 | * to be inserted into the frame. | |
141 | */ | |
142 | if (txdesc->queue == QID_BEACON || is_probe_resp(frame_control)) | |
143 | __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags); | |
144 | ||
145 | /* | |
146 | * Determine with what IFS priority this frame should be send. | |
147 | * Set ifs to IFS_SIFS when the this is not the first fragment, | |
148 | * or this fragment came after RTS/CTS. | |
149 | */ | |
150 | if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) { | |
151 | txdesc->ifs = IFS_SIFS; | |
e039fa4a | 152 | } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) { |
7050ec82 ID |
153 | __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags); |
154 | txdesc->ifs = IFS_BACKOFF; | |
155 | } else { | |
156 | txdesc->ifs = IFS_SIFS; | |
157 | } | |
158 | ||
159 | /* | |
160 | * PLCP setup | |
161 | * Length calculation depends on OFDM/CCK rate. | |
162 | */ | |
163 | hwrate = rt2x00_get_rate(rate->hw_value); | |
164 | txdesc->signal = hwrate->plcp; | |
165 | txdesc->service = 0x04; | |
166 | ||
167 | if (hwrate->flags & DEV_RATE_OFDM) { | |
168 | __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags); | |
169 | ||
170 | txdesc->length_high = (data_length >> 6) & 0x3f; | |
171 | txdesc->length_low = data_length & 0x3f; | |
172 | } else { | |
173 | /* | |
174 | * Convert length to microseconds. | |
175 | */ | |
176 | residual = get_duration_res(data_length, hwrate->bitrate); | |
177 | duration = get_duration(data_length, hwrate->bitrate); | |
178 | ||
179 | if (residual != 0) { | |
180 | duration++; | |
181 | ||
182 | /* | |
183 | * Check if we need to set the Length Extension | |
184 | */ | |
185 | if (hwrate->bitrate == 110 && residual <= 30) | |
186 | txdesc->service |= 0x80; | |
187 | } | |
188 | ||
189 | txdesc->length_high = (duration >> 8) & 0xff; | |
190 | txdesc->length_low = duration & 0xff; | |
191 | ||
192 | /* | |
193 | * When preamble is enabled we should set the | |
194 | * preamble bit for the signal. | |
195 | */ | |
196 | if (rt2x00_get_rate_preamble(rate->hw_value)) | |
197 | txdesc->signal |= 0x08; | |
198 | } | |
199 | } | |
200 | EXPORT_SYMBOL_GPL(rt2x00queue_create_tx_descriptor); | |
201 | ||
202 | void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, | |
203 | struct txentry_desc *txdesc) | |
204 | { | |
b869767b ID |
205 | struct data_queue *queue = entry->queue; |
206 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; | |
7050ec82 ID |
207 | |
208 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc); | |
209 | ||
210 | /* | |
211 | * All processing on the frame has been completed, this means | |
212 | * it is now ready to be dumped to userspace through debugfs. | |
213 | */ | |
214 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb); | |
215 | ||
216 | /* | |
b869767b ID |
217 | * Check if we need to kick the queue, there are however a few rules |
218 | * 1) Don't kick beacon queue | |
219 | * 2) Don't kick unless this is the last in frame in a burst. | |
220 | * When the burst flag is set, this frame is always followed | |
221 | * by another frame which in some way are related to eachother. | |
222 | * This is true for fragments, RTS or CTS-to-self frames. | |
223 | * 3) Rule 2 can be broken when the available entries | |
224 | * in the queue are less then a certain threshold. | |
7050ec82 | 225 | */ |
b869767b ID |
226 | if (entry->queue->qid == QID_BEACON) |
227 | return; | |
228 | ||
229 | if (rt2x00queue_threshold(queue) || | |
230 | !test_bit(ENTRY_TXD_BURST, &txdesc->flags)) | |
231 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid); | |
7050ec82 ID |
232 | } |
233 | EXPORT_SYMBOL_GPL(rt2x00queue_write_tx_descriptor); | |
234 | ||
6db3786a ID |
235 | int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) |
236 | { | |
237 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); | |
238 | struct txentry_desc txdesc; | |
239 | ||
240 | if (unlikely(rt2x00queue_full(queue))) | |
241 | return -EINVAL; | |
242 | ||
243 | if (__test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) { | |
244 | ERROR(queue->rt2x00dev, | |
245 | "Arrived at non-free entry in the non-full queue %d.\n" | |
246 | "Please file bug report to %s.\n", | |
247 | queue->qid, DRV_PROJECT); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | /* | |
252 | * Copy all TX descriptor information into txdesc, | |
253 | * after that we are free to use the skb->cb array | |
254 | * for our information. | |
255 | */ | |
256 | entry->skb = skb; | |
257 | rt2x00queue_create_tx_descriptor(entry, &txdesc); | |
258 | ||
259 | if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) { | |
260 | __clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | |
261 | return -EIO; | |
262 | } | |
263 | ||
264 | __set_bit(ENTRY_DATA_PENDING, &entry->flags); | |
265 | ||
266 | rt2x00queue_index_inc(queue, Q_INDEX); | |
267 | rt2x00queue_write_tx_descriptor(entry, &txdesc); | |
268 | ||
269 | return 0; | |
270 | } | |
271 | ||
181d6902 | 272 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
e58c6aca | 273 | const enum data_queue_qid queue) |
181d6902 ID |
274 | { |
275 | int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | |
276 | ||
61448f88 | 277 | if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx) |
181d6902 ID |
278 | return &rt2x00dev->tx[queue]; |
279 | ||
280 | if (!rt2x00dev->bcn) | |
281 | return NULL; | |
282 | ||
e58c6aca | 283 | if (queue == QID_BEACON) |
181d6902 | 284 | return &rt2x00dev->bcn[0]; |
e58c6aca | 285 | else if (queue == QID_ATIM && atim) |
181d6902 ID |
286 | return &rt2x00dev->bcn[1]; |
287 | ||
288 | return NULL; | |
289 | } | |
290 | EXPORT_SYMBOL_GPL(rt2x00queue_get_queue); | |
291 | ||
292 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | |
293 | enum queue_index index) | |
294 | { | |
295 | struct queue_entry *entry; | |
5f46c4d0 | 296 | unsigned long irqflags; |
181d6902 ID |
297 | |
298 | if (unlikely(index >= Q_INDEX_MAX)) { | |
299 | ERROR(queue->rt2x00dev, | |
300 | "Entry requested from invalid index type (%d)\n", index); | |
301 | return NULL; | |
302 | } | |
303 | ||
5f46c4d0 | 304 | spin_lock_irqsave(&queue->lock, irqflags); |
181d6902 ID |
305 | |
306 | entry = &queue->entries[queue->index[index]]; | |
307 | ||
5f46c4d0 | 308 | spin_unlock_irqrestore(&queue->lock, irqflags); |
181d6902 ID |
309 | |
310 | return entry; | |
311 | } | |
312 | EXPORT_SYMBOL_GPL(rt2x00queue_get_entry); | |
313 | ||
314 | void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index) | |
315 | { | |
5f46c4d0 ID |
316 | unsigned long irqflags; |
317 | ||
181d6902 ID |
318 | if (unlikely(index >= Q_INDEX_MAX)) { |
319 | ERROR(queue->rt2x00dev, | |
320 | "Index change on invalid index type (%d)\n", index); | |
321 | return; | |
322 | } | |
323 | ||
5f46c4d0 | 324 | spin_lock_irqsave(&queue->lock, irqflags); |
181d6902 ID |
325 | |
326 | queue->index[index]++; | |
327 | if (queue->index[index] >= queue->limit) | |
328 | queue->index[index] = 0; | |
329 | ||
10b6b801 ID |
330 | if (index == Q_INDEX) { |
331 | queue->length++; | |
332 | } else if (index == Q_INDEX_DONE) { | |
333 | queue->length--; | |
334 | queue->count ++; | |
335 | } | |
181d6902 | 336 | |
5f46c4d0 | 337 | spin_unlock_irqrestore(&queue->lock, irqflags); |
181d6902 ID |
338 | } |
339 | EXPORT_SYMBOL_GPL(rt2x00queue_index_inc); | |
340 | ||
341 | static void rt2x00queue_reset(struct data_queue *queue) | |
342 | { | |
5f46c4d0 ID |
343 | unsigned long irqflags; |
344 | ||
345 | spin_lock_irqsave(&queue->lock, irqflags); | |
181d6902 ID |
346 | |
347 | queue->count = 0; | |
348 | queue->length = 0; | |
349 | memset(queue->index, 0, sizeof(queue->index)); | |
350 | ||
5f46c4d0 | 351 | spin_unlock_irqrestore(&queue->lock, irqflags); |
181d6902 ID |
352 | } |
353 | ||
354 | void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev) | |
355 | { | |
356 | struct data_queue *queue = rt2x00dev->rx; | |
357 | unsigned int i; | |
358 | ||
359 | rt2x00queue_reset(queue); | |
360 | ||
361 | if (!rt2x00dev->ops->lib->init_rxentry) | |
362 | return; | |
363 | ||
364 | for (i = 0; i < queue->limit; i++) | |
365 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, | |
366 | &queue->entries[i]); | |
367 | } | |
368 | ||
369 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev) | |
370 | { | |
371 | struct data_queue *queue; | |
372 | unsigned int i; | |
373 | ||
374 | txall_queue_for_each(rt2x00dev, queue) { | |
375 | rt2x00queue_reset(queue); | |
376 | ||
377 | if (!rt2x00dev->ops->lib->init_txentry) | |
378 | continue; | |
379 | ||
380 | for (i = 0; i < queue->limit; i++) | |
381 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, | |
382 | &queue->entries[i]); | |
383 | } | |
384 | } | |
385 | ||
386 | static int rt2x00queue_alloc_entries(struct data_queue *queue, | |
387 | const struct data_queue_desc *qdesc) | |
388 | { | |
389 | struct queue_entry *entries; | |
390 | unsigned int entry_size; | |
391 | unsigned int i; | |
392 | ||
393 | rt2x00queue_reset(queue); | |
394 | ||
395 | queue->limit = qdesc->entry_num; | |
b869767b | 396 | queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10); |
181d6902 ID |
397 | queue->data_size = qdesc->data_size; |
398 | queue->desc_size = qdesc->desc_size; | |
399 | ||
400 | /* | |
401 | * Allocate all queue entries. | |
402 | */ | |
403 | entry_size = sizeof(*entries) + qdesc->priv_size; | |
404 | entries = kzalloc(queue->limit * entry_size, GFP_KERNEL); | |
405 | if (!entries) | |
406 | return -ENOMEM; | |
407 | ||
408 | #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \ | |
231be4e9 AB |
409 | ( ((char *)(__base)) + ((__limit) * (__esize)) + \ |
410 | ((__index) * (__psize)) ) | |
181d6902 ID |
411 | |
412 | for (i = 0; i < queue->limit; i++) { | |
413 | entries[i].flags = 0; | |
414 | entries[i].queue = queue; | |
415 | entries[i].skb = NULL; | |
416 | entries[i].entry_idx = i; | |
417 | entries[i].priv_data = | |
418 | QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit, | |
419 | sizeof(*entries), qdesc->priv_size); | |
420 | } | |
421 | ||
422 | #undef QUEUE_ENTRY_PRIV_OFFSET | |
423 | ||
424 | queue->entries = entries; | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
429 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) | |
430 | { | |
431 | struct data_queue *queue; | |
432 | int status; | |
433 | ||
434 | ||
435 | status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx); | |
436 | if (status) | |
437 | goto exit; | |
438 | ||
439 | tx_queue_for_each(rt2x00dev, queue) { | |
440 | status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx); | |
441 | if (status) | |
442 | goto exit; | |
443 | } | |
444 | ||
445 | status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn); | |
446 | if (status) | |
447 | goto exit; | |
448 | ||
449 | if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) | |
450 | return 0; | |
451 | ||
452 | status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1], | |
453 | rt2x00dev->ops->atim); | |
454 | if (status) | |
455 | goto exit; | |
456 | ||
457 | return 0; | |
458 | ||
459 | exit: | |
460 | ERROR(rt2x00dev, "Queue entries allocation failed.\n"); | |
461 | ||
462 | rt2x00queue_uninitialize(rt2x00dev); | |
463 | ||
464 | return status; | |
465 | } | |
466 | ||
467 | void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev) | |
468 | { | |
469 | struct data_queue *queue; | |
470 | ||
471 | queue_for_each(rt2x00dev, queue) { | |
472 | kfree(queue->entries); | |
473 | queue->entries = NULL; | |
474 | } | |
475 | } | |
476 | ||
8f539276 ID |
477 | static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev, |
478 | struct data_queue *queue, enum data_queue_qid qid) | |
479 | { | |
480 | spin_lock_init(&queue->lock); | |
481 | ||
482 | queue->rt2x00dev = rt2x00dev; | |
483 | queue->qid = qid; | |
484 | queue->aifs = 2; | |
485 | queue->cw_min = 5; | |
486 | queue->cw_max = 10; | |
487 | } | |
488 | ||
181d6902 ID |
489 | int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) |
490 | { | |
491 | struct data_queue *queue; | |
492 | enum data_queue_qid qid; | |
493 | unsigned int req_atim = | |
494 | !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | |
495 | ||
496 | /* | |
497 | * We need the following queues: | |
498 | * RX: 1 | |
61448f88 | 499 | * TX: ops->tx_queues |
181d6902 ID |
500 | * Beacon: 1 |
501 | * Atim: 1 (if required) | |
502 | */ | |
61448f88 | 503 | rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim; |
181d6902 ID |
504 | |
505 | queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL); | |
506 | if (!queue) { | |
507 | ERROR(rt2x00dev, "Queue allocation failed.\n"); | |
508 | return -ENOMEM; | |
509 | } | |
510 | ||
511 | /* | |
512 | * Initialize pointers | |
513 | */ | |
514 | rt2x00dev->rx = queue; | |
515 | rt2x00dev->tx = &queue[1]; | |
61448f88 | 516 | rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues]; |
181d6902 ID |
517 | |
518 | /* | |
519 | * Initialize queue parameters. | |
520 | * RX: qid = QID_RX | |
521 | * TX: qid = QID_AC_BE + index | |
522 | * TX: cw_min: 2^5 = 32. | |
523 | * TX: cw_max: 2^10 = 1024. | |
565a019a ID |
524 | * BCN: qid = QID_BEACON |
525 | * ATIM: qid = QID_ATIM | |
181d6902 | 526 | */ |
8f539276 | 527 | rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX); |
181d6902 | 528 | |
8f539276 ID |
529 | qid = QID_AC_BE; |
530 | tx_queue_for_each(rt2x00dev, queue) | |
531 | rt2x00queue_init(rt2x00dev, queue, qid++); | |
181d6902 | 532 | |
565a019a | 533 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON); |
181d6902 | 534 | if (req_atim) |
565a019a | 535 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM); |
181d6902 ID |
536 | |
537 | return 0; | |
538 | } | |
539 | ||
540 | void rt2x00queue_free(struct rt2x00_dev *rt2x00dev) | |
541 | { | |
542 | kfree(rt2x00dev->rx); | |
543 | rt2x00dev->rx = NULL; | |
544 | rt2x00dev->tx = NULL; | |
545 | rt2x00dev->bcn = NULL; | |
546 | } |