[deliverable/linux.git] / drivers / net / wireless / rtl8187.h

#ifndef RTL8187_H
#define RTL8187_H

#include "rtl818x.h"

#define RTL8187_EEPROM_TXPWR_BASE	0x05
#define RTL8187_EEPROM_MAC_ADDR		0x07
#define RTL8187_EEPROM_TXPWR_CHAN_1	0x16	/* 3 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_6	0x1B	/* 2 channels */
#define RTL8187_EEPROM_TXPWR_CHAN_4	0x3D	/* 2 channels */

#define RTL8187_REQT_READ	0xC0
#define RTL8187_REQT_WRITE	0x40
#define RTL8187_REQ_GET_REG	0x05
#define RTL8187_REQ_SET_REG	0x05

#define RTL8187_MAX_RX		0x9C4

struct rtl8187_rx_info {
	struct urb *urb;
	struct ieee80211_hw *dev;
};

struct rtl8187_rx_hdr {
	__le16 len;
	__le16 rate;
	u8 noise;
	u8 signal;
	u8 agc;
	u8 reserved;
	__le64 mac_time;
} __attribute__((packed));

struct rtl8187_tx_info {
	struct ieee80211_tx_control *control;
	struct urb *urb;
	struct ieee80211_hw *dev;
};

struct rtl8187_tx_hdr {
	__le32 flags;
#define RTL8187_TX_FLAG_NO_ENCRYPT	(1 << 15)
#define RTL8187_TX_FLAG_MORE_FRAG	(1 << 17)
#define RTL8187_TX_FLAG_CTS		(1 << 18)
#define RTL8187_TX_FLAG_RTS		(1 << 23)
	__le16 rts_duration;
	__le16 len;
	__le32 retry;
} __attribute__((packed));

struct rtl8187_priv {
	/* common between rtl818x drivers */
	struct rtl818x_csr *map;
	void (*rf_init)(struct ieee80211_hw *);
	int mode;

	/* rtl8187 specific */
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];
	struct ieee80211_hw_mode modes[2];
	struct usb_device *udev;
	u8 *hwaddr;
	u16 txpwr_base;
	u8 asic_rev;
	struct sk_buff_head rx_queue;
};

void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);

static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
{
	u8 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);

	return val;
}

static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
{
	__le16 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);

	return le16_to_cpu(val);
}

static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
{
	__le32 val;

	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
			RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);

	return le32_to_cpu(val);
}

static inline void rtl818x_iowrite8(struct rtl8187_priv *priv,
				    u8 *addr, u8 val)
{
	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
}

static inline void rtl818x_iowrite16(struct rtl8187_priv *priv,
				     __le16 *addr, u16 val)
{
	__le16 buf = cpu_to_le16(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
}

static inline void rtl818x_iowrite32(struct rtl8187_priv *priv,
				     __le32 *addr, u32 val)
{
	__le32 buf = cpu_to_le32(val);

	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
			RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
			(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
}

#endif /* RTL8187_H */
Commit	Line	Data
605bebe2 MW	1	#ifndef RTL8187_H
	2	#define RTL8187_H
	3
	4	#include "rtl818x.h"
	5
	6	#define RTL8187_EEPROM_TXPWR_BASE 0x05
	7	#define RTL8187_EEPROM_MAC_ADDR 0x07
	8	#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
	9	#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
	10	#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
	11
	12	#define RTL8187_REQT_READ 0xC0
	13	#define RTL8187_REQT_WRITE 0x40
	14	#define RTL8187_REQ_GET_REG 0x05
	15	#define RTL8187_REQ_SET_REG 0x05
	16
	17	#define RTL8187_MAX_RX 0x9C4
	18
	19	struct rtl8187_rx_info {
	20	struct urb *urb;
	21	struct ieee80211_hw *dev;
	22	};
	23
	24	struct rtl8187_rx_hdr {
	25	__le16 len;
	26	__le16 rate;
	27	u8 noise;
	28	u8 signal;
	29	u8 agc;
	30	u8 reserved;
	31	__le64 mac_time;
	32	} __attribute__((packed));
	33
	34	struct rtl8187_tx_info {
	35	struct ieee80211_tx_control *control;
	36	struct urb *urb;
	37	struct ieee80211_hw *dev;
	38	};
	39
	40	struct rtl8187_tx_hdr {
	41	__le32 flags;
	42	#define RTL8187_TX_FLAG_NO_ENCRYPT (1 << 15)
	43	#define RTL8187_TX_FLAG_MORE_FRAG (1 << 17)
	44	#define RTL8187_TX_FLAG_CTS (1 << 18)
	45	#define RTL8187_TX_FLAG_RTS (1 << 23)
	46	__le16 rts_duration;
	47	__le16 len;
	48	__le32 retry;
	49	} __attribute__((packed));
	50
	51	struct rtl8187_priv {
	52	/* common between rtl818x drivers */
	53	struct rtl818x_csr *map;
	54	void (rf_init)(struct ieee80211_hw );
	55	int mode;
	56
	57	/* rtl8187 specific */
	58	struct ieee80211_channel channels[14];
	59	struct ieee80211_rate rates[12];
	60	struct ieee80211_hw_mode modes[2];
	61	struct usb_device *udev;
	62	u8 *hwaddr;
	63	u16 txpwr_base;
	64	u8 asic_rev;
65	struct sk_buff_head rx_queue;
66	};
67
68	void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
69
70	static inline u8 rtl818x_ioread8(struct rtl8187_priv priv, u8 addr)
71	{
72	u8 val;
73
74	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
75	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
76	(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
77
78	return val;
79	}
80
81	static inline u16 rtl818x_ioread16(struct rtl8187_priv priv, __le16 addr)
82	{
83	__le16 val;
84
85	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
86	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
87	(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
88
89	return le16_to_cpu(val);
90	}
91
92	static inline u32 rtl818x_ioread32(struct rtl8187_priv priv, __le32 addr)
93	{
94	__le32 val;
95
96	usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
97	RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
98	(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
99
100	return le32_to_cpu(val);
101	}
102
103	static inline void rtl818x_iowrite8(struct rtl8187_priv *priv,
104	u8 *addr, u8 val)
105	{
106	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
107	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
108	(unsigned long)addr, 0, &val, sizeof(val), HZ / 2);
109	}
110
111	static inline void rtl818x_iowrite16(struct rtl8187_priv *priv,
112	__le16 *addr, u16 val)
113	{
114	__le16 buf = cpu_to_le16(val);
115
116	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
117	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
118	(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
119	}
120
121	static inline void rtl818x_iowrite32(struct rtl8187_priv *priv,
122	__le32 *addr, u32 val)
123	{
124	__le32 buf = cpu_to_le32(val);
125
126	usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
127	RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
128	(unsigned long)addr, 0, &buf, sizeof(buf), HZ / 2);
129	}
130
131	#endif /* RTL8187_H */