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[PATCH] ipw2100: send WEXT scan events
[deliverable/linux.git] / drivers / net / wireless / rtl8187_dev.c
CommitLineData
605bebe2
MW		 1/*
2 * Linux device driver for RTL8187
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
0aec00ae
JL		 10 * Magic delays and register offsets below are taken from the original
11 * r8187 driver sources. Thanks to Realtek for their support!
605bebe2
MW		 12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18#include <linux/init.h>
19#include <linux/usb.h>
20#include <linux/delay.h>
21#include <linux/etherdevice.h>
22#include <linux/eeprom_93cx6.h>
23#include <net/mac80211.h>
24
25#include "rtl8187.h"
26#include "rtl8187_rtl8225.h"
27
28MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
29MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
30MODULE_DESCRIPTION("RTL8187 USB wireless driver");
31MODULE_LICENSE("GPL");
32
33static struct usb_device_id rtl8187_table[] __devinitdata = {
34 /* Realtek */
35 {USB_DEVICE(0x0bda, 0x8187)},
36 /* Netgear */
37 {USB_DEVICE(0x0846, 0x6100)},
38 {USB_DEVICE(0x0846, 0x6a00)},
c3cf60a9
MW		 39 /* HP */
40 {USB_DEVICE(0x03f0, 0xca02)},
605bebe2
MW		 41 {}
42};
43
44MODULE_DEVICE_TABLE(usb, rtl8187_table);
45
4150c572
JB		 46static void rtl8187_iowrite_async_cb(struct urb *urb)
47{
48 kfree(urb->context);
49 usb_free_urb(urb);
50}
51
52static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
53 void *data, u16 len)
54{
55 struct usb_ctrlrequest *dr;
56 struct urb *urb;
57 struct rtl8187_async_write_data {
58 u8 data[4];
59 struct usb_ctrlrequest dr;
60 } *buf;
61
62 buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
63 if (!buf)
64 return;
65
66 urb = usb_alloc_urb(0, GFP_ATOMIC);
67 if (!urb) {
68 kfree(buf);
69 return;
70 }
71
72 dr = &buf->dr;
73
74 dr->bRequestType = RTL8187_REQT_WRITE;
75 dr->bRequest = RTL8187_REQ_SET_REG;
76 dr->wValue = addr;
77 dr->wIndex = 0;
78 dr->wLength = cpu_to_le16(len);
79
80 memcpy(buf, data, len);
81
82 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
83 (unsigned char *)dr, buf, len,
84 rtl8187_iowrite_async_cb, buf);
85 usb_submit_urb(urb, GFP_ATOMIC);
86}
87
88static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
89 __le32 *addr, u32 val)
90{
91 __le32 buf = cpu_to_le32(val);
92
93 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
94 &buf, sizeof(buf));
95}
96
605bebe2
MW		 97void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
98{
99 struct rtl8187_priv *priv = dev->priv;
100
101 data <<= 8;
102 data |= addr | 0x80;
103
104 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
105 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
106 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
107 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
108
109 msleep(1);
110}
111
112static void rtl8187_tx_cb(struct urb *urb)
113{
114 struct ieee80211_tx_status status = { {0} };
115 struct sk_buff *skb = (struct sk_buff *)urb->context;
116 struct rtl8187_tx_info *info = (struct rtl8187_tx_info *)skb->cb;
117
118 usb_free_urb(info->urb);
119 if (info->control)
120 memcpy(&status.control, info->control, sizeof(status.control));
121 kfree(info->control);
122 skb_pull(skb, sizeof(struct rtl8187_tx_hdr));
123 status.flags |= IEEE80211_TX_STATUS_ACK;
124 ieee80211_tx_status_irqsafe(info->dev, skb, &status);
125}
126
127static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
128 struct ieee80211_tx_control *control)
129{
130 struct rtl8187_priv *priv = dev->priv;
131 struct rtl8187_tx_hdr *hdr;
132 struct rtl8187_tx_info *info;
133 struct urb *urb;
134 u32 tmp;
135
136 urb = usb_alloc_urb(0, GFP_ATOMIC);
137 if (!urb) {
138 kfree_skb(skb);
139 return 0;
140 }
141
142 hdr = (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
143 tmp = skb->len - sizeof(*hdr);
144 tmp |= RTL8187_TX_FLAG_NO_ENCRYPT;
145 tmp |= control->rts_cts_rate << 19;
146 tmp |= control->tx_rate << 24;
147 if (ieee80211_get_morefrag((struct ieee80211_hdr *)skb))
148 tmp |= RTL8187_TX_FLAG_MORE_FRAG;
149 if (control->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
150 tmp |= RTL8187_TX_FLAG_RTS;
151 hdr->rts_duration =
7e9ed188 152 ieee80211_rts_duration(dev, priv->if_id, skb->len, control);
605bebe2
MW		 153 }
154 if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT)
155 tmp |= RTL8187_TX_FLAG_CTS;
156 hdr->flags = cpu_to_le32(tmp);
157 hdr->len = 0;
158 tmp = control->retry_limit << 8;
159 hdr->retry = cpu_to_le32(tmp);
160
161 info = (struct rtl8187_tx_info *)skb->cb;
162 info->control = kmemdup(control, sizeof(*control), GFP_ATOMIC);
163 info->urb = urb;
164 info->dev = dev;
165 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, 2),
166 hdr, skb->len, rtl8187_tx_cb, skb);
167 usb_submit_urb(urb, GFP_ATOMIC);
168
169 return 0;
170}
171
172static void rtl8187_rx_cb(struct urb *urb)
173{
174 struct sk_buff *skb = (struct sk_buff *)urb->context;
175 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
176 struct ieee80211_hw *dev = info->dev;
177 struct rtl8187_priv *priv = dev->priv;
178 struct rtl8187_rx_hdr *hdr;
179 struct ieee80211_rx_status rx_status = { 0 };
180 int rate, signal;
4150c572 181 u32 flags;
605bebe2
MW		 182
183 spin_lock(&priv->rx_queue.lock);
184 if (skb->next)
185 __skb_unlink(skb, &priv->rx_queue);
186 else {
187 spin_unlock(&priv->rx_queue.lock);
188 return;
189 }
190 spin_unlock(&priv->rx_queue.lock);
191
192 if (unlikely(urb->status)) {
193 usb_free_urb(urb);
194 dev_kfree_skb_irq(skb);
195 return;
196 }
197
198 skb_put(skb, urb->actual_length);
199 hdr = (struct rtl8187_rx_hdr *)(skb_tail_pointer(skb) - sizeof(*hdr));
4150c572
JB		 200 flags = le32_to_cpu(hdr->flags);
201 skb_trim(skb, flags & 0x0FFF);
605bebe2
MW		 202
203 signal = hdr->agc >> 1;
4150c572 204 rate = (flags >> 20) & 0xF;
605bebe2
MW		 205 if (rate > 3) { /* OFDM rate */
206 if (signal > 90)
207 signal = 90;
208 else if (signal < 25)
209 signal = 25;
210 signal = 90 - signal;
211 } else { /* CCK rate */
212 if (signal > 95)
213 signal = 95;
214 else if (signal < 30)
215 signal = 30;
216 signal = 95 - signal;
217 }
218
219 rx_status.antenna = (hdr->signal >> 7) & 1;
220 rx_status.signal = 64 - min(hdr->noise, (u8)64);
221 rx_status.ssi = signal;
222 rx_status.rate = rate;
223 rx_status.freq = dev->conf.freq;
224 rx_status.channel = dev->conf.channel;
225 rx_status.phymode = dev->conf.phymode;
226 rx_status.mactime = le64_to_cpu(hdr->mac_time);
4150c572
JB		 227 if (flags & (1 << 13))
228 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
605bebe2
MW		 229 ieee80211_rx_irqsafe(dev, skb, &rx_status);
230
231 skb = dev_alloc_skb(RTL8187_MAX_RX);
232 if (unlikely(!skb)) {
233 usb_free_urb(urb);
234 /* TODO check rx queue length and refill *somewhere* */
235 return;
236 }
237
238 info = (struct rtl8187_rx_info *)skb->cb;
239 info->urb = urb;
240 info->dev = dev;
241 urb->transfer_buffer = skb_tail_pointer(skb);
242 urb->context = skb;
243 skb_queue_tail(&priv->rx_queue, skb);
244
245 usb_submit_urb(urb, GFP_ATOMIC);
246}
247
248static int rtl8187_init_urbs(struct ieee80211_hw *dev)
249{
250 struct rtl8187_priv *priv = dev->priv;
251 struct urb *entry;
252 struct sk_buff *skb;
253 struct rtl8187_rx_info *info;
254
255 while (skb_queue_len(&priv->rx_queue) < 8) {
256 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
257 if (!skb)
258 break;
259 entry = usb_alloc_urb(0, GFP_KERNEL);
260 if (!entry) {
261 kfree_skb(skb);
262 break;
263 }
264 usb_fill_bulk_urb(entry, priv->udev,
265 usb_rcvbulkpipe(priv->udev, 1),
266 skb_tail_pointer(skb),
267 RTL8187_MAX_RX, rtl8187_rx_cb, skb);
268 info = (struct rtl8187_rx_info *)skb->cb;
269 info->urb = entry;
270 info->dev = dev;
271 skb_queue_tail(&priv->rx_queue, skb);
272 usb_submit_urb(entry, GFP_KERNEL);
273 }
274
275 return 0;
276}
277
278static int rtl8187_init_hw(struct ieee80211_hw *dev)
279{
280 struct rtl8187_priv *priv = dev->priv;
281 u8 reg;
282 int i;
283
284 /* reset */
285 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
286 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
287 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
288 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
289 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
290 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
291 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
292
293 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
294
295 msleep(200);
296 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
297 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
298 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
299 msleep(200);
300
301 reg = rtl818x_ioread8(priv, &priv->map->CMD);
302 reg &= (1 << 1);
303 reg |= RTL818X_CMD_RESET;
304 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
305
306 i = 10;
307 do {
308 msleep(2);
309 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
310 RTL818X_CMD_RESET))
311 break;
312 } while (--i);
313
314 if (!i) {
315 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
316 return -ETIMEDOUT;
317 }
318
319 /* reload registers from eeprom */
320 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
321
322 i = 10;
323 do {
324 msleep(4);
325 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
326 RTL818X_EEPROM_CMD_CONFIG))
327 break;
328 } while (--i);
329
330 if (!i) {
331 printk(KERN_ERR "%s: eeprom reset timeout!\n",
332 wiphy_name(dev->wiphy));
333 return -ETIMEDOUT;
334 }
335
336 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
337 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
338 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
339 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_ON);
340 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON);
341 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
342 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
343
344 /* setup card */
345 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
346 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
347
348 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
349 rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
350 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
351
352 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
605bebe2
MW		 353
354 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
355 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
356 reg &= 0x3F;
357 reg |= 0x80;
358 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
359
360 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
361
362 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
363 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
364 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
365
366 // TODO: set RESP_RATE and BRSR properly
367 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
368 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
369
370 /* host_usb_init */
371 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
372 rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
373 reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
374 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
375 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
376 rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
377 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
378 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
379 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
380 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
381 msleep(100);
382
383 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
384 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
385 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
386 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
387 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
388 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
389 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
390 msleep(100);
391
392 priv->rf_init(dev);
393
394 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
395 reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & 0xfffe;
396 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 0x1);
397 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
398 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
399 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
400 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg);
401
402 return 0;
403}
404
405static void rtl8187_set_channel(struct ieee80211_hw *dev, int channel)
406{
407 u32 reg;
408 struct rtl8187_priv *priv = dev->priv;
409
410 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
411 /* Enable TX loopback on MAC level to avoid TX during channel
412 * changes, as this has be seen to causes problems and the
413 * card will stop work until next reset
414 */
415 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
416 reg | RTL818X_TX_CONF_LOOPBACK_MAC);
417 msleep(10);
418 rtl8225_rf_set_channel(dev, channel);
419 msleep(10);
420 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
421}
422
4150c572 423static int rtl8187_start(struct ieee80211_hw *dev)
605bebe2
MW		 424{
425 struct rtl8187_priv *priv = dev->priv;
426 u32 reg;
427 int ret;
428
429 ret = rtl8187_init_hw(dev);
430 if (ret)
431 return ret;
432
433 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
434
435 rtl8187_init_urbs(dev);
436
437 reg = RTL818X_RX_CONF_ONLYERLPKT |
438 RTL818X_RX_CONF_RX_AUTORESETPHY |
439 RTL818X_RX_CONF_BSSID |
440 RTL818X_RX_CONF_MGMT |
605bebe2
MW		 441 RTL818X_RX_CONF_DATA |
442 (7 << 13 /* RX FIFO threshold NONE */) |
443 (7 << 10 /* MAX RX DMA */) |
444 RTL818X_RX_CONF_BROADCAST |
605bebe2 445 RTL818X_RX_CONF_NICMAC;
605bebe2 446
4150c572 447 priv->rx_conf = reg;
605bebe2
MW		 448 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
449
450 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
451 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
452 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
453 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
454
455 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
456 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
457 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
458 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
459 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
460
461 reg = RTL818X_TX_CONF_CW_MIN |
462 (7 << 21 /* MAX TX DMA */) |
463 RTL818X_TX_CONF_NO_ICV;
464 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
465
466 reg = rtl818x_ioread8(priv, &priv->map->CMD);
467 reg |= RTL818X_CMD_TX_ENABLE;
468 reg |= RTL818X_CMD_RX_ENABLE;
469 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
470
471 return 0;
472}
473
4150c572 474static void rtl8187_stop(struct ieee80211_hw *dev)
605bebe2
MW		 475{
476 struct rtl8187_priv *priv = dev->priv;
477 struct rtl8187_rx_info *info;
478 struct sk_buff *skb;
479 u32 reg;
480
481 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
482
483 reg = rtl818x_ioread8(priv, &priv->map->CMD);
484 reg &= ~RTL818X_CMD_TX_ENABLE;
485 reg &= ~RTL818X_CMD_RX_ENABLE;
486 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
487
488 rtl8225_rf_stop(dev);
489
490 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
491 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
492 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
493 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
494
495 while ((skb = skb_dequeue(&priv->rx_queue))) {
496 info = (struct rtl8187_rx_info *)skb->cb;
497 usb_kill_urb(info->urb);
498 kfree_skb(skb);
499 }
4150c572 500 return;
605bebe2
MW		 501}
502
503static int rtl8187_add_interface(struct ieee80211_hw *dev,
504 struct ieee80211_if_init_conf *conf)
505{
506 struct rtl8187_priv *priv = dev->priv;
4150c572 507 int i;
605bebe2 508
4150c572
JB		 509 if (priv->mode != IEEE80211_IF_TYPE_MNTR)
510 return -EOPNOTSUPP;
605bebe2
MW		 511
512 switch (conf->type) {
513 case IEEE80211_IF_TYPE_STA:
605bebe2
MW		 514 priv->mode = conf->type;
515 break;
516 default:
517 return -EOPNOTSUPP;
518 }
519
4150c572
JB		 520 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
521 for (i = 0; i < ETH_ALEN; i++)
522 rtl818x_iowrite8(priv, &priv->map->MAC[i],
523 ((u8 *)conf->mac_addr)[i]);
524 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
605bebe2
MW		 525
526 return 0;
527}
528
529static void rtl8187_remove_interface(struct ieee80211_hw *dev,
530 struct ieee80211_if_init_conf *conf)
531{
532 struct rtl8187_priv *priv = dev->priv;
4150c572 533 priv->mode = IEEE80211_IF_TYPE_MNTR;
605bebe2
MW		 534}
535
536static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
537{
538 struct rtl8187_priv *priv = dev->priv;
539 rtl8187_set_channel(dev, conf->channel);
540
541 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
542
543 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
544 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
545 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
546 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
547 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
548 } else {
549 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
550 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
551 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
552 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
553 }
554
555 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
556 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
557 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
558 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
559 return 0;
560}
561
562static int rtl8187_config_interface(struct ieee80211_hw *dev, int if_id,
563 struct ieee80211_if_conf *conf)
564{
565 struct rtl8187_priv *priv = dev->priv;
566 int i;
567
7e9ed188
DD		 568 priv->if_id = if_id;
569
605bebe2
MW		 570 for (i = 0; i < ETH_ALEN; i++)
571 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
572
573 if (is_valid_ether_addr(conf->bssid))
574 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_INFRA);
575 else
576 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_NO_LINK);
577
578 return 0;
579}
580
4150c572
JB		 581static void rtl8187_configure_filter(struct ieee80211_hw *dev,
582 unsigned int changed_flags,
583 unsigned int *total_flags,
584 int mc_count, struct dev_addr_list *mc_list)
585{
586 struct rtl8187_priv *priv = dev->priv;
587
588 *total_flags = 0;
589
590 if (changed_flags & FIF_PROMISC_IN_BSS)
591 priv->rx_conf ^= RTL818X_RX_CONF_NICMAC;
592 if (changed_flags & FIF_ALLMULTI)
593 priv->rx_conf ^= RTL818X_RX_CONF_MULTICAST;
594 if (changed_flags & FIF_FCSFAIL)
595 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
596 if (changed_flags & FIF_CONTROL)
597 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
598 if (changed_flags & FIF_OTHER_BSS)
599 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
600
601 if (mc_count > 0)
602 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
603
604 if (priv->rx_conf & RTL818X_RX_CONF_NICMAC)
605 *total_flags |= FIF_PROMISC_IN_BSS;
606 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
607 *total_flags |= FIF_ALLMULTI;
608 if (priv->rx_conf & RTL818X_RX_CONF_FCS)
609 *total_flags |= FIF_FCSFAIL;
610 if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
611 *total_flags |= FIF_CONTROL;
612 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
613 *total_flags |= FIF_OTHER_BSS;
614
615 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
616}
617
605bebe2
MW		 618static const struct ieee80211_ops rtl8187_ops = {
619 .tx = rtl8187_tx,
4150c572 620 .start = rtl8187_start,
605bebe2
MW		 621 .stop = rtl8187_stop,
622 .add_interface = rtl8187_add_interface,
623 .remove_interface = rtl8187_remove_interface,
624 .config = rtl8187_config,
625 .config_interface = rtl8187_config_interface,
4150c572 626 .configure_filter = rtl8187_configure_filter,
605bebe2
MW		 627};
628
629static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
630{
631 struct ieee80211_hw *dev = eeprom->data;
632 struct rtl8187_priv *priv = dev->priv;
633 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
634
635 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
636 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
637 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
638 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
639}
640
641static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
642{
643 struct ieee80211_hw *dev = eeprom->data;
644 struct rtl8187_priv *priv = dev->priv;
645 u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
646
647 if (eeprom->reg_data_in)
648 reg |= RTL818X_EEPROM_CMD_WRITE;
649 if (eeprom->reg_data_out)
650 reg |= RTL818X_EEPROM_CMD_READ;
651 if (eeprom->reg_data_clock)
652 reg |= RTL818X_EEPROM_CMD_CK;
653 if (eeprom->reg_chip_select)
654 reg |= RTL818X_EEPROM_CMD_CS;
655
656 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
657 udelay(10);
658}
659
660static int __devinit rtl8187_probe(struct usb_interface *intf,
661 const struct usb_device_id *id)
662{
663 struct usb_device *udev = interface_to_usbdev(intf);
664 struct ieee80211_hw *dev;
665 struct rtl8187_priv *priv;
666 struct eeprom_93cx6 eeprom;
667 struct ieee80211_channel *channel;
668 u16 txpwr, reg;
669 int err, i;
0795af57 670 DECLARE_MAC_BUF(mac);
605bebe2
MW		 671
672 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
673 if (!dev) {
674 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
675 return -ENOMEM;
676 }
677
678 priv = dev->priv;
679
680 SET_IEEE80211_DEV(dev, &intf->dev);
681 usb_set_intfdata(intf, dev);
682 priv->udev = udev;
683
684 usb_get_dev(udev);
685
686 skb_queue_head_init(&priv->rx_queue);
687 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
688 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
689 priv->map = (struct rtl818x_csr *)0xFF00;
690 priv->modes[0].mode = MODE_IEEE80211G;
691 priv->modes[0].num_rates = ARRAY_SIZE(rtl818x_rates);
692 priv->modes[0].rates = priv->rates;
693 priv->modes[0].num_channels = ARRAY_SIZE(rtl818x_channels);
694 priv->modes[0].channels = priv->channels;
695 priv->modes[1].mode = MODE_IEEE80211B;
696 priv->modes[1].num_rates = 4;
697 priv->modes[1].rates = priv->rates;
698 priv->modes[1].num_channels = ARRAY_SIZE(rtl818x_channels);
699 priv->modes[1].channels = priv->channels;
4150c572 700 priv->mode = IEEE80211_IF_TYPE_MNTR;
605bebe2 701 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
7848ba7d 702 IEEE80211_HW_RX_INCLUDES_FCS;
605bebe2
MW		 703 dev->extra_tx_headroom = sizeof(struct rtl8187_tx_hdr);
704 dev->queues = 1;
705 dev->max_rssi = 65;
706 dev->max_signal = 64;
707
708 for (i = 0; i < 2; i++)
709 if ((err = ieee80211_register_hwmode(dev, &priv->modes[i])))
710 goto err_free_dev;
711
712 eeprom.data = dev;
713 eeprom.register_read = rtl8187_eeprom_register_read;
714 eeprom.register_write = rtl8187_eeprom_register_write;
715 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
716 eeprom.width = PCI_EEPROM_WIDTH_93C66;
717 else
718 eeprom.width = PCI_EEPROM_WIDTH_93C46;
719
720 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
721 udelay(10);
722
723 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
724 (__le16 __force *)dev->wiphy->perm_addr, 3);
725 if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
726 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
727 "generated MAC address\n");
728 random_ether_addr(dev->wiphy->perm_addr);
729 }
730
731 channel = priv->channels;
732 for (i = 0; i < 3; i++) {
733 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
734 &txpwr);
735 (*channel++).val = txpwr & 0xFF;
736 (*channel++).val = txpwr >> 8;
737 }
738 for (i = 0; i < 2; i++) {
739 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
740 &txpwr);
741 (*channel++).val = txpwr & 0xFF;
742 (*channel++).val = txpwr >> 8;
743 }
744 for (i = 0; i < 2; i++) {
745 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6 + i,
746 &txpwr);
747 (*channel++).val = txpwr & 0xFF;
748 (*channel++).val = txpwr >> 8;
749 }
750
751 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
752 &priv->txpwr_base);
753
754 reg = rtl818x_ioread16(priv, &priv->map->PGSELECT) & ~1;
755 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg | 1);
756 /* 0 means asic B-cut, we should use SW 3 wire
757 * bit-by-bit banging for radio. 1 means we can use
758 * USB specific request to write radio registers */
759 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
760 rtl818x_iowrite16(priv, &priv->map->PGSELECT, reg);
761 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
762
763 rtl8225_write(dev, 0, 0x1B7);
764
765 if (rtl8225_read(dev, 8) != 0x588 || rtl8225_read(dev, 9) != 0x700)
766 priv->rf_init = rtl8225_rf_init;
767 else
768 priv->rf_init = rtl8225z2_rf_init;
769
770 rtl8225_write(dev, 0, 0x0B7);
771
772 err = ieee80211_register_hw(dev);
773 if (err) {
774 printk(KERN_ERR "rtl8187: Cannot register device\n");
775 goto err_free_dev;
776 }
777
0795af57
JP		 778 printk(KERN_INFO "%s: hwaddr %s, rtl8187 V%d + %s\n",
779 wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
605bebe2
MW		 780 priv->asic_rev, priv->rf_init == rtl8225_rf_init ?
781 "rtl8225" : "rtl8225z2");
782
783 return 0;
784
785 err_free_dev:
786 ieee80211_free_hw(dev);
787 usb_set_intfdata(intf, NULL);
788 usb_put_dev(udev);
789 return err;
790}
791
792static void __devexit rtl8187_disconnect(struct usb_interface *intf)
793{
794 struct ieee80211_hw *dev = usb_get_intfdata(intf);
795 struct rtl8187_priv *priv;
796
797 if (!dev)
798 return;
799
800 ieee80211_unregister_hw(dev);
801
802 priv = dev->priv;
803 usb_put_dev(interface_to_usbdev(intf));
804 ieee80211_free_hw(dev);
805}
806
807static struct usb_driver rtl8187_driver = {
808 .name = KBUILD_MODNAME,
809 .id_table = rtl8187_table,
810 .probe = rtl8187_probe,
811 .disconnect = rtl8187_disconnect,
812};
813
814static int __init rtl8187_init(void)
815{
816 return usb_register(&rtl8187_driver);
817}
818
819static void __exit rtl8187_exit(void)
820{
821 usb_deregister(&rtl8187_driver);
822}
823
824module_init(rtl8187_init);
825module_exit(rtl8187_exit);
Linux kernel - Deliverables
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