Commit | Line | Data |
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605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
0aec00ae JL |
10 | * Magic delays and register offsets below are taken from the original |
11 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
12 | * |
13 | * This program is free software; you can redistribute it and/or modify | |
14 | * it under the terms of the GNU General Public License version 2 as | |
15 | * published by the Free Software Foundation. | |
16 | */ | |
17 | ||
18 | #include <linux/init.h> | |
19 | #include <linux/usb.h> | |
20 | #include <linux/delay.h> | |
21 | #include <linux/etherdevice.h> | |
22 | #include <linux/eeprom_93cx6.h> | |
23 | #include <net/mac80211.h> | |
24 | ||
25 | #include "rtl8187.h" | |
26 | #include "rtl8187_rtl8225.h" | |
27 | ||
28 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
29 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
f8a08c34 | 30 | MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); |
605bebe2 MW |
31 | MODULE_LICENSE("GPL"); |
32 | ||
33 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
7c7e6af3 AM |
34 | /* Asus */ |
35 | {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, | |
605bebe2 | 36 | /* Realtek */ |
f8a08c34 HTL |
37 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, |
38 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, | |
39 | {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 | 40 | /* Netgear */ |
f8a08c34 HTL |
41 | {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, |
42 | {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, | |
fcd7cc14 | 43 | {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, |
c3cf60a9 | 44 | /* HP */ |
f8a08c34 | 45 | {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, |
9934550d | 46 | /* Sitecom */ |
f8a08c34 | 47 | {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, |
605bebe2 MW |
48 | {} |
49 | }; | |
50 | ||
51 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
52 | ||
8318d78a JB |
53 | static const struct ieee80211_rate rtl818x_rates[] = { |
54 | { .bitrate = 10, .hw_value = 0, }, | |
55 | { .bitrate = 20, .hw_value = 1, }, | |
56 | { .bitrate = 55, .hw_value = 2, }, | |
57 | { .bitrate = 110, .hw_value = 3, }, | |
58 | { .bitrate = 60, .hw_value = 4, }, | |
59 | { .bitrate = 90, .hw_value = 5, }, | |
60 | { .bitrate = 120, .hw_value = 6, }, | |
61 | { .bitrate = 180, .hw_value = 7, }, | |
62 | { .bitrate = 240, .hw_value = 8, }, | |
63 | { .bitrate = 360, .hw_value = 9, }, | |
64 | { .bitrate = 480, .hw_value = 10, }, | |
65 | { .bitrate = 540, .hw_value = 11, }, | |
66 | }; | |
67 | ||
68 | static const struct ieee80211_channel rtl818x_channels[] = { | |
69 | { .center_freq = 2412 }, | |
70 | { .center_freq = 2417 }, | |
71 | { .center_freq = 2422 }, | |
72 | { .center_freq = 2427 }, | |
73 | { .center_freq = 2432 }, | |
74 | { .center_freq = 2437 }, | |
75 | { .center_freq = 2442 }, | |
76 | { .center_freq = 2447 }, | |
77 | { .center_freq = 2452 }, | |
78 | { .center_freq = 2457 }, | |
79 | { .center_freq = 2462 }, | |
80 | { .center_freq = 2467 }, | |
81 | { .center_freq = 2472 }, | |
82 | { .center_freq = 2484 }, | |
83 | }; | |
84 | ||
4150c572 JB |
85 | static void rtl8187_iowrite_async_cb(struct urb *urb) |
86 | { | |
87 | kfree(urb->context); | |
88 | usb_free_urb(urb); | |
89 | } | |
90 | ||
91 | static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, | |
92 | void *data, u16 len) | |
93 | { | |
94 | struct usb_ctrlrequest *dr; | |
95 | struct urb *urb; | |
96 | struct rtl8187_async_write_data { | |
97 | u8 data[4]; | |
98 | struct usb_ctrlrequest dr; | |
99 | } *buf; | |
ea8ee240 | 100 | int rc; |
4150c572 JB |
101 | |
102 | buf = kmalloc(sizeof(*buf), GFP_ATOMIC); | |
103 | if (!buf) | |
104 | return; | |
105 | ||
106 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
107 | if (!urb) { | |
108 | kfree(buf); | |
109 | return; | |
110 | } | |
111 | ||
112 | dr = &buf->dr; | |
113 | ||
114 | dr->bRequestType = RTL8187_REQT_WRITE; | |
115 | dr->bRequest = RTL8187_REQ_SET_REG; | |
116 | dr->wValue = addr; | |
117 | dr->wIndex = 0; | |
118 | dr->wLength = cpu_to_le16(len); | |
119 | ||
120 | memcpy(buf, data, len); | |
121 | ||
122 | usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), | |
123 | (unsigned char *)dr, buf, len, | |
124 | rtl8187_iowrite_async_cb, buf); | |
ea8ee240 ON |
125 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
126 | if (rc < 0) { | |
127 | kfree(buf); | |
128 | usb_free_urb(urb); | |
129 | } | |
4150c572 JB |
130 | } |
131 | ||
132 | static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, | |
133 | __le32 *addr, u32 val) | |
134 | { | |
135 | __le32 buf = cpu_to_le32(val); | |
136 | ||
137 | rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), | |
138 | &buf, sizeof(buf)); | |
139 | } | |
140 | ||
605bebe2 MW |
141 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
142 | { | |
143 | struct rtl8187_priv *priv = dev->priv; | |
144 | ||
145 | data <<= 8; | |
146 | data |= addr | 0x80; | |
147 | ||
148 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
149 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
150 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
151 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
152 | ||
153 | msleep(1); | |
154 | } | |
155 | ||
156 | static void rtl8187_tx_cb(struct urb *urb) | |
157 | { | |
605bebe2 | 158 | struct sk_buff *skb = (struct sk_buff *)urb->context; |
e039fa4a JB |
159 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
160 | struct ieee80211_hw *hw = info->driver_data[0]; | |
6f7853f3 | 161 | struct rtl8187_priv *priv = hw->priv; |
605bebe2 | 162 | |
e039fa4a | 163 | usb_free_urb(info->driver_data[1]); |
6f7853f3 HTL |
164 | skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : |
165 | sizeof(struct rtl8187_tx_hdr)); | |
e039fa4a JB |
166 | memset(&info->status, 0, sizeof(info->status)); |
167 | info->flags |= IEEE80211_TX_STAT_ACK; | |
168 | ieee80211_tx_status_irqsafe(hw, skb); | |
605bebe2 MW |
169 | } |
170 | ||
e039fa4a | 171 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) |
605bebe2 MW |
172 | { |
173 | struct rtl8187_priv *priv = dev->priv; | |
e039fa4a | 174 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
1f690d7b | 175 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
6f7853f3 HTL |
176 | unsigned int ep; |
177 | void *buf; | |
605bebe2 | 178 | struct urb *urb; |
98798f48 MW |
179 | __le16 rts_dur = 0; |
180 | u32 flags; | |
ea8ee240 | 181 | int rc; |
605bebe2 MW |
182 | |
183 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
184 | if (!urb) { | |
185 | kfree_skb(skb); | |
186 | return 0; | |
187 | } | |
188 | ||
98798f48 | 189 | flags = skb->len; |
38e3b0d8 | 190 | flags |= RTL818X_TX_DESC_FLAG_NO_ENC; |
aa68cbfb | 191 | |
e039fa4a | 192 | flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; |
8b7b1e05 | 193 | if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control)) |
38e3b0d8 | 194 | flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; |
e039fa4a | 195 | if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) { |
38e3b0d8 | 196 | flags |= RTL818X_TX_DESC_FLAG_RTS; |
e039fa4a | 197 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
32bfd35d | 198 | rts_dur = ieee80211_rts_duration(dev, priv->vif, |
e039fa4a JB |
199 | skb->len, info); |
200 | } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) { | |
38e3b0d8 | 201 | flags |= RTL818X_TX_DESC_FLAG_CTS; |
e039fa4a | 202 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
aa68cbfb | 203 | } |
98798f48 | 204 | |
6f7853f3 HTL |
205 | if (!priv->is_rtl8187b) { |
206 | struct rtl8187_tx_hdr *hdr = | |
207 | (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
208 | hdr->flags = cpu_to_le32(flags); | |
209 | hdr->len = 0; | |
210 | hdr->rts_duration = rts_dur; | |
211 | hdr->retry = cpu_to_le32(info->control.retry_limit << 8); | |
212 | buf = hdr; | |
213 | ||
214 | ep = 2; | |
215 | } else { | |
216 | /* fc needs to be calculated before skb_push() */ | |
217 | unsigned int epmap[4] = { 6, 7, 5, 4 }; | |
218 | struct ieee80211_hdr *tx_hdr = | |
219 | (struct ieee80211_hdr *)(skb->data); | |
220 | u16 fc = le16_to_cpu(tx_hdr->frame_control); | |
221 | ||
222 | struct rtl8187b_tx_hdr *hdr = | |
223 | (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
224 | struct ieee80211_rate *txrate = | |
225 | ieee80211_get_tx_rate(dev, info); | |
226 | memset(hdr, 0, sizeof(*hdr)); | |
227 | hdr->flags = cpu_to_le32(flags); | |
228 | hdr->rts_duration = rts_dur; | |
229 | hdr->retry = cpu_to_le32(info->control.retry_limit << 8); | |
230 | hdr->tx_duration = | |
231 | ieee80211_generic_frame_duration(dev, priv->vif, | |
232 | skb->len, txrate); | |
233 | buf = hdr; | |
234 | ||
235 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
236 | ep = 12; | |
237 | else | |
238 | ep = epmap[skb_get_queue_mapping(skb)]; | |
239 | } | |
605bebe2 | 240 | |
1f690d7b LF |
241 | /* FIXME: The sequence that follows is needed for this driver to |
242 | * work with mac80211 since "mac80211: fix TX sequence numbers". | |
243 | * As with the temporary code in rt2x00, changes will be needed | |
244 | * to get proper sequence numbers on beacons. In addition, this | |
245 | * patch places the sequence number in the hardware state, which | |
246 | * limits us to a single virtual state. | |
247 | */ | |
248 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | |
249 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | |
250 | priv->seqno += 0x10; | |
251 | ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | |
252 | ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno); | |
253 | } | |
254 | ||
e039fa4a JB |
255 | info->driver_data[0] = dev; |
256 | info->driver_data[1] = urb; | |
6f7853f3 HTL |
257 | |
258 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), | |
259 | buf, skb->len, rtl8187_tx_cb, skb); | |
ea8ee240 ON |
260 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
261 | if (rc < 0) { | |
262 | usb_free_urb(urb); | |
263 | kfree_skb(skb); | |
264 | } | |
605bebe2 MW |
265 | |
266 | return 0; | |
267 | } | |
268 | ||
269 | static void rtl8187_rx_cb(struct urb *urb) | |
270 | { | |
271 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
272 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
273 | struct ieee80211_hw *dev = info->dev; | |
274 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
275 | struct ieee80211_rx_status rx_status = { 0 }; |
276 | int rate, signal; | |
4150c572 | 277 | u32 flags; |
0ccd58fc | 278 | u32 quality; |
605bebe2 MW |
279 | |
280 | spin_lock(&priv->rx_queue.lock); | |
281 | if (skb->next) | |
282 | __skb_unlink(skb, &priv->rx_queue); | |
283 | else { | |
284 | spin_unlock(&priv->rx_queue.lock); | |
285 | return; | |
286 | } | |
287 | spin_unlock(&priv->rx_queue.lock); | |
288 | ||
289 | if (unlikely(urb->status)) { | |
290 | usb_free_urb(urb); | |
291 | dev_kfree_skb_irq(skb); | |
292 | return; | |
293 | } | |
294 | ||
295 | skb_put(skb, urb->actual_length); | |
6f7853f3 HTL |
296 | if (!priv->is_rtl8187b) { |
297 | struct rtl8187_rx_hdr *hdr = | |
298 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
299 | flags = le32_to_cpu(hdr->flags); | |
300 | signal = hdr->signal & 0x7f; | |
301 | rx_status.antenna = (hdr->signal >> 7) & 1; | |
6f7853f3 HTL |
302 | rx_status.noise = hdr->noise; |
303 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | |
6f7853f3 | 304 | priv->quality = signal; |
0ccd58fc | 305 | rx_status.qual = priv->quality; |
6f7853f3 | 306 | priv->noise = hdr->noise; |
0ccd58fc LF |
307 | rate = (flags >> 20) & 0xF; |
308 | if (rate > 3) { /* OFDM rate */ | |
309 | if (signal > 90) | |
310 | signal = 90; | |
311 | else if (signal < 25) | |
312 | signal = 25; | |
313 | signal = 90 - signal; | |
314 | } else { /* CCK rate */ | |
315 | if (signal > 95) | |
316 | signal = 95; | |
317 | else if (signal < 30) | |
318 | signal = 30; | |
319 | signal = 95 - signal; | |
320 | } | |
321 | rx_status.signal = signal; | |
322 | priv->signal = signal; | |
6f7853f3 HTL |
323 | } else { |
324 | struct rtl8187b_rx_hdr *hdr = | |
325 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
0ccd58fc LF |
326 | /* The Realtek datasheet for the RTL8187B shows that the RX |
327 | * header contains the following quantities: signal quality, | |
328 | * RSSI, AGC, the received power in dB, and the measured SNR. | |
329 | * In testing, none of these quantities show qualitative | |
330 | * agreement with AP signal strength, except for the AGC, | |
331 | * which is inversely proportional to the strength of the | |
332 | * signal. In the following, the quality and signal strength | |
333 | * are derived from the AGC. The arbitrary scaling constants | |
334 | * are chosen to make the results close to the values obtained | |
335 | * for a BCM4312 using b43 as the driver. The noise is ignored | |
336 | * for now. | |
337 | */ | |
6f7853f3 | 338 | flags = le32_to_cpu(hdr->flags); |
0ccd58fc LF |
339 | quality = 170 - hdr->agc; |
340 | if (quality > 100) | |
341 | quality = 100; | |
342 | signal = 14 - hdr->agc / 2; | |
343 | rx_status.qual = quality; | |
344 | priv->quality = quality; | |
345 | rx_status.signal = signal; | |
346 | priv->signal = signal; | |
347 | rx_status.antenna = (hdr->rssi >> 7) & 1; | |
6f7853f3 | 348 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
0ccd58fc | 349 | rate = (flags >> 20) & 0xF; |
6f7853f3 | 350 | } |
605bebe2 | 351 | |
6f7853f3 | 352 | skb_trim(skb, flags & 0x0FFF); |
8318d78a JB |
353 | rx_status.rate_idx = rate; |
354 | rx_status.freq = dev->conf.channel->center_freq; | |
355 | rx_status.band = dev->conf.channel->band; | |
03bffc13 | 356 | rx_status.flag |= RX_FLAG_TSFT; |
38e3b0d8 | 357 | if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) |
4150c572 | 358 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
605bebe2 MW |
359 | ieee80211_rx_irqsafe(dev, skb, &rx_status); |
360 | ||
361 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
362 | if (unlikely(!skb)) { | |
363 | usb_free_urb(urb); | |
364 | /* TODO check rx queue length and refill *somewhere* */ | |
365 | return; | |
366 | } | |
367 | ||
368 | info = (struct rtl8187_rx_info *)skb->cb; | |
369 | info->urb = urb; | |
370 | info->dev = dev; | |
371 | urb->transfer_buffer = skb_tail_pointer(skb); | |
372 | urb->context = skb; | |
373 | skb_queue_tail(&priv->rx_queue, skb); | |
374 | ||
375 | usb_submit_urb(urb, GFP_ATOMIC); | |
376 | } | |
377 | ||
378 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
379 | { | |
380 | struct rtl8187_priv *priv = dev->priv; | |
381 | struct urb *entry; | |
382 | struct sk_buff *skb; | |
383 | struct rtl8187_rx_info *info; | |
384 | ||
385 | while (skb_queue_len(&priv->rx_queue) < 8) { | |
386 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); | |
387 | if (!skb) | |
388 | break; | |
389 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
390 | if (!entry) { | |
391 | kfree_skb(skb); | |
392 | break; | |
393 | } | |
394 | usb_fill_bulk_urb(entry, priv->udev, | |
6f7853f3 HTL |
395 | usb_rcvbulkpipe(priv->udev, |
396 | priv->is_rtl8187b ? 3 : 1), | |
605bebe2 MW |
397 | skb_tail_pointer(skb), |
398 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
399 | info = (struct rtl8187_rx_info *)skb->cb; | |
400 | info->urb = entry; | |
401 | info->dev = dev; | |
402 | skb_queue_tail(&priv->rx_queue, skb); | |
403 | usb_submit_urb(entry, GFP_KERNEL); | |
404 | } | |
405 | ||
406 | return 0; | |
407 | } | |
408 | ||
f8a08c34 | 409 | static int rtl8187_cmd_reset(struct ieee80211_hw *dev) |
605bebe2 MW |
410 | { |
411 | struct rtl8187_priv *priv = dev->priv; | |
412 | u8 reg; | |
413 | int i; | |
414 | ||
605bebe2 MW |
415 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
416 | reg &= (1 << 1); | |
417 | reg |= RTL818X_CMD_RESET; | |
418 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
419 | ||
420 | i = 10; | |
421 | do { | |
422 | msleep(2); | |
423 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
424 | RTL818X_CMD_RESET)) | |
425 | break; | |
426 | } while (--i); | |
427 | ||
428 | if (!i) { | |
429 | printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); | |
430 | return -ETIMEDOUT; | |
431 | } | |
432 | ||
433 | /* reload registers from eeprom */ | |
434 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
435 | ||
436 | i = 10; | |
437 | do { | |
438 | msleep(4); | |
439 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
440 | RTL818X_EEPROM_CMD_CONFIG)) | |
441 | break; | |
442 | } while (--i); | |
443 | ||
444 | if (!i) { | |
445 | printk(KERN_ERR "%s: eeprom reset timeout!\n", | |
446 | wiphy_name(dev->wiphy)); | |
447 | return -ETIMEDOUT; | |
448 | } | |
449 | ||
f8a08c34 HTL |
450 | return 0; |
451 | } | |
452 | ||
453 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
454 | { | |
455 | struct rtl8187_priv *priv = dev->priv; | |
456 | u8 reg; | |
457 | int res; | |
458 | ||
459 | /* reset */ | |
460 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
461 | RTL818X_EEPROM_CMD_CONFIG); | |
462 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
463 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | | |
464 | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
465 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
466 | RTL8187_RTL8225_ANAPARAM_ON); | |
467 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
468 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
469 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & |
470 | ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
471 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
472 | RTL818X_EEPROM_CMD_NORMAL); | |
473 | ||
474 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
475 | ||
476 | msleep(200); | |
477 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
478 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
479 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
480 | msleep(200); | |
481 | ||
482 | res = rtl8187_cmd_reset(dev); | |
483 | if (res) | |
484 | return res; | |
485 | ||
605bebe2 MW |
486 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
487 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
f8a08c34 HTL |
488 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
489 | reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
490 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
491 | RTL8187_RTL8225_ANAPARAM_ON); | |
492 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
493 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
494 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
495 | reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
605bebe2 MW |
496 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
497 | ||
498 | /* setup card */ | |
499 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
500 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
501 | ||
502 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
503 | rtl818x_iowrite8(priv, &priv->map->GPIO, 1); | |
504 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
505 | ||
506 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 MW |
507 | |
508 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
509 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
510 | reg &= 0x3F; | |
511 | reg |= 0x80; | |
512 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
513 | ||
514 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
515 | ||
516 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
517 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
518 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); | |
519 | ||
520 | // TODO: set RESP_RATE and BRSR properly | |
521 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
522 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
523 | ||
524 | /* host_usb_init */ | |
525 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
526 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
527 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); | |
528 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
529 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
530 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20); | |
531 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
532 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
533 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
534 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
535 | msleep(100); | |
536 | ||
537 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
538 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
539 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
f8a08c34 HTL |
540 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
541 | RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 | 542 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); |
f8a08c34 HTL |
543 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
544 | RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 MW |
545 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); |
546 | msleep(100); | |
547 | ||
f6532111 | 548 | priv->rf->init(dev); |
605bebe2 MW |
549 | |
550 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
f6532111 MW |
551 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
552 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
553 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); |
554 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
555 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
f6532111 | 556 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
557 | |
558 | return 0; | |
559 | } | |
560 | ||
f8a08c34 HTL |
561 | static const u8 rtl8187b_reg_table[][3] = { |
562 | {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, | |
563 | {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, | |
564 | {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, | |
565 | {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, | |
566 | ||
567 | {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, | |
568 | {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, | |
569 | {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1}, | |
570 | {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1}, | |
571 | {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1}, | |
572 | {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, | |
573 | ||
574 | {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, | |
575 | {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, | |
576 | {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, | |
577 | {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, | |
578 | {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, | |
579 | {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, | |
580 | {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2}, | |
581 | {0x73, 0x9A, 2}, | |
582 | ||
583 | {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0}, | |
584 | {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, | |
585 | {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0}, | |
586 | {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, | |
587 | {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0}, | |
588 | ||
589 | {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, | |
590 | {0x8E, 0x08, 0}, {0x8F, 0x00, 0} | |
591 | }; | |
592 | ||
593 | static int rtl8187b_init_hw(struct ieee80211_hw *dev) | |
594 | { | |
595 | struct rtl8187_priv *priv = dev->priv; | |
596 | int res, i; | |
597 | u8 reg; | |
598 | ||
599 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
600 | RTL818X_EEPROM_CMD_CONFIG); | |
601 | ||
602 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
603 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT; | |
604 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
4ece16a1 HRK |
605 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, |
606 | RTL8187B_RTL8225_ANAPARAM2_ON); | |
607 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, | |
608 | RTL8187B_RTL8225_ANAPARAM_ON); | |
609 | rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, | |
610 | RTL8187B_RTL8225_ANAPARAM3_ON); | |
f8a08c34 HTL |
611 | |
612 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); | |
613 | reg = rtl818x_ioread8(priv, (u8 *)0xFF62); | |
614 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); | |
615 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); | |
616 | ||
617 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
618 | reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; | |
619 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
620 | ||
621 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
622 | RTL818X_EEPROM_CMD_NORMAL); | |
623 | ||
624 | res = rtl8187_cmd_reset(dev); | |
625 | if (res) | |
626 | return res; | |
627 | ||
628 | rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF); | |
629 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
630 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
631 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
632 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
633 | reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT | | |
634 | RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
635 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
636 | ||
637 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); | |
638 | reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK); | |
639 | reg |= RTL818X_RATE_FALLBACK_ENABLE; | |
640 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg); | |
641 | ||
642 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
643 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
644 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); | |
645 | ||
646 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
647 | RTL818X_EEPROM_CMD_CONFIG); | |
648 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
649 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); | |
650 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
651 | RTL818X_EEPROM_CMD_NORMAL); | |
652 | ||
653 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
654 | for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { | |
655 | rtl818x_iowrite8_idx(priv, | |
656 | (u8 *)(uintptr_t) | |
657 | (rtl8187b_reg_table[i][0] | 0xFF00), | |
658 | rtl8187b_reg_table[i][1], | |
659 | rtl8187b_reg_table[i][2]); | |
660 | } | |
661 | ||
662 | rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); | |
663 | rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); | |
664 | ||
665 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); | |
666 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); | |
667 | rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); | |
668 | ||
669 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); | |
670 | ||
671 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); | |
672 | ||
673 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
674 | RTL818X_EEPROM_CMD_CONFIG); | |
675 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
676 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; | |
677 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
678 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
679 | RTL818X_EEPROM_CMD_NORMAL); | |
680 | ||
681 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); | |
682 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); | |
683 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); | |
684 | msleep(1100); | |
685 | ||
686 | priv->rf->init(dev); | |
687 | ||
688 | reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; | |
689 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
690 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
691 | ||
692 | rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); | |
693 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); | |
694 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
695 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
696 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); | |
697 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
698 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
699 | ||
700 | reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); | |
701 | rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); | |
702 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); | |
703 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); | |
704 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); | |
705 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); | |
706 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); | |
707 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); | |
708 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); | |
709 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); | |
710 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); | |
711 | rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); | |
712 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); | |
713 | ||
714 | rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); | |
715 | ||
716 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); | |
717 | ||
718 | return 0; | |
719 | } | |
720 | ||
4150c572 | 721 | static int rtl8187_start(struct ieee80211_hw *dev) |
605bebe2 MW |
722 | { |
723 | struct rtl8187_priv *priv = dev->priv; | |
724 | u32 reg; | |
725 | int ret; | |
726 | ||
f8a08c34 HTL |
727 | ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : |
728 | rtl8187b_init_hw(dev); | |
605bebe2 MW |
729 | if (ret) |
730 | return ret; | |
731 | ||
7dcdd073 | 732 | mutex_lock(&priv->conf_mutex); |
f8a08c34 HTL |
733 | if (priv->is_rtl8187b) { |
734 | reg = RTL818X_RX_CONF_MGMT | | |
735 | RTL818X_RX_CONF_DATA | | |
736 | RTL818X_RX_CONF_BROADCAST | | |
737 | RTL818X_RX_CONF_NICMAC | | |
738 | RTL818X_RX_CONF_BSSID | | |
739 | (7 << 13 /* RX FIFO threshold NONE */) | | |
740 | (7 << 10 /* MAX RX DMA */) | | |
741 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
742 | RTL818X_RX_CONF_ONLYERLPKT | | |
743 | RTL818X_RX_CONF_MULTICAST; | |
744 | priv->rx_conf = reg; | |
745 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); | |
746 | ||
747 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
748 | RTL818X_TX_CONF_HW_SEQNUM | | |
749 | RTL818X_TX_CONF_DISREQQSIZE | | |
750 | (7 << 8 /* short retry limit */) | | |
751 | (7 << 0 /* long retry limit */) | | |
752 | (7 << 21 /* MAX TX DMA */)); | |
753 | rtl8187_init_urbs(dev); | |
7dcdd073 | 754 | mutex_unlock(&priv->conf_mutex); |
f8a08c34 HTL |
755 | return 0; |
756 | } | |
757 | ||
605bebe2 MW |
758 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); |
759 | ||
2fe14263 MW |
760 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
761 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); | |
762 | ||
605bebe2 MW |
763 | rtl8187_init_urbs(dev); |
764 | ||
765 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
766 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
767 | RTL818X_RX_CONF_BSSID | | |
768 | RTL818X_RX_CONF_MGMT | | |
605bebe2 MW |
769 | RTL818X_RX_CONF_DATA | |
770 | (7 << 13 /* RX FIFO threshold NONE */) | | |
771 | (7 << 10 /* MAX RX DMA */) | | |
772 | RTL818X_RX_CONF_BROADCAST | | |
605bebe2 | 773 | RTL818X_RX_CONF_NICMAC; |
605bebe2 | 774 | |
4150c572 | 775 | priv->rx_conf = reg; |
605bebe2 MW |
776 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
777 | ||
778 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
779 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
780 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
781 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
782 | ||
783 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
784 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
785 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
786 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
787 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
788 | ||
789 | reg = RTL818X_TX_CONF_CW_MIN | | |
790 | (7 << 21 /* MAX TX DMA */) | | |
791 | RTL818X_TX_CONF_NO_ICV; | |
792 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
793 | ||
794 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
795 | reg |= RTL818X_CMD_TX_ENABLE; | |
796 | reg |= RTL818X_CMD_RX_ENABLE; | |
797 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
7dcdd073 | 798 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
799 | |
800 | return 0; | |
801 | } | |
802 | ||
4150c572 | 803 | static void rtl8187_stop(struct ieee80211_hw *dev) |
605bebe2 MW |
804 | { |
805 | struct rtl8187_priv *priv = dev->priv; | |
806 | struct rtl8187_rx_info *info; | |
807 | struct sk_buff *skb; | |
808 | u32 reg; | |
809 | ||
7dcdd073 | 810 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
811 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
812 | ||
813 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
814 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
815 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
816 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
817 | ||
f6532111 | 818 | priv->rf->stop(dev); |
605bebe2 MW |
819 | |
820 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
821 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
822 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
823 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
824 | ||
825 | while ((skb = skb_dequeue(&priv->rx_queue))) { | |
826 | info = (struct rtl8187_rx_info *)skb->cb; | |
827 | usb_kill_urb(info->urb); | |
828 | kfree_skb(skb); | |
829 | } | |
7dcdd073 | 830 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
831 | } |
832 | ||
833 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
834 | struct ieee80211_if_init_conf *conf) | |
835 | { | |
836 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 837 | int i; |
605bebe2 | 838 | |
4150c572 JB |
839 | if (priv->mode != IEEE80211_IF_TYPE_MNTR) |
840 | return -EOPNOTSUPP; | |
605bebe2 MW |
841 | |
842 | switch (conf->type) { | |
843 | case IEEE80211_IF_TYPE_STA: | |
605bebe2 MW |
844 | priv->mode = conf->type; |
845 | break; | |
846 | default: | |
847 | return -EOPNOTSUPP; | |
848 | } | |
849 | ||
7dcdd073 | 850 | mutex_lock(&priv->conf_mutex); |
aa979a6a HRK |
851 | priv->vif = conf->vif; |
852 | ||
4150c572 JB |
853 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
854 | for (i = 0; i < ETH_ALEN; i++) | |
855 | rtl818x_iowrite8(priv, &priv->map->MAC[i], | |
856 | ((u8 *)conf->mac_addr)[i]); | |
857 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 | 858 | |
7dcdd073 | 859 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
860 | return 0; |
861 | } | |
862 | ||
863 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
864 | struct ieee80211_if_init_conf *conf) | |
865 | { | |
866 | struct rtl8187_priv *priv = dev->priv; | |
7dcdd073 | 867 | mutex_lock(&priv->conf_mutex); |
4150c572 | 868 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
aa979a6a | 869 | priv->vif = NULL; |
7dcdd073 | 870 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
871 | } |
872 | ||
873 | static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf) | |
874 | { | |
875 | struct rtl8187_priv *priv = dev->priv; | |
f6532111 MW |
876 | u32 reg; |
877 | ||
7dcdd073 | 878 | mutex_lock(&priv->conf_mutex); |
f6532111 MW |
879 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
880 | /* Enable TX loopback on MAC level to avoid TX during channel | |
881 | * changes, as this has be seen to causes problems and the | |
882 | * card will stop work until next reset | |
883 | */ | |
884 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
885 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
886 | msleep(10); | |
887 | priv->rf->set_chan(dev, conf); | |
888 | msleep(10); | |
889 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
605bebe2 | 890 | |
6f7853f3 HTL |
891 | if (!priv->is_rtl8187b) { |
892 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); | |
893 | ||
894 | if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) { | |
895 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
896 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
897 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
898 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73); | |
899 | } else { | |
900 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
901 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
902 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
903 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5); | |
904 | } | |
605bebe2 MW |
905 | } |
906 | ||
907 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
908 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
909 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
910 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
7dcdd073 | 911 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
912 | return 0; |
913 | } | |
914 | ||
32bfd35d JB |
915 | static int rtl8187_config_interface(struct ieee80211_hw *dev, |
916 | struct ieee80211_vif *vif, | |
605bebe2 MW |
917 | struct ieee80211_if_conf *conf) |
918 | { | |
919 | struct rtl8187_priv *priv = dev->priv; | |
920 | int i; | |
6f7853f3 | 921 | u8 reg; |
605bebe2 | 922 | |
7dcdd073 | 923 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
924 | for (i = 0; i < ETH_ALEN; i++) |
925 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); | |
926 | ||
6f7853f3 HTL |
927 | if (is_valid_ether_addr(conf->bssid)) { |
928 | reg = RTL818X_MSR_INFRA; | |
929 | if (priv->is_rtl8187b) | |
930 | reg |= RTL818X_MSR_ENEDCA; | |
931 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | |
932 | } else { | |
933 | reg = RTL818X_MSR_NO_LINK; | |
934 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | |
935 | } | |
605bebe2 | 936 | |
7dcdd073 | 937 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
938 | return 0; |
939 | } | |
940 | ||
4150c572 JB |
941 | static void rtl8187_configure_filter(struct ieee80211_hw *dev, |
942 | unsigned int changed_flags, | |
943 | unsigned int *total_flags, | |
2fe14263 | 944 | int mc_count, struct dev_addr_list *mclist) |
4150c572 JB |
945 | { |
946 | struct rtl8187_priv *priv = dev->priv; | |
947 | ||
4150c572 JB |
948 | if (changed_flags & FIF_FCSFAIL) |
949 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; | |
950 | if (changed_flags & FIF_CONTROL) | |
951 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; | |
952 | if (changed_flags & FIF_OTHER_BSS) | |
953 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; | |
2fe14263 | 954 | if (*total_flags & FIF_ALLMULTI || mc_count > 0) |
4150c572 | 955 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; |
2fe14263 MW |
956 | else |
957 | priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; | |
958 | ||
959 | *total_flags = 0; | |
4150c572 | 960 | |
4150c572 JB |
961 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) |
962 | *total_flags |= FIF_FCSFAIL; | |
963 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) | |
964 | *total_flags |= FIF_CONTROL; | |
965 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) | |
966 | *total_flags |= FIF_OTHER_BSS; | |
2fe14263 MW |
967 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) |
968 | *total_flags |= FIF_ALLMULTI; | |
4150c572 JB |
969 | |
970 | rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); | |
971 | } | |
972 | ||
605bebe2 MW |
973 | static const struct ieee80211_ops rtl8187_ops = { |
974 | .tx = rtl8187_tx, | |
4150c572 | 975 | .start = rtl8187_start, |
605bebe2 MW |
976 | .stop = rtl8187_stop, |
977 | .add_interface = rtl8187_add_interface, | |
978 | .remove_interface = rtl8187_remove_interface, | |
979 | .config = rtl8187_config, | |
980 | .config_interface = rtl8187_config_interface, | |
4150c572 | 981 | .configure_filter = rtl8187_configure_filter, |
605bebe2 MW |
982 | }; |
983 | ||
984 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
985 | { | |
986 | struct ieee80211_hw *dev = eeprom->data; | |
987 | struct rtl8187_priv *priv = dev->priv; | |
988 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
989 | ||
990 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
991 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
992 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
993 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
994 | } | |
995 | ||
996 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
997 | { | |
998 | struct ieee80211_hw *dev = eeprom->data; | |
999 | struct rtl8187_priv *priv = dev->priv; | |
1000 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
1001 | ||
1002 | if (eeprom->reg_data_in) | |
1003 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
1004 | if (eeprom->reg_data_out) | |
1005 | reg |= RTL818X_EEPROM_CMD_READ; | |
1006 | if (eeprom->reg_data_clock) | |
1007 | reg |= RTL818X_EEPROM_CMD_CK; | |
1008 | if (eeprom->reg_chip_select) | |
1009 | reg |= RTL818X_EEPROM_CMD_CS; | |
1010 | ||
1011 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
1012 | udelay(10); | |
1013 | } | |
1014 | ||
1015 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
1016 | const struct usb_device_id *id) | |
1017 | { | |
1018 | struct usb_device *udev = interface_to_usbdev(intf); | |
1019 | struct ieee80211_hw *dev; | |
1020 | struct rtl8187_priv *priv; | |
1021 | struct eeprom_93cx6 eeprom; | |
1022 | struct ieee80211_channel *channel; | |
6f7853f3 | 1023 | const char *chip_name; |
605bebe2 MW |
1024 | u16 txpwr, reg; |
1025 | int err, i; | |
0795af57 | 1026 | DECLARE_MAC_BUF(mac); |
605bebe2 MW |
1027 | |
1028 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
1029 | if (!dev) { | |
1030 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
1031 | return -ENOMEM; | |
1032 | } | |
1033 | ||
1034 | priv = dev->priv; | |
0e25b4ef | 1035 | priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); |
605bebe2 MW |
1036 | |
1037 | SET_IEEE80211_DEV(dev, &intf->dev); | |
1038 | usb_set_intfdata(intf, dev); | |
1039 | priv->udev = udev; | |
1040 | ||
1041 | usb_get_dev(udev); | |
1042 | ||
1043 | skb_queue_head_init(&priv->rx_queue); | |
8318d78a JB |
1044 | |
1045 | BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); | |
1046 | BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); | |
1047 | ||
605bebe2 MW |
1048 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); |
1049 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
1050 | priv->map = (struct rtl818x_csr *)0xFF00; | |
8318d78a JB |
1051 | |
1052 | priv->band.band = IEEE80211_BAND_2GHZ; | |
1053 | priv->band.channels = priv->channels; | |
1054 | priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); | |
1055 | priv->band.bitrates = priv->rates; | |
1056 | priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); | |
1057 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; | |
1058 | ||
1059 | ||
4150c572 | 1060 | priv->mode = IEEE80211_IF_TYPE_MNTR; |
605bebe2 | 1061 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
0ccd58fc | 1062 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 | 1063 | |
605bebe2 MW |
1064 | eeprom.data = dev; |
1065 | eeprom.register_read = rtl8187_eeprom_register_read; | |
1066 | eeprom.register_write = rtl8187_eeprom_register_write; | |
1067 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
1068 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
1069 | else | |
1070 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1071 | ||
1072 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1073 | udelay(10); | |
1074 | ||
1075 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
1076 | (__le16 __force *)dev->wiphy->perm_addr, 3); | |
1077 | if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { | |
1078 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " | |
1079 | "generated MAC address\n"); | |
1080 | random_ether_addr(dev->wiphy->perm_addr); | |
1081 | } | |
1082 | ||
1083 | channel = priv->channels; | |
1084 | for (i = 0; i < 3; i++) { | |
1085 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
1086 | &txpwr); | |
8318d78a JB |
1087 | (*channel++).hw_value = txpwr & 0xFF; |
1088 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 MW |
1089 | } |
1090 | for (i = 0; i < 2; i++) { | |
1091 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
1092 | &txpwr); | |
8318d78a JB |
1093 | (*channel++).hw_value = txpwr & 0xFF; |
1094 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 | 1095 | } |
605bebe2 MW |
1096 | |
1097 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
1098 | &priv->txpwr_base); | |
1099 | ||
f6532111 MW |
1100 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
1101 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
1102 | /* 0 means asic B-cut, we should use SW 3 wire |
1103 | * bit-by-bit banging for radio. 1 means we can use | |
1104 | * USB specific request to write radio registers */ | |
1105 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
f6532111 | 1106 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
1107 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
1108 | ||
6f7853f3 HTL |
1109 | if (!priv->is_rtl8187b) { |
1110 | u32 reg32; | |
1111 | reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
1112 | reg32 &= RTL818X_TX_CONF_HWVER_MASK; | |
1113 | switch (reg32) { | |
0e25b4ef LF |
1114 | case RTL818X_TX_CONF_R8187vD_B: |
1115 | /* Some RTL8187B devices have a USB ID of 0x8187 | |
1116 | * detect them here */ | |
1117 | chip_name = "RTL8187BvB(early)"; | |
1118 | priv->is_rtl8187b = 1; | |
1119 | priv->hw_rev = RTL8187BvB; | |
1120 | break; | |
1121 | case RTL818X_TX_CONF_R8187vD: | |
6f7853f3 HTL |
1122 | chip_name = "RTL8187vD"; |
1123 | break; | |
1124 | default: | |
1125 | chip_name = "RTL8187vB (default)"; | |
1126 | } | |
1127 | } else { | |
6f7853f3 HTL |
1128 | /* |
1129 | * Force USB request to write radio registers for 8187B, Realtek | |
1130 | * only uses it in their sources | |
1131 | */ | |
1132 | /*if (priv->asic_rev == 0) { | |
1133 | printk(KERN_WARNING "rtl8187: Forcing use of USB " | |
1134 | "requests to write to radio registers\n"); | |
1135 | priv->asic_rev = 1; | |
1136 | }*/ | |
1137 | switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { | |
1138 | case RTL818X_R8187B_B: | |
1139 | chip_name = "RTL8187BvB"; | |
1140 | priv->hw_rev = RTL8187BvB; | |
1141 | break; | |
1142 | case RTL818X_R8187B_D: | |
1143 | chip_name = "RTL8187BvD"; | |
1144 | priv->hw_rev = RTL8187BvD; | |
1145 | break; | |
1146 | case RTL818X_R8187B_E: | |
1147 | chip_name = "RTL8187BvE"; | |
1148 | priv->hw_rev = RTL8187BvE; | |
1149 | break; | |
1150 | default: | |
1151 | chip_name = "RTL8187BvB (default)"; | |
1152 | priv->hw_rev = RTL8187BvB; | |
1153 | } | |
1154 | } | |
1155 | ||
0e25b4ef LF |
1156 | if (!priv->is_rtl8187b) { |
1157 | for (i = 0; i < 2; i++) { | |
1158 | eeprom_93cx6_read(&eeprom, | |
1159 | RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
1160 | &txpwr); | |
1161 | (*channel++).hw_value = txpwr & 0xFF; | |
1162 | (*channel++).hw_value = txpwr >> 8; | |
1163 | } | |
1164 | } else { | |
1165 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, | |
1166 | &txpwr); | |
1167 | (*channel++).hw_value = txpwr & 0xFF; | |
1168 | ||
1169 | eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); | |
1170 | (*channel++).hw_value = txpwr & 0xFF; | |
1171 | ||
1172 | eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); | |
1173 | (*channel++).hw_value = txpwr & 0xFF; | |
1174 | (*channel++).hw_value = txpwr >> 8; | |
1175 | } | |
1176 | ||
0ccd58fc | 1177 | if (priv->is_rtl8187b) { |
0e25b4ef LF |
1178 | printk(KERN_WARNING "rtl8187: 8187B chip detected. Support " |
1179 | "is EXPERIMENTAL, and could damage your\n" | |
1180 | " hardware, use at your own risk\n"); | |
0ccd58fc LF |
1181 | dev->flags |= IEEE80211_HW_SIGNAL_DBM; |
1182 | } else { | |
1183 | dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC; | |
1184 | dev->max_signal = 65; | |
1185 | } | |
1186 | ||
f59ac048 LR |
1187 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); |
1188 | ||
0e25b4ef LF |
1189 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) |
1190 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" | |
1191 | " info!\n"); | |
1192 | ||
f6532111 | 1193 | priv->rf = rtl8187_detect_rf(dev); |
0e25b4ef LF |
1194 | dev->extra_tx_headroom = (!priv->is_rtl8187b) ? |
1195 | sizeof(struct rtl8187_tx_hdr) : | |
1196 | sizeof(struct rtl8187b_tx_hdr); | |
1197 | if (!priv->is_rtl8187b) | |
1198 | dev->queues = 1; | |
1199 | else | |
1200 | dev->queues = 4; | |
605bebe2 MW |
1201 | |
1202 | err = ieee80211_register_hw(dev); | |
1203 | if (err) { | |
1204 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
1205 | goto err_free_dev; | |
1206 | } | |
7dcdd073 | 1207 | mutex_init(&priv->conf_mutex); |
605bebe2 | 1208 | |
6f7853f3 | 1209 | printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n", |
0795af57 | 1210 | wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr), |
6f7853f3 | 1211 | chip_name, priv->asic_rev, priv->rf->name); |
605bebe2 MW |
1212 | |
1213 | return 0; | |
1214 | ||
1215 | err_free_dev: | |
1216 | ieee80211_free_hw(dev); | |
1217 | usb_set_intfdata(intf, NULL); | |
1218 | usb_put_dev(udev); | |
1219 | return err; | |
1220 | } | |
1221 | ||
1222 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
1223 | { | |
1224 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
1225 | struct rtl8187_priv *priv; | |
1226 | ||
1227 | if (!dev) | |
1228 | return; | |
1229 | ||
1230 | ieee80211_unregister_hw(dev); | |
1231 | ||
1232 | priv = dev->priv; | |
1233 | usb_put_dev(interface_to_usbdev(intf)); | |
1234 | ieee80211_free_hw(dev); | |
1235 | } | |
1236 | ||
1237 | static struct usb_driver rtl8187_driver = { | |
1238 | .name = KBUILD_MODNAME, | |
1239 | .id_table = rtl8187_table, | |
1240 | .probe = rtl8187_probe, | |
500c1197 | 1241 | .disconnect = __devexit_p(rtl8187_disconnect), |
605bebe2 MW |
1242 | }; |
1243 | ||
1244 | static int __init rtl8187_init(void) | |
1245 | { | |
1246 | return usb_register(&rtl8187_driver); | |
1247 | } | |
1248 | ||
1249 | static void __exit rtl8187_exit(void) | |
1250 | { | |
1251 | usb_deregister(&rtl8187_driver); | |
1252 | } | |
1253 | ||
1254 | module_init(rtl8187_init); | |
1255 | module_exit(rtl8187_exit); |