Commit | Line | Data |
---|---|---|
605bebe2 MW |
1 | /* |
2 | * Linux device driver for RTL8187 | |
3 | * | |
4 | * Copyright 2007 Michael Wu <flamingice@sourmilk.net> | |
5 | * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> | |
6 | * | |
7 | * Based on the r8187 driver, which is: | |
8 | * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. | |
9 | * | |
3461fc12 LF |
10 | * The driver was extended to the RTL8187B in 2008 by: |
11 | * Herton Ronaldo Krzesinski <herton@mandriva.com.br> | |
12 | * Hin-Tak Leung <htl10@users.sourceforge.net> | |
13 | * Larry Finger <Larry.Finger@lwfinger.net> | |
14 | * | |
0aec00ae JL |
15 | * Magic delays and register offsets below are taken from the original |
16 | * r8187 driver sources. Thanks to Realtek for their support! | |
605bebe2 MW |
17 | * |
18 | * This program is free software; you can redistribute it and/or modify | |
19 | * it under the terms of the GNU General Public License version 2 as | |
20 | * published by the Free Software Foundation. | |
21 | */ | |
22 | ||
23 | #include <linux/init.h> | |
24 | #include <linux/usb.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/etherdevice.h> | |
27 | #include <linux/eeprom_93cx6.h> | |
28 | #include <net/mac80211.h> | |
29 | ||
30 | #include "rtl8187.h" | |
31 | #include "rtl8187_rtl8225.h" | |
32 | ||
33 | MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); | |
34 | MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); | |
3461fc12 LF |
35 | MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); |
36 | MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); | |
37 | MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); | |
f8a08c34 | 38 | MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); |
605bebe2 MW |
39 | MODULE_LICENSE("GPL"); |
40 | ||
41 | static struct usb_device_id rtl8187_table[] __devinitdata = { | |
7c7e6af3 AM |
42 | /* Asus */ |
43 | {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, | |
eaca90da FF |
44 | /* Belkin */ |
45 | {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, | |
605bebe2 | 46 | /* Realtek */ |
f8a08c34 HTL |
47 | {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, |
48 | {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, | |
49 | {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, | |
746db510 | 50 | {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, |
605bebe2 | 51 | /* Netgear */ |
f8a08c34 HTL |
52 | {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, |
53 | {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, | |
fcd7cc14 | 54 | {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, |
c3cf60a9 | 55 | /* HP */ |
f8a08c34 | 56 | {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, |
9934550d | 57 | /* Sitecom */ |
f8a08c34 | 58 | {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, |
f3c76918 | 59 | {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, |
8f7c41d4 IK |
60 | /* Abocom */ |
61 | {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, | |
605bebe2 MW |
62 | {} |
63 | }; | |
64 | ||
65 | MODULE_DEVICE_TABLE(usb, rtl8187_table); | |
66 | ||
8318d78a JB |
67 | static const struct ieee80211_rate rtl818x_rates[] = { |
68 | { .bitrate = 10, .hw_value = 0, }, | |
69 | { .bitrate = 20, .hw_value = 1, }, | |
70 | { .bitrate = 55, .hw_value = 2, }, | |
71 | { .bitrate = 110, .hw_value = 3, }, | |
72 | { .bitrate = 60, .hw_value = 4, }, | |
73 | { .bitrate = 90, .hw_value = 5, }, | |
74 | { .bitrate = 120, .hw_value = 6, }, | |
75 | { .bitrate = 180, .hw_value = 7, }, | |
76 | { .bitrate = 240, .hw_value = 8, }, | |
77 | { .bitrate = 360, .hw_value = 9, }, | |
78 | { .bitrate = 480, .hw_value = 10, }, | |
79 | { .bitrate = 540, .hw_value = 11, }, | |
80 | }; | |
81 | ||
82 | static const struct ieee80211_channel rtl818x_channels[] = { | |
83 | { .center_freq = 2412 }, | |
84 | { .center_freq = 2417 }, | |
85 | { .center_freq = 2422 }, | |
86 | { .center_freq = 2427 }, | |
87 | { .center_freq = 2432 }, | |
88 | { .center_freq = 2437 }, | |
89 | { .center_freq = 2442 }, | |
90 | { .center_freq = 2447 }, | |
91 | { .center_freq = 2452 }, | |
92 | { .center_freq = 2457 }, | |
93 | { .center_freq = 2462 }, | |
94 | { .center_freq = 2467 }, | |
95 | { .center_freq = 2472 }, | |
96 | { .center_freq = 2484 }, | |
97 | }; | |
98 | ||
4150c572 JB |
99 | static void rtl8187_iowrite_async_cb(struct urb *urb) |
100 | { | |
101 | kfree(urb->context); | |
102 | usb_free_urb(urb); | |
103 | } | |
104 | ||
105 | static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, | |
106 | void *data, u16 len) | |
107 | { | |
108 | struct usb_ctrlrequest *dr; | |
109 | struct urb *urb; | |
110 | struct rtl8187_async_write_data { | |
111 | u8 data[4]; | |
112 | struct usb_ctrlrequest dr; | |
113 | } *buf; | |
ea8ee240 | 114 | int rc; |
4150c572 JB |
115 | |
116 | buf = kmalloc(sizeof(*buf), GFP_ATOMIC); | |
117 | if (!buf) | |
118 | return; | |
119 | ||
120 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
121 | if (!urb) { | |
122 | kfree(buf); | |
123 | return; | |
124 | } | |
125 | ||
126 | dr = &buf->dr; | |
127 | ||
128 | dr->bRequestType = RTL8187_REQT_WRITE; | |
129 | dr->bRequest = RTL8187_REQ_SET_REG; | |
130 | dr->wValue = addr; | |
131 | dr->wIndex = 0; | |
132 | dr->wLength = cpu_to_le16(len); | |
133 | ||
134 | memcpy(buf, data, len); | |
135 | ||
136 | usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), | |
137 | (unsigned char *)dr, buf, len, | |
138 | rtl8187_iowrite_async_cb, buf); | |
ea8ee240 ON |
139 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
140 | if (rc < 0) { | |
141 | kfree(buf); | |
142 | usb_free_urb(urb); | |
143 | } | |
4150c572 JB |
144 | } |
145 | ||
146 | static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, | |
147 | __le32 *addr, u32 val) | |
148 | { | |
149 | __le32 buf = cpu_to_le32(val); | |
150 | ||
151 | rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), | |
152 | &buf, sizeof(buf)); | |
153 | } | |
154 | ||
605bebe2 MW |
155 | void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) |
156 | { | |
157 | struct rtl8187_priv *priv = dev->priv; | |
158 | ||
159 | data <<= 8; | |
160 | data |= addr | 0x80; | |
161 | ||
162 | rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); | |
163 | rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); | |
164 | rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); | |
165 | rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); | |
605bebe2 MW |
166 | } |
167 | ||
168 | static void rtl8187_tx_cb(struct urb *urb) | |
169 | { | |
605bebe2 | 170 | struct sk_buff *skb = (struct sk_buff *)urb->context; |
e039fa4a | 171 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
e6a9854b | 172 | struct ieee80211_hw *hw = info->rate_driver_data[0]; |
6f7853f3 | 173 | struct rtl8187_priv *priv = hw->priv; |
605bebe2 | 174 | |
e6a9854b | 175 | usb_free_urb(info->rate_driver_data[1]); |
6f7853f3 HTL |
176 | skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : |
177 | sizeof(struct rtl8187_tx_hdr)); | |
e6a9854b | 178 | ieee80211_tx_info_clear_status(info); |
3517afde HRK |
179 | |
180 | if (!urb->status && | |
181 | !(info->flags & IEEE80211_TX_CTL_NO_ACK) && | |
182 | priv->is_rtl8187b) { | |
183 | skb_queue_tail(&priv->b_tx_status.queue, skb); | |
184 | ||
185 | /* queue is "full", discard last items */ | |
186 | while (skb_queue_len(&priv->b_tx_status.queue) > 5) { | |
187 | struct sk_buff *old_skb; | |
188 | ||
189 | dev_dbg(&priv->udev->dev, | |
190 | "transmit status queue full\n"); | |
191 | ||
192 | old_skb = skb_dequeue(&priv->b_tx_status.queue); | |
193 | ieee80211_tx_status_irqsafe(hw, old_skb); | |
194 | } | |
195 | } else { | |
196 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && !urb->status) | |
197 | info->flags |= IEEE80211_TX_STAT_ACK; | |
198 | ieee80211_tx_status_irqsafe(hw, skb); | |
199 | } | |
605bebe2 MW |
200 | } |
201 | ||
e039fa4a | 202 | static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) |
605bebe2 MW |
203 | { |
204 | struct rtl8187_priv *priv = dev->priv; | |
e039fa4a | 205 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
6f7853f3 HTL |
206 | unsigned int ep; |
207 | void *buf; | |
605bebe2 | 208 | struct urb *urb; |
98798f48 MW |
209 | __le16 rts_dur = 0; |
210 | u32 flags; | |
ea8ee240 | 211 | int rc; |
605bebe2 MW |
212 | |
213 | urb = usb_alloc_urb(0, GFP_ATOMIC); | |
214 | if (!urb) { | |
215 | kfree_skb(skb); | |
216 | return 0; | |
217 | } | |
218 | ||
98798f48 | 219 | flags = skb->len; |
38e3b0d8 | 220 | flags |= RTL818X_TX_DESC_FLAG_NO_ENC; |
aa68cbfb | 221 | |
e039fa4a | 222 | flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; |
8b7b1e05 | 223 | if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control)) |
38e3b0d8 | 224 | flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; |
e6a9854b | 225 | if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { |
38e3b0d8 | 226 | flags |= RTL818X_TX_DESC_FLAG_RTS; |
e039fa4a | 227 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
32bfd35d | 228 | rts_dur = ieee80211_rts_duration(dev, priv->vif, |
e039fa4a | 229 | skb->len, info); |
e6a9854b | 230 | } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { |
38e3b0d8 | 231 | flags |= RTL818X_TX_DESC_FLAG_CTS; |
e039fa4a | 232 | flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; |
aa68cbfb | 233 | } |
98798f48 | 234 | |
6f7853f3 HTL |
235 | if (!priv->is_rtl8187b) { |
236 | struct rtl8187_tx_hdr *hdr = | |
237 | (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
238 | hdr->flags = cpu_to_le32(flags); | |
239 | hdr->len = 0; | |
240 | hdr->rts_duration = rts_dur; | |
3517afde | 241 | hdr->retry = cpu_to_le32(info->control.rates[0].count << 8); |
6f7853f3 HTL |
242 | buf = hdr; |
243 | ||
244 | ep = 2; | |
245 | } else { | |
246 | /* fc needs to be calculated before skb_push() */ | |
247 | unsigned int epmap[4] = { 6, 7, 5, 4 }; | |
248 | struct ieee80211_hdr *tx_hdr = | |
249 | (struct ieee80211_hdr *)(skb->data); | |
250 | u16 fc = le16_to_cpu(tx_hdr->frame_control); | |
251 | ||
252 | struct rtl8187b_tx_hdr *hdr = | |
253 | (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr)); | |
254 | struct ieee80211_rate *txrate = | |
255 | ieee80211_get_tx_rate(dev, info); | |
256 | memset(hdr, 0, sizeof(*hdr)); | |
257 | hdr->flags = cpu_to_le32(flags); | |
258 | hdr->rts_duration = rts_dur; | |
3517afde | 259 | hdr->retry = cpu_to_le32(info->control.rates[0].count << 8); |
6f7853f3 HTL |
260 | hdr->tx_duration = |
261 | ieee80211_generic_frame_duration(dev, priv->vif, | |
262 | skb->len, txrate); | |
263 | buf = hdr; | |
264 | ||
265 | if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) | |
266 | ep = 12; | |
267 | else | |
268 | ep = epmap[skb_get_queue_mapping(skb)]; | |
269 | } | |
605bebe2 | 270 | |
e6a9854b JB |
271 | info->rate_driver_data[0] = dev; |
272 | info->rate_driver_data[1] = urb; | |
6f7853f3 HTL |
273 | |
274 | usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), | |
275 | buf, skb->len, rtl8187_tx_cb, skb); | |
ea8ee240 ON |
276 | rc = usb_submit_urb(urb, GFP_ATOMIC); |
277 | if (rc < 0) { | |
278 | usb_free_urb(urb); | |
279 | kfree_skb(skb); | |
280 | } | |
605bebe2 MW |
281 | |
282 | return 0; | |
283 | } | |
284 | ||
285 | static void rtl8187_rx_cb(struct urb *urb) | |
286 | { | |
287 | struct sk_buff *skb = (struct sk_buff *)urb->context; | |
288 | struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; | |
289 | struct ieee80211_hw *dev = info->dev; | |
290 | struct rtl8187_priv *priv = dev->priv; | |
605bebe2 MW |
291 | struct ieee80211_rx_status rx_status = { 0 }; |
292 | int rate, signal; | |
4150c572 | 293 | u32 flags; |
0ccd58fc | 294 | u32 quality; |
605bebe2 MW |
295 | |
296 | spin_lock(&priv->rx_queue.lock); | |
297 | if (skb->next) | |
298 | __skb_unlink(skb, &priv->rx_queue); | |
299 | else { | |
300 | spin_unlock(&priv->rx_queue.lock); | |
301 | return; | |
302 | } | |
303 | spin_unlock(&priv->rx_queue.lock); | |
304 | ||
305 | if (unlikely(urb->status)) { | |
306 | usb_free_urb(urb); | |
307 | dev_kfree_skb_irq(skb); | |
308 | return; | |
309 | } | |
310 | ||
311 | skb_put(skb, urb->actual_length); | |
6f7853f3 HTL |
312 | if (!priv->is_rtl8187b) { |
313 | struct rtl8187_rx_hdr *hdr = | |
314 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
315 | flags = le32_to_cpu(hdr->flags); | |
316 | signal = hdr->signal & 0x7f; | |
317 | rx_status.antenna = (hdr->signal >> 7) & 1; | |
6f7853f3 HTL |
318 | rx_status.noise = hdr->noise; |
319 | rx_status.mactime = le64_to_cpu(hdr->mac_time); | |
6f7853f3 | 320 | priv->quality = signal; |
0ccd58fc | 321 | rx_status.qual = priv->quality; |
6f7853f3 | 322 | priv->noise = hdr->noise; |
0ccd58fc LF |
323 | rate = (flags >> 20) & 0xF; |
324 | if (rate > 3) { /* OFDM rate */ | |
325 | if (signal > 90) | |
326 | signal = 90; | |
327 | else if (signal < 25) | |
328 | signal = 25; | |
329 | signal = 90 - signal; | |
330 | } else { /* CCK rate */ | |
331 | if (signal > 95) | |
332 | signal = 95; | |
333 | else if (signal < 30) | |
334 | signal = 30; | |
335 | signal = 95 - signal; | |
336 | } | |
337 | rx_status.signal = signal; | |
338 | priv->signal = signal; | |
6f7853f3 HTL |
339 | } else { |
340 | struct rtl8187b_rx_hdr *hdr = | |
341 | (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); | |
0ccd58fc LF |
342 | /* The Realtek datasheet for the RTL8187B shows that the RX |
343 | * header contains the following quantities: signal quality, | |
344 | * RSSI, AGC, the received power in dB, and the measured SNR. | |
345 | * In testing, none of these quantities show qualitative | |
346 | * agreement with AP signal strength, except for the AGC, | |
347 | * which is inversely proportional to the strength of the | |
348 | * signal. In the following, the quality and signal strength | |
349 | * are derived from the AGC. The arbitrary scaling constants | |
350 | * are chosen to make the results close to the values obtained | |
351 | * for a BCM4312 using b43 as the driver. The noise is ignored | |
352 | * for now. | |
353 | */ | |
6f7853f3 | 354 | flags = le32_to_cpu(hdr->flags); |
0ccd58fc LF |
355 | quality = 170 - hdr->agc; |
356 | if (quality > 100) | |
357 | quality = 100; | |
358 | signal = 14 - hdr->agc / 2; | |
359 | rx_status.qual = quality; | |
360 | priv->quality = quality; | |
361 | rx_status.signal = signal; | |
362 | priv->signal = signal; | |
363 | rx_status.antenna = (hdr->rssi >> 7) & 1; | |
6f7853f3 | 364 | rx_status.mactime = le64_to_cpu(hdr->mac_time); |
0ccd58fc | 365 | rate = (flags >> 20) & 0xF; |
6f7853f3 | 366 | } |
605bebe2 | 367 | |
6f7853f3 | 368 | skb_trim(skb, flags & 0x0FFF); |
8318d78a JB |
369 | rx_status.rate_idx = rate; |
370 | rx_status.freq = dev->conf.channel->center_freq; | |
371 | rx_status.band = dev->conf.channel->band; | |
03bffc13 | 372 | rx_status.flag |= RX_FLAG_TSFT; |
38e3b0d8 | 373 | if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) |
4150c572 | 374 | rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; |
605bebe2 MW |
375 | ieee80211_rx_irqsafe(dev, skb, &rx_status); |
376 | ||
377 | skb = dev_alloc_skb(RTL8187_MAX_RX); | |
378 | if (unlikely(!skb)) { | |
379 | usb_free_urb(urb); | |
380 | /* TODO check rx queue length and refill *somewhere* */ | |
381 | return; | |
382 | } | |
383 | ||
384 | info = (struct rtl8187_rx_info *)skb->cb; | |
385 | info->urb = urb; | |
386 | info->dev = dev; | |
387 | urb->transfer_buffer = skb_tail_pointer(skb); | |
388 | urb->context = skb; | |
389 | skb_queue_tail(&priv->rx_queue, skb); | |
390 | ||
391 | usb_submit_urb(urb, GFP_ATOMIC); | |
392 | } | |
393 | ||
394 | static int rtl8187_init_urbs(struct ieee80211_hw *dev) | |
395 | { | |
396 | struct rtl8187_priv *priv = dev->priv; | |
397 | struct urb *entry; | |
398 | struct sk_buff *skb; | |
399 | struct rtl8187_rx_info *info; | |
400 | ||
401 | while (skb_queue_len(&priv->rx_queue) < 8) { | |
402 | skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); | |
403 | if (!skb) | |
404 | break; | |
405 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
406 | if (!entry) { | |
407 | kfree_skb(skb); | |
408 | break; | |
409 | } | |
410 | usb_fill_bulk_urb(entry, priv->udev, | |
6f7853f3 HTL |
411 | usb_rcvbulkpipe(priv->udev, |
412 | priv->is_rtl8187b ? 3 : 1), | |
605bebe2 MW |
413 | skb_tail_pointer(skb), |
414 | RTL8187_MAX_RX, rtl8187_rx_cb, skb); | |
415 | info = (struct rtl8187_rx_info *)skb->cb; | |
416 | info->urb = entry; | |
417 | info->dev = dev; | |
418 | skb_queue_tail(&priv->rx_queue, skb); | |
419 | usb_submit_urb(entry, GFP_KERNEL); | |
420 | } | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
3517afde HRK |
425 | static void rtl8187b_status_cb(struct urb *urb) |
426 | { | |
427 | struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; | |
428 | struct rtl8187_priv *priv = hw->priv; | |
429 | u64 val; | |
430 | unsigned int cmd_type; | |
431 | ||
432 | if (unlikely(urb->status)) { | |
433 | usb_free_urb(urb); | |
434 | return; | |
435 | } | |
436 | ||
437 | /* | |
438 | * Read from status buffer: | |
439 | * | |
440 | * bits [30:31] = cmd type: | |
441 | * - 0 indicates tx beacon interrupt | |
442 | * - 1 indicates tx close descriptor | |
443 | * | |
444 | * In the case of tx beacon interrupt: | |
445 | * [0:9] = Last Beacon CW | |
446 | * [10:29] = reserved | |
447 | * [30:31] = 00b | |
448 | * [32:63] = Last Beacon TSF | |
449 | * | |
450 | * If it's tx close descriptor: | |
451 | * [0:7] = Packet Retry Count | |
452 | * [8:14] = RTS Retry Count | |
453 | * [15] = TOK | |
454 | * [16:27] = Sequence No | |
455 | * [28] = LS | |
456 | * [29] = FS | |
457 | * [30:31] = 01b | |
458 | * [32:47] = unused (reserved?) | |
459 | * [48:63] = MAC Used Time | |
460 | */ | |
461 | val = le64_to_cpu(priv->b_tx_status.buf); | |
462 | ||
463 | cmd_type = (val >> 30) & 0x3; | |
464 | if (cmd_type == 1) { | |
465 | unsigned int pkt_rc, seq_no; | |
466 | bool tok; | |
467 | struct sk_buff *skb; | |
468 | struct ieee80211_hdr *ieee80211hdr; | |
469 | unsigned long flags; | |
470 | ||
471 | pkt_rc = val & 0xFF; | |
472 | tok = val & (1 << 15); | |
473 | seq_no = (val >> 16) & 0xFFF; | |
474 | ||
475 | spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); | |
476 | skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) { | |
477 | ieee80211hdr = (struct ieee80211_hdr *)skb->data; | |
478 | ||
479 | /* | |
480 | * While testing, it was discovered that the seq_no | |
481 | * doesn't actually contains the sequence number. | |
482 | * Instead of returning just the 12 bits of sequence | |
483 | * number, hardware is returning entire sequence control | |
484 | * (fragment number plus sequence number) in a 12 bit | |
485 | * only field overflowing after some time. As a | |
486 | * workaround, just consider the lower bits, and expect | |
487 | * it's unlikely we wrongly ack some sent data | |
488 | */ | |
489 | if ((le16_to_cpu(ieee80211hdr->seq_ctrl) | |
490 | & 0xFFF) == seq_no) | |
491 | break; | |
492 | } | |
493 | if (skb != (struct sk_buff *) &priv->b_tx_status.queue) { | |
494 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | |
495 | ||
496 | __skb_unlink(skb, &priv->b_tx_status.queue); | |
497 | if (tok) | |
498 | info->flags |= IEEE80211_TX_STAT_ACK; | |
1548c86a | 499 | info->status.rates[0].count = pkt_rc + 1; |
3517afde HRK |
500 | |
501 | ieee80211_tx_status_irqsafe(hw, skb); | |
502 | } | |
503 | spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); | |
504 | } | |
505 | ||
506 | usb_submit_urb(urb, GFP_ATOMIC); | |
507 | } | |
508 | ||
509 | static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) | |
510 | { | |
511 | struct rtl8187_priv *priv = dev->priv; | |
512 | struct urb *entry; | |
513 | ||
514 | entry = usb_alloc_urb(0, GFP_KERNEL); | |
515 | if (!entry) | |
516 | return -ENOMEM; | |
517 | priv->b_tx_status.urb = entry; | |
518 | ||
519 | usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), | |
520 | &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), | |
521 | rtl8187b_status_cb, dev); | |
522 | ||
523 | usb_submit_urb(entry, GFP_KERNEL); | |
524 | ||
525 | return 0; | |
526 | } | |
527 | ||
f8a08c34 | 528 | static int rtl8187_cmd_reset(struct ieee80211_hw *dev) |
605bebe2 MW |
529 | { |
530 | struct rtl8187_priv *priv = dev->priv; | |
531 | u8 reg; | |
532 | int i; | |
533 | ||
605bebe2 MW |
534 | reg = rtl818x_ioread8(priv, &priv->map->CMD); |
535 | reg &= (1 << 1); | |
536 | reg |= RTL818X_CMD_RESET; | |
537 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
538 | ||
539 | i = 10; | |
540 | do { | |
541 | msleep(2); | |
542 | if (!(rtl818x_ioread8(priv, &priv->map->CMD) & | |
543 | RTL818X_CMD_RESET)) | |
544 | break; | |
545 | } while (--i); | |
546 | ||
547 | if (!i) { | |
548 | printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy)); | |
549 | return -ETIMEDOUT; | |
550 | } | |
551 | ||
552 | /* reload registers from eeprom */ | |
553 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); | |
554 | ||
555 | i = 10; | |
556 | do { | |
557 | msleep(4); | |
558 | if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & | |
559 | RTL818X_EEPROM_CMD_CONFIG)) | |
560 | break; | |
561 | } while (--i); | |
562 | ||
563 | if (!i) { | |
564 | printk(KERN_ERR "%s: eeprom reset timeout!\n", | |
565 | wiphy_name(dev->wiphy)); | |
566 | return -ETIMEDOUT; | |
567 | } | |
568 | ||
f8a08c34 HTL |
569 | return 0; |
570 | } | |
571 | ||
572 | static int rtl8187_init_hw(struct ieee80211_hw *dev) | |
573 | { | |
574 | struct rtl8187_priv *priv = dev->priv; | |
575 | u8 reg; | |
576 | int res; | |
577 | ||
578 | /* reset */ | |
579 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
580 | RTL818X_EEPROM_CMD_CONFIG); | |
581 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
582 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | | |
583 | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
584 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
585 | RTL8187_RTL8225_ANAPARAM_ON); | |
586 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
587 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
588 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & |
589 | ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
590 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
591 | RTL818X_EEPROM_CMD_NORMAL); | |
592 | ||
593 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); | |
594 | ||
595 | msleep(200); | |
596 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); | |
597 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); | |
598 | rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); | |
599 | msleep(200); | |
600 | ||
601 | res = rtl8187_cmd_reset(dev); | |
602 | if (res) | |
603 | return res; | |
604 | ||
605bebe2 MW |
605 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
606 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
f8a08c34 HTL |
607 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
608 | reg | RTL818X_CONFIG3_ANAPARAM_WRITE); | |
4ece16a1 HRK |
609 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, |
610 | RTL8187_RTL8225_ANAPARAM_ON); | |
611 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, | |
612 | RTL8187_RTL8225_ANAPARAM2_ON); | |
f8a08c34 HTL |
613 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, |
614 | reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); | |
605bebe2 MW |
615 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
616 | ||
617 | /* setup card */ | |
618 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
619 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
620 | ||
621 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
622 | rtl818x_iowrite8(priv, &priv->map->GPIO, 1); | |
623 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
624 | ||
625 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 MW |
626 | |
627 | rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); | |
628 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
629 | reg &= 0x3F; | |
630 | reg |= 0x80; | |
631 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); | |
632 | ||
633 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
634 | ||
635 | rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); | |
636 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
637 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81); | |
638 | ||
639 | // TODO: set RESP_RATE and BRSR properly | |
640 | rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); | |
641 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
642 | ||
643 | /* host_usb_init */ | |
644 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); | |
645 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0); | |
646 | reg = rtl818x_ioread8(priv, (u8 *)0xFE53); | |
647 | rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); | |
648 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); | |
649 | rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20); | |
650 | rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); | |
651 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); | |
652 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); | |
653 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); | |
654 | msleep(100); | |
655 | ||
656 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); | |
657 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); | |
658 | rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); | |
f8a08c34 HTL |
659 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
660 | RTL818X_EEPROM_CMD_CONFIG); | |
605bebe2 | 661 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); |
f8a08c34 HTL |
662 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, |
663 | RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 MW |
664 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); |
665 | msleep(100); | |
666 | ||
f6532111 | 667 | priv->rf->init(dev); |
605bebe2 MW |
668 | |
669 | rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); | |
f6532111 MW |
670 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
671 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
672 | rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); |
673 | rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); | |
674 | rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); | |
f6532111 | 675 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
676 | |
677 | return 0; | |
678 | } | |
679 | ||
f8a08c34 HTL |
680 | static const u8 rtl8187b_reg_table[][3] = { |
681 | {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, | |
682 | {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, | |
683 | {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, | |
684 | {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, | |
685 | ||
686 | {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, | |
687 | {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, | |
688 | {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1}, | |
689 | {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1}, | |
690 | {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1}, | |
691 | {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, | |
692 | ||
693 | {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, | |
694 | {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, | |
695 | {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, | |
696 | {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, | |
697 | {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, | |
698 | {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, | |
699 | {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2}, | |
700 | {0x73, 0x9A, 2}, | |
701 | ||
702 | {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0}, | |
703 | {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, | |
704 | {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0}, | |
705 | {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, | |
706 | {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0}, | |
707 | ||
708 | {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, | |
709 | {0x8E, 0x08, 0}, {0x8F, 0x00, 0} | |
710 | }; | |
711 | ||
712 | static int rtl8187b_init_hw(struct ieee80211_hw *dev) | |
713 | { | |
714 | struct rtl8187_priv *priv = dev->priv; | |
715 | int res, i; | |
716 | u8 reg; | |
717 | ||
718 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
719 | RTL818X_EEPROM_CMD_CONFIG); | |
720 | ||
721 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
722 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT; | |
723 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
4ece16a1 HRK |
724 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, |
725 | RTL8187B_RTL8225_ANAPARAM2_ON); | |
726 | rtl818x_iowrite32(priv, &priv->map->ANAPARAM, | |
727 | RTL8187B_RTL8225_ANAPARAM_ON); | |
728 | rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, | |
729 | RTL8187B_RTL8225_ANAPARAM3_ON); | |
f8a08c34 HTL |
730 | |
731 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); | |
732 | reg = rtl818x_ioread8(priv, (u8 *)0xFF62); | |
733 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); | |
734 | rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); | |
735 | ||
736 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
737 | reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; | |
738 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
739 | ||
740 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
741 | RTL818X_EEPROM_CMD_NORMAL); | |
742 | ||
743 | res = rtl8187_cmd_reset(dev); | |
744 | if (res) | |
745 | return res; | |
746 | ||
747 | rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF); | |
748 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
749 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
750 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
751 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
752 | reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT | | |
753 | RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
754 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
755 | ||
756 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); | |
757 | reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK); | |
758 | reg |= RTL818X_RATE_FALLBACK_ENABLE; | |
759 | rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg); | |
760 | ||
761 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
762 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); | |
763 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); | |
764 | ||
765 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
766 | RTL818X_EEPROM_CMD_CONFIG); | |
767 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); | |
768 | rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); | |
769 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
770 | RTL818X_EEPROM_CMD_NORMAL); | |
771 | ||
772 | rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); | |
773 | for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { | |
774 | rtl818x_iowrite8_idx(priv, | |
775 | (u8 *)(uintptr_t) | |
776 | (rtl8187b_reg_table[i][0] | 0xFF00), | |
777 | rtl8187b_reg_table[i][1], | |
778 | rtl8187b_reg_table[i][2]); | |
779 | } | |
780 | ||
781 | rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); | |
782 | rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); | |
783 | ||
784 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); | |
785 | rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); | |
786 | rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); | |
787 | ||
788 | rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); | |
789 | ||
790 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); | |
791 | ||
792 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
793 | RTL818X_EEPROM_CMD_CONFIG); | |
794 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); | |
795 | reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; | |
796 | rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); | |
797 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, | |
798 | RTL818X_EEPROM_CMD_NORMAL); | |
799 | ||
800 | rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); | |
801 | rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); | |
802 | rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); | |
2f20596b | 803 | msleep(100); |
f8a08c34 HTL |
804 | |
805 | priv->rf->init(dev); | |
806 | ||
807 | reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; | |
808 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
809 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); | |
810 | ||
811 | rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); | |
812 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); | |
813 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
814 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
815 | rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); | |
816 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); | |
817 | rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); | |
818 | ||
819 | reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); | |
820 | rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); | |
821 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); | |
822 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); | |
823 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); | |
824 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); | |
825 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); | |
826 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); | |
827 | rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); | |
828 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); | |
829 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); | |
830 | rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); | |
831 | rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); | |
832 | ||
833 | rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); | |
834 | ||
835 | rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); | |
836 | ||
b4572a92 HRK |
837 | priv->slot_time = 0x9; |
838 | priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ | |
839 | priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ | |
840 | priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ | |
841 | priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ | |
842 | rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); | |
843 | ||
f8a08c34 HTL |
844 | return 0; |
845 | } | |
846 | ||
4150c572 | 847 | static int rtl8187_start(struct ieee80211_hw *dev) |
605bebe2 MW |
848 | { |
849 | struct rtl8187_priv *priv = dev->priv; | |
850 | u32 reg; | |
851 | int ret; | |
852 | ||
f8a08c34 HTL |
853 | ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : |
854 | rtl8187b_init_hw(dev); | |
605bebe2 MW |
855 | if (ret) |
856 | return ret; | |
857 | ||
7dcdd073 | 858 | mutex_lock(&priv->conf_mutex); |
f8a08c34 HTL |
859 | if (priv->is_rtl8187b) { |
860 | reg = RTL818X_RX_CONF_MGMT | | |
861 | RTL818X_RX_CONF_DATA | | |
862 | RTL818X_RX_CONF_BROADCAST | | |
863 | RTL818X_RX_CONF_NICMAC | | |
864 | RTL818X_RX_CONF_BSSID | | |
865 | (7 << 13 /* RX FIFO threshold NONE */) | | |
866 | (7 << 10 /* MAX RX DMA */) | | |
867 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
868 | RTL818X_RX_CONF_ONLYERLPKT | | |
869 | RTL818X_RX_CONF_MULTICAST; | |
870 | priv->rx_conf = reg; | |
871 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); | |
872 | ||
873 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
874 | RTL818X_TX_CONF_HW_SEQNUM | | |
875 | RTL818X_TX_CONF_DISREQQSIZE | | |
876 | (7 << 8 /* short retry limit */) | | |
877 | (7 << 0 /* long retry limit */) | | |
878 | (7 << 21 /* MAX TX DMA */)); | |
879 | rtl8187_init_urbs(dev); | |
3517afde | 880 | rtl8187b_init_status_urb(dev); |
7dcdd073 | 881 | mutex_unlock(&priv->conf_mutex); |
f8a08c34 HTL |
882 | return 0; |
883 | } | |
884 | ||
605bebe2 MW |
885 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); |
886 | ||
2fe14263 MW |
887 | rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); |
888 | rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); | |
889 | ||
605bebe2 MW |
890 | rtl8187_init_urbs(dev); |
891 | ||
892 | reg = RTL818X_RX_CONF_ONLYERLPKT | | |
893 | RTL818X_RX_CONF_RX_AUTORESETPHY | | |
894 | RTL818X_RX_CONF_BSSID | | |
895 | RTL818X_RX_CONF_MGMT | | |
605bebe2 MW |
896 | RTL818X_RX_CONF_DATA | |
897 | (7 << 13 /* RX FIFO threshold NONE */) | | |
898 | (7 << 10 /* MAX RX DMA */) | | |
899 | RTL818X_RX_CONF_BROADCAST | | |
605bebe2 | 900 | RTL818X_RX_CONF_NICMAC; |
605bebe2 | 901 | |
4150c572 | 902 | priv->rx_conf = reg; |
605bebe2 MW |
903 | rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); |
904 | ||
905 | reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); | |
906 | reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; | |
907 | reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; | |
908 | rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); | |
909 | ||
910 | reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); | |
911 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; | |
912 | reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; | |
913 | reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; | |
914 | rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); | |
915 | ||
916 | reg = RTL818X_TX_CONF_CW_MIN | | |
917 | (7 << 21 /* MAX TX DMA */) | | |
918 | RTL818X_TX_CONF_NO_ICV; | |
919 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
920 | ||
921 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
922 | reg |= RTL818X_CMD_TX_ENABLE; | |
923 | reg |= RTL818X_CMD_RX_ENABLE; | |
924 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
7dcdd073 | 925 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
926 | |
927 | return 0; | |
928 | } | |
929 | ||
4150c572 | 930 | static void rtl8187_stop(struct ieee80211_hw *dev) |
605bebe2 MW |
931 | { |
932 | struct rtl8187_priv *priv = dev->priv; | |
933 | struct rtl8187_rx_info *info; | |
934 | struct sk_buff *skb; | |
935 | u32 reg; | |
936 | ||
7dcdd073 | 937 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
938 | rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); |
939 | ||
940 | reg = rtl818x_ioread8(priv, &priv->map->CMD); | |
941 | reg &= ~RTL818X_CMD_TX_ENABLE; | |
942 | reg &= ~RTL818X_CMD_RX_ENABLE; | |
943 | rtl818x_iowrite8(priv, &priv->map->CMD, reg); | |
944 | ||
f6532111 | 945 | priv->rf->stop(dev); |
605bebe2 MW |
946 | |
947 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
948 | reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); | |
949 | rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); | |
950 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
951 | ||
952 | while ((skb = skb_dequeue(&priv->rx_queue))) { | |
953 | info = (struct rtl8187_rx_info *)skb->cb; | |
954 | usb_kill_urb(info->urb); | |
955 | kfree_skb(skb); | |
956 | } | |
3517afde HRK |
957 | while ((skb = skb_dequeue(&priv->b_tx_status.queue))) |
958 | dev_kfree_skb_any(skb); | |
959 | usb_kill_urb(priv->b_tx_status.urb); | |
7dcdd073 | 960 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
961 | } |
962 | ||
963 | static int rtl8187_add_interface(struct ieee80211_hw *dev, | |
964 | struct ieee80211_if_init_conf *conf) | |
965 | { | |
966 | struct rtl8187_priv *priv = dev->priv; | |
4150c572 | 967 | int i; |
605bebe2 | 968 | |
05c914fe | 969 | if (priv->mode != NL80211_IFTYPE_MONITOR) |
4150c572 | 970 | return -EOPNOTSUPP; |
605bebe2 MW |
971 | |
972 | switch (conf->type) { | |
05c914fe | 973 | case NL80211_IFTYPE_STATION: |
605bebe2 MW |
974 | priv->mode = conf->type; |
975 | break; | |
976 | default: | |
977 | return -EOPNOTSUPP; | |
978 | } | |
979 | ||
7dcdd073 | 980 | mutex_lock(&priv->conf_mutex); |
aa979a6a HRK |
981 | priv->vif = conf->vif; |
982 | ||
4150c572 JB |
983 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); |
984 | for (i = 0; i < ETH_ALEN; i++) | |
985 | rtl818x_iowrite8(priv, &priv->map->MAC[i], | |
986 | ((u8 *)conf->mac_addr)[i]); | |
987 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); | |
605bebe2 | 988 | |
7dcdd073 | 989 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
990 | return 0; |
991 | } | |
992 | ||
993 | static void rtl8187_remove_interface(struct ieee80211_hw *dev, | |
994 | struct ieee80211_if_init_conf *conf) | |
995 | { | |
996 | struct rtl8187_priv *priv = dev->priv; | |
7dcdd073 | 997 | mutex_lock(&priv->conf_mutex); |
05c914fe | 998 | priv->mode = NL80211_IFTYPE_MONITOR; |
aa979a6a | 999 | priv->vif = NULL; |
7dcdd073 | 1000 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1001 | } |
1002 | ||
e8975581 | 1003 | static int rtl8187_config(struct ieee80211_hw *dev, u32 changed) |
605bebe2 MW |
1004 | { |
1005 | struct rtl8187_priv *priv = dev->priv; | |
e8975581 | 1006 | struct ieee80211_conf *conf = &dev->conf; |
f6532111 MW |
1007 | u32 reg; |
1008 | ||
7dcdd073 | 1009 | mutex_lock(&priv->conf_mutex); |
f6532111 MW |
1010 | reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); |
1011 | /* Enable TX loopback on MAC level to avoid TX during channel | |
1012 | * changes, as this has be seen to causes problems and the | |
1013 | * card will stop work until next reset | |
1014 | */ | |
1015 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, | |
1016 | reg | RTL818X_TX_CONF_LOOPBACK_MAC); | |
f6532111 MW |
1017 | priv->rf->set_chan(dev, conf); |
1018 | msleep(10); | |
1019 | rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); | |
605bebe2 | 1020 | |
605bebe2 MW |
1021 | rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); |
1022 | rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); | |
1023 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); | |
1024 | rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); | |
7dcdd073 | 1025 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1026 | return 0; |
1027 | } | |
1028 | ||
32bfd35d JB |
1029 | static int rtl8187_config_interface(struct ieee80211_hw *dev, |
1030 | struct ieee80211_vif *vif, | |
605bebe2 MW |
1031 | struct ieee80211_if_conf *conf) |
1032 | { | |
1033 | struct rtl8187_priv *priv = dev->priv; | |
1034 | int i; | |
6f7853f3 | 1035 | u8 reg; |
605bebe2 | 1036 | |
7dcdd073 | 1037 | mutex_lock(&priv->conf_mutex); |
605bebe2 MW |
1038 | for (i = 0; i < ETH_ALEN; i++) |
1039 | rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]); | |
1040 | ||
6f7853f3 HTL |
1041 | if (is_valid_ether_addr(conf->bssid)) { |
1042 | reg = RTL818X_MSR_INFRA; | |
1043 | if (priv->is_rtl8187b) | |
1044 | reg |= RTL818X_MSR_ENEDCA; | |
1045 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | |
1046 | } else { | |
1047 | reg = RTL818X_MSR_NO_LINK; | |
1048 | rtl818x_iowrite8(priv, &priv->map->MSR, reg); | |
1049 | } | |
605bebe2 | 1050 | |
7dcdd073 | 1051 | mutex_unlock(&priv->conf_mutex); |
605bebe2 MW |
1052 | return 0; |
1053 | } | |
1054 | ||
b4572a92 HRK |
1055 | /* |
1056 | * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for | |
1057 | * example. Thus we have to use raw values for AC_*_PARAM register addresses. | |
1058 | */ | |
1059 | static __le32 *rtl8187b_ac_addr[4] = { | |
1060 | (__le32 *) 0xFFF0, /* AC_VO */ | |
1061 | (__le32 *) 0xFFF4, /* AC_VI */ | |
1062 | (__le32 *) 0xFFFC, /* AC_BK */ | |
1063 | (__le32 *) 0xFFF8, /* AC_BE */ | |
1064 | }; | |
1065 | ||
1066 | #define SIFS_TIME 0xa | |
1067 | ||
f8288317 HRK |
1068 | static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, |
1069 | bool use_short_preamble) | |
64761077 | 1070 | { |
f8288317 | 1071 | if (priv->is_rtl8187b) { |
b4572a92 | 1072 | u8 difs, eifs; |
f8288317 | 1073 | u16 ack_timeout; |
b4572a92 | 1074 | int queue; |
f8288317 HRK |
1075 | |
1076 | if (use_short_slot) { | |
b4572a92 | 1077 | priv->slot_time = 0x9; |
f8288317 HRK |
1078 | difs = 0x1c; |
1079 | eifs = 0x53; | |
1080 | } else { | |
b4572a92 | 1081 | priv->slot_time = 0x14; |
f8288317 HRK |
1082 | difs = 0x32; |
1083 | eifs = 0x5b; | |
1084 | } | |
54ac218a | 1085 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
b4572a92 | 1086 | rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); |
f8288317 HRK |
1087 | rtl818x_iowrite8(priv, &priv->map->DIFS, difs); |
1088 | ||
1089 | /* | |
1090 | * BRSR+1 on 8187B is in fact EIFS register | |
1091 | * Value in units of 4 us | |
1092 | */ | |
1093 | rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); | |
1094 | ||
1095 | /* | |
1096 | * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout | |
1097 | * register. In units of 4 us like eifs register | |
1098 | * ack_timeout = ack duration + plcp + difs + preamble | |
1099 | */ | |
1100 | ack_timeout = 112 + 48 + difs; | |
1101 | if (use_short_preamble) | |
1102 | ack_timeout += 72; | |
1103 | else | |
1104 | ack_timeout += 144; | |
1105 | rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, | |
1106 | DIV_ROUND_UP(ack_timeout, 4)); | |
b4572a92 HRK |
1107 | |
1108 | for (queue = 0; queue < 4; queue++) | |
1109 | rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], | |
1110 | priv->aifsn[queue] * priv->slot_time + | |
1111 | SIFS_TIME); | |
f8288317 | 1112 | } else { |
64761077 HRK |
1113 | rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); |
1114 | if (use_short_slot) { | |
1115 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); | |
1116 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); | |
1117 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); | |
64761077 HRK |
1118 | } else { |
1119 | rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); | |
1120 | rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); | |
1121 | rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); | |
64761077 HRK |
1122 | } |
1123 | } | |
1124 | } | |
1125 | ||
1126 | static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, | |
1127 | struct ieee80211_vif *vif, | |
1128 | struct ieee80211_bss_conf *info, | |
1129 | u32 changed) | |
1130 | { | |
1131 | struct rtl8187_priv *priv = dev->priv; | |
1132 | ||
f8288317 HRK |
1133 | if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) |
1134 | rtl8187_conf_erp(priv, info->use_short_slot, | |
1135 | info->use_short_preamble); | |
64761077 HRK |
1136 | } |
1137 | ||
4150c572 JB |
1138 | static void rtl8187_configure_filter(struct ieee80211_hw *dev, |
1139 | unsigned int changed_flags, | |
1140 | unsigned int *total_flags, | |
2fe14263 | 1141 | int mc_count, struct dev_addr_list *mclist) |
4150c572 JB |
1142 | { |
1143 | struct rtl8187_priv *priv = dev->priv; | |
1144 | ||
4150c572 JB |
1145 | if (changed_flags & FIF_FCSFAIL) |
1146 | priv->rx_conf ^= RTL818X_RX_CONF_FCS; | |
1147 | if (changed_flags & FIF_CONTROL) | |
1148 | priv->rx_conf ^= RTL818X_RX_CONF_CTRL; | |
1149 | if (changed_flags & FIF_OTHER_BSS) | |
1150 | priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; | |
2fe14263 | 1151 | if (*total_flags & FIF_ALLMULTI || mc_count > 0) |
4150c572 | 1152 | priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; |
2fe14263 MW |
1153 | else |
1154 | priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; | |
1155 | ||
1156 | *total_flags = 0; | |
4150c572 | 1157 | |
4150c572 JB |
1158 | if (priv->rx_conf & RTL818X_RX_CONF_FCS) |
1159 | *total_flags |= FIF_FCSFAIL; | |
1160 | if (priv->rx_conf & RTL818X_RX_CONF_CTRL) | |
1161 | *total_flags |= FIF_CONTROL; | |
1162 | if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) | |
1163 | *total_flags |= FIF_OTHER_BSS; | |
2fe14263 MW |
1164 | if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) |
1165 | *total_flags |= FIF_ALLMULTI; | |
4150c572 JB |
1166 | |
1167 | rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); | |
1168 | } | |
1169 | ||
b4572a92 HRK |
1170 | static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue, |
1171 | const struct ieee80211_tx_queue_params *params) | |
1172 | { | |
1173 | struct rtl8187_priv *priv = dev->priv; | |
1174 | u8 cw_min, cw_max; | |
1175 | ||
1176 | if (queue > 3) | |
1177 | return -EINVAL; | |
1178 | ||
1179 | cw_min = fls(params->cw_min); | |
1180 | cw_max = fls(params->cw_max); | |
1181 | ||
1182 | if (priv->is_rtl8187b) { | |
1183 | priv->aifsn[queue] = params->aifs; | |
1184 | ||
1185 | /* | |
1186 | * This is the structure of AC_*_PARAM registers in 8187B: | |
1187 | * - TXOP limit field, bit offset = 16 | |
1188 | * - ECWmax, bit offset = 12 | |
1189 | * - ECWmin, bit offset = 8 | |
1190 | * - AIFS, bit offset = 0 | |
1191 | */ | |
1192 | rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], | |
1193 | (params->txop << 16) | (cw_max << 12) | | |
1194 | (cw_min << 8) | (params->aifs * | |
1195 | priv->slot_time + SIFS_TIME)); | |
1196 | } else { | |
1197 | if (queue != 0) | |
1198 | return -EINVAL; | |
1199 | ||
1200 | rtl818x_iowrite8(priv, &priv->map->CW_VAL, | |
1201 | cw_min | (cw_max << 4)); | |
1202 | } | |
1203 | return 0; | |
1204 | } | |
1205 | ||
605bebe2 MW |
1206 | static const struct ieee80211_ops rtl8187_ops = { |
1207 | .tx = rtl8187_tx, | |
4150c572 | 1208 | .start = rtl8187_start, |
605bebe2 MW |
1209 | .stop = rtl8187_stop, |
1210 | .add_interface = rtl8187_add_interface, | |
1211 | .remove_interface = rtl8187_remove_interface, | |
1212 | .config = rtl8187_config, | |
1213 | .config_interface = rtl8187_config_interface, | |
64761077 | 1214 | .bss_info_changed = rtl8187_bss_info_changed, |
4150c572 | 1215 | .configure_filter = rtl8187_configure_filter, |
b4572a92 | 1216 | .conf_tx = rtl8187_conf_tx |
605bebe2 MW |
1217 | }; |
1218 | ||
1219 | static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) | |
1220 | { | |
1221 | struct ieee80211_hw *dev = eeprom->data; | |
1222 | struct rtl8187_priv *priv = dev->priv; | |
1223 | u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); | |
1224 | ||
1225 | eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; | |
1226 | eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; | |
1227 | eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; | |
1228 | eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; | |
1229 | } | |
1230 | ||
1231 | static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) | |
1232 | { | |
1233 | struct ieee80211_hw *dev = eeprom->data; | |
1234 | struct rtl8187_priv *priv = dev->priv; | |
1235 | u8 reg = RTL818X_EEPROM_CMD_PROGRAM; | |
1236 | ||
1237 | if (eeprom->reg_data_in) | |
1238 | reg |= RTL818X_EEPROM_CMD_WRITE; | |
1239 | if (eeprom->reg_data_out) | |
1240 | reg |= RTL818X_EEPROM_CMD_READ; | |
1241 | if (eeprom->reg_data_clock) | |
1242 | reg |= RTL818X_EEPROM_CMD_CK; | |
1243 | if (eeprom->reg_chip_select) | |
1244 | reg |= RTL818X_EEPROM_CMD_CS; | |
1245 | ||
1246 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); | |
1247 | udelay(10); | |
1248 | } | |
1249 | ||
1250 | static int __devinit rtl8187_probe(struct usb_interface *intf, | |
1251 | const struct usb_device_id *id) | |
1252 | { | |
1253 | struct usb_device *udev = interface_to_usbdev(intf); | |
1254 | struct ieee80211_hw *dev; | |
1255 | struct rtl8187_priv *priv; | |
1256 | struct eeprom_93cx6 eeprom; | |
1257 | struct ieee80211_channel *channel; | |
6f7853f3 | 1258 | const char *chip_name; |
605bebe2 MW |
1259 | u16 txpwr, reg; |
1260 | int err, i; | |
1261 | ||
1262 | dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); | |
1263 | if (!dev) { | |
1264 | printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); | |
1265 | return -ENOMEM; | |
1266 | } | |
1267 | ||
1268 | priv = dev->priv; | |
0e25b4ef | 1269 | priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); |
605bebe2 MW |
1270 | |
1271 | SET_IEEE80211_DEV(dev, &intf->dev); | |
1272 | usb_set_intfdata(intf, dev); | |
1273 | priv->udev = udev; | |
1274 | ||
1275 | usb_get_dev(udev); | |
1276 | ||
1277 | skb_queue_head_init(&priv->rx_queue); | |
8318d78a JB |
1278 | |
1279 | BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); | |
1280 | BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); | |
1281 | ||
605bebe2 MW |
1282 | memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); |
1283 | memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); | |
1284 | priv->map = (struct rtl818x_csr *)0xFF00; | |
8318d78a JB |
1285 | |
1286 | priv->band.band = IEEE80211_BAND_2GHZ; | |
1287 | priv->band.channels = priv->channels; | |
1288 | priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); | |
1289 | priv->band.bitrates = priv->rates; | |
1290 | priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); | |
1291 | dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; | |
1292 | ||
1293 | ||
05c914fe | 1294 | priv->mode = NL80211_IFTYPE_MONITOR; |
605bebe2 | 1295 | dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
0ccd58fc | 1296 | IEEE80211_HW_RX_INCLUDES_FCS; |
605bebe2 | 1297 | |
605bebe2 MW |
1298 | eeprom.data = dev; |
1299 | eeprom.register_read = rtl8187_eeprom_register_read; | |
1300 | eeprom.register_write = rtl8187_eeprom_register_write; | |
1301 | if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) | |
1302 | eeprom.width = PCI_EEPROM_WIDTH_93C66; | |
1303 | else | |
1304 | eeprom.width = PCI_EEPROM_WIDTH_93C46; | |
1305 | ||
1306 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); | |
1307 | udelay(10); | |
1308 | ||
1309 | eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, | |
1310 | (__le16 __force *)dev->wiphy->perm_addr, 3); | |
1311 | if (!is_valid_ether_addr(dev->wiphy->perm_addr)) { | |
1312 | printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " | |
1313 | "generated MAC address\n"); | |
1314 | random_ether_addr(dev->wiphy->perm_addr); | |
1315 | } | |
1316 | ||
1317 | channel = priv->channels; | |
1318 | for (i = 0; i < 3; i++) { | |
1319 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, | |
1320 | &txpwr); | |
8318d78a JB |
1321 | (*channel++).hw_value = txpwr & 0xFF; |
1322 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 MW |
1323 | } |
1324 | for (i = 0; i < 2; i++) { | |
1325 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, | |
1326 | &txpwr); | |
8318d78a JB |
1327 | (*channel++).hw_value = txpwr & 0xFF; |
1328 | (*channel++).hw_value = txpwr >> 8; | |
605bebe2 | 1329 | } |
605bebe2 MW |
1330 | |
1331 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, | |
1332 | &priv->txpwr_base); | |
1333 | ||
f6532111 MW |
1334 | reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; |
1335 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); | |
605bebe2 MW |
1336 | /* 0 means asic B-cut, we should use SW 3 wire |
1337 | * bit-by-bit banging for radio. 1 means we can use | |
1338 | * USB specific request to write radio registers */ | |
1339 | priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; | |
f6532111 | 1340 | rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); |
605bebe2 MW |
1341 | rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); |
1342 | ||
6f7853f3 HTL |
1343 | if (!priv->is_rtl8187b) { |
1344 | u32 reg32; | |
1345 | reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); | |
1346 | reg32 &= RTL818X_TX_CONF_HWVER_MASK; | |
1347 | switch (reg32) { | |
0e25b4ef LF |
1348 | case RTL818X_TX_CONF_R8187vD_B: |
1349 | /* Some RTL8187B devices have a USB ID of 0x8187 | |
1350 | * detect them here */ | |
1351 | chip_name = "RTL8187BvB(early)"; | |
1352 | priv->is_rtl8187b = 1; | |
1353 | priv->hw_rev = RTL8187BvB; | |
1354 | break; | |
1355 | case RTL818X_TX_CONF_R8187vD: | |
6f7853f3 HTL |
1356 | chip_name = "RTL8187vD"; |
1357 | break; | |
1358 | default: | |
1359 | chip_name = "RTL8187vB (default)"; | |
1360 | } | |
1361 | } else { | |
6f7853f3 HTL |
1362 | /* |
1363 | * Force USB request to write radio registers for 8187B, Realtek | |
1364 | * only uses it in their sources | |
1365 | */ | |
1366 | /*if (priv->asic_rev == 0) { | |
1367 | printk(KERN_WARNING "rtl8187: Forcing use of USB " | |
1368 | "requests to write to radio registers\n"); | |
1369 | priv->asic_rev = 1; | |
1370 | }*/ | |
1371 | switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { | |
1372 | case RTL818X_R8187B_B: | |
1373 | chip_name = "RTL8187BvB"; | |
1374 | priv->hw_rev = RTL8187BvB; | |
1375 | break; | |
1376 | case RTL818X_R8187B_D: | |
1377 | chip_name = "RTL8187BvD"; | |
1378 | priv->hw_rev = RTL8187BvD; | |
1379 | break; | |
1380 | case RTL818X_R8187B_E: | |
1381 | chip_name = "RTL8187BvE"; | |
1382 | priv->hw_rev = RTL8187BvE; | |
1383 | break; | |
1384 | default: | |
1385 | chip_name = "RTL8187BvB (default)"; | |
1386 | priv->hw_rev = RTL8187BvB; | |
1387 | } | |
1388 | } | |
1389 | ||
0e25b4ef LF |
1390 | if (!priv->is_rtl8187b) { |
1391 | for (i = 0; i < 2; i++) { | |
1392 | eeprom_93cx6_read(&eeprom, | |
1393 | RTL8187_EEPROM_TXPWR_CHAN_6 + i, | |
1394 | &txpwr); | |
1395 | (*channel++).hw_value = txpwr & 0xFF; | |
1396 | (*channel++).hw_value = txpwr >> 8; | |
1397 | } | |
1398 | } else { | |
1399 | eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, | |
1400 | &txpwr); | |
1401 | (*channel++).hw_value = txpwr & 0xFF; | |
1402 | ||
1403 | eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); | |
1404 | (*channel++).hw_value = txpwr & 0xFF; | |
1405 | ||
1406 | eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); | |
1407 | (*channel++).hw_value = txpwr & 0xFF; | |
1408 | (*channel++).hw_value = txpwr >> 8; | |
1409 | } | |
1410 | ||
0ccd58fc | 1411 | if (priv->is_rtl8187b) { |
c8f96974 | 1412 | printk(KERN_WARNING "rtl8187: 8187B chip detected.\n"); |
0ccd58fc LF |
1413 | dev->flags |= IEEE80211_HW_SIGNAL_DBM; |
1414 | } else { | |
1415 | dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC; | |
1416 | dev->max_signal = 65; | |
1417 | } | |
1418 | ||
94778280 JB |
1419 | /* |
1420 | * XXX: Once this driver supports anything that requires | |
1421 | * beacons it must implement IEEE80211_TX_CTL_ASSIGN_SEQ. | |
1422 | */ | |
f59ac048 LR |
1423 | dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); |
1424 | ||
0e25b4ef LF |
1425 | if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) |
1426 | printk(KERN_INFO "rtl8187: inconsistency between id with OEM" | |
1427 | " info!\n"); | |
1428 | ||
f6532111 | 1429 | priv->rf = rtl8187_detect_rf(dev); |
0e25b4ef LF |
1430 | dev->extra_tx_headroom = (!priv->is_rtl8187b) ? |
1431 | sizeof(struct rtl8187_tx_hdr) : | |
1432 | sizeof(struct rtl8187b_tx_hdr); | |
1433 | if (!priv->is_rtl8187b) | |
1434 | dev->queues = 1; | |
1435 | else | |
1436 | dev->queues = 4; | |
605bebe2 MW |
1437 | |
1438 | err = ieee80211_register_hw(dev); | |
1439 | if (err) { | |
1440 | printk(KERN_ERR "rtl8187: Cannot register device\n"); | |
1441 | goto err_free_dev; | |
1442 | } | |
7dcdd073 | 1443 | mutex_init(&priv->conf_mutex); |
3517afde | 1444 | skb_queue_head_init(&priv->b_tx_status.queue); |
605bebe2 | 1445 | |
e174961c JB |
1446 | printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n", |
1447 | wiphy_name(dev->wiphy), dev->wiphy->perm_addr, | |
6f7853f3 | 1448 | chip_name, priv->asic_rev, priv->rf->name); |
605bebe2 MW |
1449 | |
1450 | return 0; | |
1451 | ||
1452 | err_free_dev: | |
1453 | ieee80211_free_hw(dev); | |
1454 | usb_set_intfdata(intf, NULL); | |
1455 | usb_put_dev(udev); | |
1456 | return err; | |
1457 | } | |
1458 | ||
1459 | static void __devexit rtl8187_disconnect(struct usb_interface *intf) | |
1460 | { | |
1461 | struct ieee80211_hw *dev = usb_get_intfdata(intf); | |
1462 | struct rtl8187_priv *priv; | |
1463 | ||
1464 | if (!dev) | |
1465 | return; | |
1466 | ||
1467 | ieee80211_unregister_hw(dev); | |
1468 | ||
1469 | priv = dev->priv; | |
1470 | usb_put_dev(interface_to_usbdev(intf)); | |
1471 | ieee80211_free_hw(dev); | |
1472 | } | |
1473 | ||
1474 | static struct usb_driver rtl8187_driver = { | |
1475 | .name = KBUILD_MODNAME, | |
1476 | .id_table = rtl8187_table, | |
1477 | .probe = rtl8187_probe, | |
500c1197 | 1478 | .disconnect = __devexit_p(rtl8187_disconnect), |
605bebe2 MW |
1479 | }; |
1480 | ||
1481 | static int __init rtl8187_init(void) | |
1482 | { | |
1483 | return usb_register(&rtl8187_driver); | |
1484 | } | |
1485 | ||
1486 | static void __exit rtl8187_exit(void) | |
1487 | { | |
1488 | usb_deregister(&rtl8187_driver); | |
1489 | } | |
1490 | ||
1491 | module_init(rtl8187_init); | |
1492 | module_exit(rtl8187_exit); |