[deliverable/linux.git] / drivers / net / wireless / rtlwifi / btcoexist / halbtcoutsrc.h

/******************************************************************************
 *
 * Copyright(c) 2009-2012  Realtek Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of version 2 of the GNU General Public License as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * The full GNU General Public License is included in this distribution in the
 * file called LICENSE.
 *
 * Contact Information:
 * wlanfae <wlanfae@realtek.com>
 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
 * Hsinchu 300, Taiwan.
 *
 * Larry Finger <Larry.Finger@lwfinger.net>
 *
 *****************************************************************************/
#ifndef	__HALBTC_OUT_SRC_H__
#define __HALBTC_OUT_SRC_H__

#include	"../wifi.h"

#define		NORMAL_EXEC				false
#define		FORCE_EXEC				true

#define		BTC_RF_A				RF90_PATH_A
#define		BTC_RF_B				RF90_PATH_B
#define		BTC_RF_C				RF90_PATH_C
#define		BTC_RF_D				RF90_PATH_D

#define		BTC_SMSP				SINGLEMAC_SINGLEPHY
#define		BTC_DMDP				DUALMAC_DUALPHY
#define		BTC_DMSP				DUALMAC_SINGLEPHY
#define		BTC_MP_UNKNOWN				0xff

#define		IN
#define		OUT

#define		BT_TMP_BUF_SIZE				100

#define		BT_COEX_ANT_TYPE_PG			0
#define		BT_COEX_ANT_TYPE_ANTDIV			1
#define		BT_COEX_ANT_TYPE_DETECTED		2

#define		BTC_MIMO_PS_STATIC			0
#define		BTC_MIMO_PS_DYNAMIC			1

#define		BTC_RATE_DISABLE			0
#define		BTC_RATE_ENABLE				1

/* single Antenna definition */
#define		BTC_ANT_PATH_WIFI			0
#define		BTC_ANT_PATH_BT				1
#define		BTC_ANT_PATH_PTA			2
/* dual Antenna definition */
#define		BTC_ANT_WIFI_AT_MAIN			0
#define		BTC_ANT_WIFI_AT_AUX			1
/* coupler Antenna definition */
#define		BTC_ANT_WIFI_AT_CPL_MAIN		0
#define		BTC_ANT_WIFI_AT_CPL_AUX			1

enum btc_chip_interface {
	BTC_INTF_UNKNOWN	= 0,
	BTC_INTF_PCI		= 1,
	BTC_INTF_USB		= 2,
	BTC_INTF_SDIO		= 3,
	BTC_INTF_GSPI		= 4,
	BTC_INTF_MAX
};

enum btc_chip_type {
	BTC_CHIP_UNDEF		= 0,
	BTC_CHIP_CSR_BC4	= 1,
	BTC_CHIP_CSR_BC8	= 2,
	BTC_CHIP_RTL8723A	= 3,
	BTC_CHIP_RTL8821	= 4,
	BTC_CHIP_RTL8723B	= 5,
	BTC_CHIP_MAX
};

enum btc_msg_type {
	BTC_MSG_INTERFACE	= 0x0,
	BTC_MSG_ALGORITHM	= 0x1,
	BTC_MSG_MAX
};

extern u32 btc_dbg_type[];

/* following is for BTC_MSG_INTERFACE */
#define		INTF_INIT				BIT0
#define		INTF_NOTIFY				BIT2

/* following is for BTC_ALGORITHM */
#define		ALGO_BT_RSSI_STATE			BIT0
#define		ALGO_WIFI_RSSI_STATE			BIT1
#define		ALGO_BT_MONITOR				BIT2
#define		ALGO_TRACE				BIT3
#define		ALGO_TRACE_FW				BIT4
#define		ALGO_TRACE_FW_DETAIL			BIT5
#define		ALGO_TRACE_FW_EXEC			BIT6
#define		ALGO_TRACE_SW				BIT7
#define		ALGO_TRACE_SW_DETAIL			BIT8
#define		ALGO_TRACE_SW_EXEC			BIT9

/* following is for wifi link status */
#define		WIFI_STA_CONNECTED			BIT0
#define		WIFI_AP_CONNECTED			BIT1
#define		WIFI_HS_CONNECTED			BIT2
#define		WIFI_P2P_GO_CONNECTED			BIT3
#define		WIFI_P2P_GC_CONNECTED			BIT4

#define	BTC_PRINT(dbgtype, dbgflag, printstr, ...)		\
	do {							\
		if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) {\
			printk(printstr, ##__VA_ARGS__);	\
		}						\
	} while (0)

#define	BTC_RSSI_HIGH(_rssi_)	\
	((_rssi_ == BTC_RSSI_STATE_HIGH ||	\
	  _rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
#define	BTC_RSSI_MEDIUM(_rssi_)	\
	((_rssi_ == BTC_RSSI_STATE_MEDIUM ||	\
	  _rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
#define	BTC_RSSI_LOW(_rssi_)	\
	((_rssi_ == BTC_RSSI_STATE_LOW ||	\
	  _rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)

enum btc_power_save_type {
	BTC_PS_WIFI_NATIVE = 0,
	BTC_PS_LPS_ON = 1,
	BTC_PS_LPS_OFF = 2,
	BTC_PS_LPS_MAX
};

struct btc_board_info {
	/* The following is some board information */
	u8 bt_chip_type;
	u8 pg_ant_num;	/* pg ant number */
	u8 btdm_ant_num;	/* ant number for btdm */
	u8 btdm_ant_pos;
	bool bt_exist;
};

enum btc_dbg_opcode {
	BTC_DBG_SET_COEX_NORMAL = 0x0,
	BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
	BTC_DBG_SET_COEX_BT_ONLY = 0x2,
	BTC_DBG_MAX
};

enum btc_rssi_state {
	BTC_RSSI_STATE_HIGH = 0x0,
	BTC_RSSI_STATE_MEDIUM = 0x1,
	BTC_RSSI_STATE_LOW = 0x2,
	BTC_RSSI_STATE_STAY_HIGH = 0x3,
	BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
	BTC_RSSI_STATE_STAY_LOW = 0x5,
	BTC_RSSI_MAX
};

enum btc_wifi_role {
	BTC_ROLE_STATION = 0x0,
	BTC_ROLE_AP = 0x1,
	BTC_ROLE_IBSS = 0x2,
	BTC_ROLE_HS_MODE = 0x3,
	BTC_ROLE_MAX
};

enum btc_wifi_bw_mode {
	BTC_WIFI_BW_LEGACY = 0x0,
	BTC_WIFI_BW_HT20 = 0x1,
	BTC_WIFI_BW_HT40 = 0x2,
	BTC_WIFI_BW_MAX
};

enum btc_wifi_traffic_dir {
	BTC_WIFI_TRAFFIC_TX = 0x0,
	BTC_WIFI_TRAFFIC_RX = 0x1,
	BTC_WIFI_TRAFFIC_MAX
};

enum btc_wifi_pnp {
	BTC_WIFI_PNP_WAKE_UP = 0x0,
	BTC_WIFI_PNP_SLEEP = 0x1,
	BTC_WIFI_PNP_MAX
};

enum btc_get_type {
	/* type bool */
	BTC_GET_BL_HS_OPERATION,
	BTC_GET_BL_HS_CONNECTING,
	BTC_GET_BL_WIFI_CONNECTED,
	BTC_GET_BL_WIFI_BUSY,
	BTC_GET_BL_WIFI_SCAN,
	BTC_GET_BL_WIFI_LINK,
	BTC_GET_BL_WIFI_DHCP,
	BTC_GET_BL_WIFI_SOFTAP_IDLE,
	BTC_GET_BL_WIFI_SOFTAP_LINKING,
	BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
	BTC_GET_BL_WIFI_ROAM,
	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
	BTC_GET_BL_WIFI_UNDER_5G,
	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
	BTC_GET_BL_WIFI_UNDER_B_MODE,
	BTC_GET_BL_EXT_SWITCH,

	/* type s4Byte */
	BTC_GET_S4_WIFI_RSSI,
	BTC_GET_S4_HS_RSSI,

	/* type u32 */
	BTC_GET_U4_WIFI_BW,
	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
	BTC_GET_U4_WIFI_FW_VER,
	BTC_GET_U4_WIFI_LINK_STATUS,
	BTC_GET_U4_BT_PATCH_VER,

	/* type u1Byte */
	BTC_GET_U1_WIFI_DOT11_CHNL,
	BTC_GET_U1_WIFI_CENTRAL_CHNL,
	BTC_GET_U1_WIFI_HS_CHNL,
	BTC_GET_U1_MAC_PHY_MODE,
	BTC_GET_U1_AP_NUM,

	/* for 1Ant */
	BTC_GET_U1_LPS_MODE,
	BTC_GET_BL_BT_SCO_BUSY,

	/* for test mode */
	BTC_GET_DRIVER_TEST_CFG,
	BTC_GET_MAX
};

enum btc_set_type {
	/* type bool */
	BTC_SET_BL_BT_DISABLE,
	BTC_SET_BL_BT_TRAFFIC_BUSY,
	BTC_SET_BL_BT_LIMITED_DIG,
	BTC_SET_BL_FORCE_TO_ROAM,
	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
	BTC_SET_BL_BT_CTRL_AGG_SIZE,
	BTC_SET_BL_INC_SCAN_DEV_NUM,

	/* type u1Byte */
	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
	BTC_SET_UI_SCAN_SIG_COMPENSATION,
	BTC_SET_U1_AGG_BUF_SIZE,

	/* type trigger some action */
	BTC_SET_ACT_GET_BT_RSSI,
	BTC_SET_ACT_AGGREGATE_CTRL,

	/********* for 1Ant **********/
	/* type bool */
	BTC_SET_BL_BT_SCO_BUSY,
	/* type u1Byte */
	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
	BTC_SET_U1_LPS_VAL,
	BTC_SET_U1_RPWM_VAL,
	BTC_SET_U1_1ANT_LPS,
	BTC_SET_U1_1ANT_RPWM,
	/* type trigger some action */
	BTC_SET_ACT_LEAVE_LPS,
	BTC_SET_ACT_ENTER_LPS,
	BTC_SET_ACT_NORMAL_LPS,
	BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
	BTC_SET_ACT_DISABLE_LOW_POWER,
	BTC_SET_ACT_UPDATE_ra_mask,
	BTC_SET_ACT_SEND_MIMO_PS,
	/* BT Coex related */
	BTC_SET_ACT_CTRL_BT_INFO,
	BTC_SET_ACT_CTRL_BT_COEX,
	/***************************/
	BTC_SET_MAX
};

enum btc_dbg_disp_type {
	BTC_DBG_DISP_COEX_STATISTICS = 0x0,
	BTC_DBG_DISP_BT_LINK_INFO = 0x1,
	BTC_DBG_DISP_BT_FW_VER = 0x2,
	BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
	BTC_DBG_DISP_MAX
};

enum btc_notify_type_ips {
	BTC_IPS_LEAVE = 0x0,
	BTC_IPS_ENTER = 0x1,
	BTC_IPS_MAX
};

enum btc_notify_type_lps {
	BTC_LPS_DISABLE = 0x0,
	BTC_LPS_ENABLE = 0x1,
	BTC_LPS_MAX
};

enum btc_notify_type_scan {
	BTC_SCAN_FINISH = 0x0,
	BTC_SCAN_START = 0x1,
	BTC_SCAN_MAX
};

enum btc_notify_type_associate {
	BTC_ASSOCIATE_FINISH = 0x0,
	BTC_ASSOCIATE_START = 0x1,
	BTC_ASSOCIATE_MAX
};

enum btc_notify_type_media_status {
	BTC_MEDIA_DISCONNECT = 0x0,
	BTC_MEDIA_CONNECT = 0x1,
	BTC_MEDIA_MAX
};

enum btc_notify_type_special_packet {
	BTC_PACKET_UNKNOWN = 0x0,
	BTC_PACKET_DHCP = 0x1,
	BTC_PACKET_ARP = 0x2,
	BTC_PACKET_EAPOL = 0x3,
	BTC_PACKET_MAX
};

enum hci_ext_bt_operation {
	HCI_BT_OP_NONE = 0x0,
	HCI_BT_OP_INQUIRY_START = 0x1,
	HCI_BT_OP_INQUIRY_FINISH = 0x2,
	HCI_BT_OP_PAGING_START = 0x3,
	HCI_BT_OP_PAGING_SUCCESS = 0x4,
	HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
	HCI_BT_OP_PAIRING_START = 0x6,
	HCI_BT_OP_PAIRING_FINISH = 0x7,
	HCI_BT_OP_BT_DEV_ENABLE = 0x8,
	HCI_BT_OP_BT_DEV_DISABLE = 0x9,
	HCI_BT_OP_MAX
};

enum btc_notify_type_stack_operation {
	BTC_STACK_OP_NONE = 0x0,
	BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
	BTC_STACK_OP_MAX
};

typedef u8 (*bfp_btc_r1)(void *btc_context, u32 reg_addr);

typedef u16 (*bfp_btc_r2)(void *btc_context, u32 reg_addr);

typedef u32 (*bfp_btc_r4)(void *btc_context, u32 reg_addr);

typedef void (*bfp_btc_w1)(void *btc_context, u32 reg_addr, u32 data);

typedef void (*bfp_btc_w1_bit_mak)(void *btc_context, u32 reg_addr,
				   u8 bit_mask, u8 data1b);

typedef void (*bfp_btc_w2)(void *btc_context, u32 reg_addr, u16 data);

typedef void (*bfp_btc_w4)(void *btc_context, u32 reg_addr, u32 data);

typedef void (*bfp_btc_wr_1byte_bit_mask)(void *btc_context, u32 reg_addr,
					  u8 bit_mask, u8 data);

typedef void (*bfp_btc_set_bb_reg)(void *btc_context, u32 reg_addr,
				   u32 bit_mask, u32 data);

typedef u32 (*bfp_btc_get_bb_reg)(void *btc_context, u32 reg_addr,
				  u32 bit_mask);

typedef void (*bfp_btc_set_rf_reg)(void *btc_context, u8 rf_path, u32 reg_addr,
				   u32 bit_mask, u32 data);

typedef u32 (*bfp_btc_get_rf_reg)(void *btc_context, u8 rf_path,
				  u32 reg_addr, u32 bit_mask);

typedef void (*bfp_btc_fill_h2c)(void *btc_context, u8 element_id,
				 u32 cmd_len, u8 *cmd_buffer);

typedef	bool (*bfp_btc_get)(void *btcoexist, u8 get_type, void *out_buf);

typedef	bool (*bfp_btc_set)(void *btcoexist, u8 set_type, void *in_buf);

typedef void (*bfp_btc_disp_dbg_msg)(void *btcoexist, u8 disp_type);

struct btc_bt_info {
	bool bt_disabled;
	u8 rssi_adjust_for_agc_table_on;
	u8 rssi_adjust_for_1ant_coex_type;
	bool bt_busy;
	u8 agg_buf_size;
	bool limited_dig;
	bool reject_agg_pkt;
	bool bt_ctrl_buf_size;
	bool increase_scan_dev_num;
	u16 bt_hci_ver;
	u16 bt_real_fw_ver;
	u8 bt_fw_ver;

	bool bt_disable_low_pwr;

	/* the following is for 1Ant solution */
	bool bt_ctrl_lps;
	bool bt_pwr_save_mode;
	bool bt_lps_on;
	bool force_to_roam;
	u8 force_exec_pwr_cmd_cnt;
	u8 lps_val;
	u8 rpwm_val;
	u32 ra_mask;
};

struct btc_stack_info {
	bool profile_notified;
	u16 hci_version;	/* stack hci version */
	u8 num_of_link;
	bool bt_link_exist;
	bool sco_exist;
	bool acl_exist;
	bool a2dp_exist;
	bool hid_exist;
	u8 num_of_hid;
	bool pan_exist;
	bool unknown_acl_exist;
	char min_bt_rssi;
};

struct btc_statistics {
	u32 cnt_bind;
	u32 cnt_init_hw_config;
	u32 cnt_init_coex_dm;
	u32 cnt_ips_notify;
	u32 cnt_lps_notify;
	u32 cnt_scan_notify;
	u32 cnt_connect_notify;
	u32 cnt_media_status_notify;
	u32 cnt_special_packet_notify;
	u32 cnt_bt_info_notify;
	u32 cnt_periodical;
	u32 cnt_coex_dm_switch;
	u32 cnt_stack_operation_notify;
	u32 cnt_dbg_ctrl;
};

struct btc_bt_link_info {
	bool bt_link_exist;
	bool sco_exist;
	bool sco_only;
	bool a2dp_exist;
	bool a2dp_only;
	bool hid_exist;
	bool hid_only;
	bool pan_exist;
	bool pan_only;
};

enum btc_antenna_pos {
	BTC_ANTENNA_AT_MAIN_PORT = 0x1,
	BTC_ANTENNA_AT_AUX_PORT = 0x2,
};

struct btc_coexist {
	/* make sure only one adapter can bind the data context  */
	bool binded;
	/* default adapter */
	void *adapter;
	struct btc_board_info board_info;
	/* some bt info referenced by non-bt module */
	struct btc_bt_info bt_info;
	struct btc_stack_info stack_info;
	enum btc_chip_interface	chip_interface;
	struct btc_bt_link_info bt_link_info;

	bool initilized;
	bool stop_coex_dm;
	bool manual_control;
	struct btc_statistics statistics;
	u8 pwr_mode_val[10];

	/* function pointers - io related */
	bfp_btc_r1 btc_read_1byte;
	bfp_btc_w1 btc_write_1byte;
	bfp_btc_w1_bit_mak btc_write_1byte_bitmask;
	bfp_btc_r2 btc_read_2byte;
	bfp_btc_w2 btc_write_2byte;
	bfp_btc_r4 btc_read_4byte;
	bfp_btc_w4 btc_write_4byte;

	bfp_btc_set_bb_reg btc_set_bb_reg;
	bfp_btc_get_bb_reg btc_get_bb_reg;

	bfp_btc_set_rf_reg btc_set_rf_reg;
	bfp_btc_get_rf_reg btc_get_rf_reg;

	bfp_btc_fill_h2c btc_fill_h2c;

	bfp_btc_disp_dbg_msg btc_disp_dbg_msg;

	bfp_btc_get btc_get;
	bfp_btc_set btc_set;
};

bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);

extern struct btc_coexist gl_bt_coexist;

bool exhalbtc_initlize_variables(struct rtl_priv *adapter);
void exhalbtc_init_hw_config(struct btc_coexist *btcoexist);
void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
				 enum rt_media_status media_status);
void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
void exhalbtc_bt_info_notify(struct btc_coexist *btcoexist, u8 *tmp_buf,
			     u8 length);
void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
void exhalbtc_periodical(struct btc_coexist *btcoexist);
void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
			  u8 *data);
void exhalbtc_stack_update_profile_info(void);
void exhalbtc_set_hci_version(u16 hci_version);
void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version);
void exhalbtc_update_min_bt_rssi(char bt_rssi);
void exhalbtc_set_bt_exist(bool bt_exist);
void exhalbtc_set_chip_type(u8 chip_type);
void exhalbtc_set_ant_num(u8 type, u8 ant_num);
void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist);
void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
				  u8 *rssi_wifi, u8 *rssi_bt);
void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);

#endif
Commit	Line	Data
aa45a673 LF	1	/******************************************************************************
	2	*
	3	* Copyright(c) 2009-2012 Realtek Corporation.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of version 2 of the GNU General Public License as
	7	* published by the Free Software Foundation.
	8	*
	9	* This program is distributed in the hope that it will be useful, but WITHOUT
	10	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	11	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	12	* more details.
	13	*
	14	* The full GNU General Public License is included in this distribution in the
	15	* file called LICENSE.
	16	*
	17	* Contact Information:
	18	* wlanfae <wlanfae@realtek.com>
	19	* Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
	20	* Hsinchu 300, Taiwan.
	21	*
	22	* Larry Finger <Larry.Finger@lwfinger.net>
	23	*
	24	*****************************************************************************/
	25	#ifndef __HALBTC_OUT_SRC_H__
	26	#define __HALBTC_OUT_SRC_H__
	27
	28	#include "../wifi.h"
	29
	30	#define NORMAL_EXEC false
	31	#define FORCE_EXEC true
	32
	33	#define BTC_RF_A RF90_PATH_A
	34	#define BTC_RF_B RF90_PATH_B
	35	#define BTC_RF_C RF90_PATH_C
	36	#define BTC_RF_D RF90_PATH_D
	37
	38	#define BTC_SMSP SINGLEMAC_SINGLEPHY
	39	#define BTC_DMDP DUALMAC_DUALPHY
	40	#define BTC_DMSP DUALMAC_SINGLEPHY
	41	#define BTC_MP_UNKNOWN 0xff
	42
	43	#define IN
	44	#define OUT
	45
	46	#define BT_TMP_BUF_SIZE 100
	47
	48	#define BT_COEX_ANT_TYPE_PG 0
	49	#define BT_COEX_ANT_TYPE_ANTDIV 1
	50	#define BT_COEX_ANT_TYPE_DETECTED 2
	51
	52	#define BTC_MIMO_PS_STATIC 0
	53	#define BTC_MIMO_PS_DYNAMIC 1
	54
	55	#define BTC_RATE_DISABLE 0
	56	#define BTC_RATE_ENABLE 1
	57
e79fff28 LF	58	/* single Antenna definition */
	59	#define BTC_ANT_PATH_WIFI 0
	60	#define BTC_ANT_PATH_BT 1
	61	#define BTC_ANT_PATH_PTA 2
	62	/* dual Antenna definition */
	63	#define BTC_ANT_WIFI_AT_MAIN 0
	64	#define BTC_ANT_WIFI_AT_AUX 1
	65	/* coupler Antenna definition */
	66	#define BTC_ANT_WIFI_AT_CPL_MAIN 0
	67	#define BTC_ANT_WIFI_AT_CPL_AUX 1
	68
aa45a673 LF	69	enum btc_chip_interface {
	70	BTC_INTF_UNKNOWN = 0,
	71	BTC_INTF_PCI = 1,
	72	BTC_INTF_USB = 2,
	73	BTC_INTF_SDIO = 3,
	74	BTC_INTF_GSPI = 4,
	75	BTC_INTF_MAX
	76	};
	77
ed364abf	78	enum btc_chip_type {
aa45a673 LF	79	BTC_CHIP_UNDEF = 0,
	80	BTC_CHIP_CSR_BC4 = 1,
	81	BTC_CHIP_CSR_BC8 = 2,
	82	BTC_CHIP_RTL8723A = 3,
	83	BTC_CHIP_RTL8821 = 4,
	84	BTC_CHIP_RTL8723B = 5,
	85	BTC_CHIP_MAX
	86	};
	87
ed364abf	88	enum btc_msg_type {
aa45a673 LF	89	BTC_MSG_INTERFACE = 0x0,
	90	BTC_MSG_ALGORITHM = 0x1,
	91	BTC_MSG_MAX
	92	};
ed364abf	93
aa45a673 LF	94	extern u32 btc_dbg_type[];
	95
	96	/* following is for BTC_MSG_INTERFACE */
	97	#define INTF_INIT BIT0
	98	#define INTF_NOTIFY BIT2
	99
	100	/* following is for BTC_ALGORITHM */
	101	#define ALGO_BT_RSSI_STATE BIT0
	102	#define ALGO_WIFI_RSSI_STATE BIT1
	103	#define ALGO_BT_MONITOR BIT2
	104	#define ALGO_TRACE BIT3
	105	#define ALGO_TRACE_FW BIT4
	106	#define ALGO_TRACE_FW_DETAIL BIT5
	107	#define ALGO_TRACE_FW_EXEC BIT6
	108	#define ALGO_TRACE_SW BIT7
	109	#define ALGO_TRACE_SW_DETAIL BIT8
	110	#define ALGO_TRACE_SW_EXEC BIT9
	111
ed364abf LF	112	/* following is for wifi link status */
	113	#define WIFI_STA_CONNECTED BIT0
	114	#define WIFI_AP_CONNECTED BIT1
	115	#define WIFI_HS_CONNECTED BIT2
	116	#define WIFI_P2P_GO_CONNECTED BIT3
	117	#define WIFI_P2P_GC_CONNECTED BIT4
aa45a673	118
aa45a673 LF	119	#define BTC_PRINT(dbgtype, dbgflag, printstr, ...) \
	120	do { \
	121	if (unlikely(btc_dbg_type[dbgtype] & dbgflag)) {\
	122	printk(printstr, ##__VA_ARGS__); \
	123	} \
	124	} while (0)
	125
e79fff28 LF	126	#define BTC_RSSI_HIGH(_rssi_) \
	127	((_rssi_ == BTC_RSSI_STATE_HIGH \|\| \
	128	_rssi_ == BTC_RSSI_STATE_STAY_HIGH) ? true : false)
	129	#define BTC_RSSI_MEDIUM(_rssi_) \
	130	((_rssi_ == BTC_RSSI_STATE_MEDIUM \|\| \
	131	_rssi_ == BTC_RSSI_STATE_STAY_MEDIUM) ? true : false)
	132	#define BTC_RSSI_LOW(_rssi_) \
	133	((_rssi_ == BTC_RSSI_STATE_LOW \|\| \
	134	_rssi_ == BTC_RSSI_STATE_STAY_LOW) ? true : false)
	135
aa45a673 LF	136	enum btc_power_save_type {
	137	BTC_PS_WIFI_NATIVE = 0,
	138	BTC_PS_LPS_ON = 1,
	139	BTC_PS_LPS_OFF = 2,
	140	BTC_PS_LPS_MAX
	141	};
	142
	143	struct btc_board_info {
	144	/* The following is some board information */
	145	u8 bt_chip_type;
	146	u8 pg_ant_num; /* pg ant number */
	147	u8 btdm_ant_num; /* ant number for btdm */
	148	u8 btdm_ant_pos;
	149	bool bt_exist;
	150	};
	151
	152	enum btc_dbg_opcode {
	153	BTC_DBG_SET_COEX_NORMAL = 0x0,
	154	BTC_DBG_SET_COEX_WIFI_ONLY = 0x1,
	155	BTC_DBG_SET_COEX_BT_ONLY = 0x2,
	156	BTC_DBG_MAX
	157	};
	158
	159	enum btc_rssi_state {
	160	BTC_RSSI_STATE_HIGH = 0x0,
	161	BTC_RSSI_STATE_MEDIUM = 0x1,
	162	BTC_RSSI_STATE_LOW = 0x2,
	163	BTC_RSSI_STATE_STAY_HIGH = 0x3,
	164	BTC_RSSI_STATE_STAY_MEDIUM = 0x4,
	165	BTC_RSSI_STATE_STAY_LOW = 0x5,
	166	BTC_RSSI_MAX
	167	};
	168
	169	enum btc_wifi_role {
	170	BTC_ROLE_STATION = 0x0,
	171	BTC_ROLE_AP = 0x1,
	172	BTC_ROLE_IBSS = 0x2,
	173	BTC_ROLE_HS_MODE = 0x3,
	174	BTC_ROLE_MAX
	175	};
	176
	177	enum btc_wifi_bw_mode {
	178	BTC_WIFI_BW_LEGACY = 0x0,
	179	BTC_WIFI_BW_HT20 = 0x1,
	180	BTC_WIFI_BW_HT40 = 0x2,
	181	BTC_WIFI_BW_MAX
	182	};
	183
	184	enum btc_wifi_traffic_dir {
	185	BTC_WIFI_TRAFFIC_TX = 0x0,
	186	BTC_WIFI_TRAFFIC_RX = 0x1,
	187	BTC_WIFI_TRAFFIC_MAX
	188	};
	189
	190	enum btc_wifi_pnp {
	191	BTC_WIFI_PNP_WAKE_UP = 0x0,
	192	BTC_WIFI_PNP_SLEEP = 0x1,
	193	BTC_WIFI_PNP_MAX
	194	};
	195
aa45a673 LF	196	enum btc_get_type {
	197	/* type bool */
	198	BTC_GET_BL_HS_OPERATION,
	199	BTC_GET_BL_HS_CONNECTING,
	200	BTC_GET_BL_WIFI_CONNECTED,
	201	BTC_GET_BL_WIFI_BUSY,
	202	BTC_GET_BL_WIFI_SCAN,
	203	BTC_GET_BL_WIFI_LINK,
	204	BTC_GET_BL_WIFI_DHCP,
	205	BTC_GET_BL_WIFI_SOFTAP_IDLE,
	206	BTC_GET_BL_WIFI_SOFTAP_LINKING,
	207	BTC_GET_BL_WIFI_IN_EARLY_SUSPEND,
	208	BTC_GET_BL_WIFI_ROAM,
	209	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
	210	BTC_GET_BL_WIFI_UNDER_5G,
	211	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
	212	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
	213	BTC_GET_BL_WIFI_UNDER_B_MODE,
	214	BTC_GET_BL_EXT_SWITCH,
	215
	216	/* type s4Byte */
	217	BTC_GET_S4_WIFI_RSSI,
	218	BTC_GET_S4_HS_RSSI,
	219
	220	/* type u32 */
	221	BTC_GET_U4_WIFI_BW,
	222	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
	223	BTC_GET_U4_WIFI_FW_VER,
ed364abf	224	BTC_GET_U4_WIFI_LINK_STATUS,
aa45a673 LF	225	BTC_GET_U4_BT_PATCH_VER,
	226
	227	/* type u1Byte */
	228	BTC_GET_U1_WIFI_DOT11_CHNL,
	229	BTC_GET_U1_WIFI_CENTRAL_CHNL,
	230	BTC_GET_U1_WIFI_HS_CHNL,
	231	BTC_GET_U1_MAC_PHY_MODE,
e79fff28	232	BTC_GET_U1_AP_NUM,
aa45a673 LF	233
	234	/* for 1Ant */
	235	BTC_GET_U1_LPS_MODE,
	236	BTC_GET_BL_BT_SCO_BUSY,
	237
	238	/* for test mode */
	239	BTC_GET_DRIVER_TEST_CFG,
	240	BTC_GET_MAX
	241	};
	242
aa45a673 LF	243	enum btc_set_type {
	244	/* type bool */
	245	BTC_SET_BL_BT_DISABLE,
	246	BTC_SET_BL_BT_TRAFFIC_BUSY,
	247	BTC_SET_BL_BT_LIMITED_DIG,
	248	BTC_SET_BL_FORCE_TO_ROAM,
	249	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
	250	BTC_SET_BL_BT_CTRL_AGG_SIZE,
	251	BTC_SET_BL_INC_SCAN_DEV_NUM,
	252
	253	/* type u1Byte */
	254	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
aa45a673 LF	255	BTC_SET_UI_SCAN_SIG_COMPENSATION,
	256	BTC_SET_U1_AGG_BUF_SIZE,
	257
	258	/* type trigger some action */
	259	BTC_SET_ACT_GET_BT_RSSI,
	260	BTC_SET_ACT_AGGREGATE_CTRL,
	261
	262	/******* for 1Ant ********/
	263	/* type bool */
	264	BTC_SET_BL_BT_SCO_BUSY,
	265	/* type u1Byte */
ed364abf LF	266	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
	267	BTC_SET_U1_LPS_VAL,
	268	BTC_SET_U1_RPWM_VAL,
aa45a673 LF	269	BTC_SET_U1_1ANT_LPS,
	270	BTC_SET_U1_1ANT_RPWM,
	271	/* type trigger some action */
	272	BTC_SET_ACT_LEAVE_LPS,
	273	BTC_SET_ACT_ENTER_LPS,
	274	BTC_SET_ACT_NORMAL_LPS,
	275	BTC_SET_ACT_INC_FORCE_EXEC_PWR_CMD_CNT,
	276	BTC_SET_ACT_DISABLE_LOW_POWER,
	277	BTC_SET_ACT_UPDATE_ra_mask,
	278	BTC_SET_ACT_SEND_MIMO_PS,
	279	/* BT Coex related */
	280	BTC_SET_ACT_CTRL_BT_INFO,
	281	BTC_SET_ACT_CTRL_BT_COEX,
	282	/***************************/
	283	BTC_SET_MAX
	284	};
	285
	286	enum btc_dbg_disp_type {
	287	BTC_DBG_DISP_COEX_STATISTICS = 0x0,
	288	BTC_DBG_DISP_BT_LINK_INFO = 0x1,
	289	BTC_DBG_DISP_BT_FW_VER = 0x2,
	290	BTC_DBG_DISP_FW_PWR_MODE_CMD = 0x3,
	291	BTC_DBG_DISP_MAX
	292	};
	293
	294	enum btc_notify_type_ips {
	295	BTC_IPS_LEAVE = 0x0,
	296	BTC_IPS_ENTER = 0x1,
	297	BTC_IPS_MAX
	298	};
	299
	300	enum btc_notify_type_lps {
	301	BTC_LPS_DISABLE = 0x0,
	302	BTC_LPS_ENABLE = 0x1,
	303	BTC_LPS_MAX
	304	};
	305
	306	enum btc_notify_type_scan {
	307	BTC_SCAN_FINISH = 0x0,
	308	BTC_SCAN_START = 0x1,
	309	BTC_SCAN_MAX
	310	};
	311
	312	enum btc_notify_type_associate {
	313	BTC_ASSOCIATE_FINISH = 0x0,
	314	BTC_ASSOCIATE_START = 0x1,
	315	BTC_ASSOCIATE_MAX
	316	};
	317
	318	enum btc_notify_type_media_status {
	319	BTC_MEDIA_DISCONNECT = 0x0,
	320	BTC_MEDIA_CONNECT = 0x1,
	321	BTC_MEDIA_MAX
	322	};
	323
	324	enum btc_notify_type_special_packet {
	325	BTC_PACKET_UNKNOWN = 0x0,
	326	BTC_PACKET_DHCP = 0x1,
	327	BTC_PACKET_ARP = 0x2,
	328	BTC_PACKET_EAPOL = 0x3,
	329	BTC_PACKET_MAX
	330	};
	331
ed364abf LF	332	enum hci_ext_bt_operation {
	333	HCI_BT_OP_NONE = 0x0,
	334	HCI_BT_OP_INQUIRY_START = 0x1,
	335	HCI_BT_OP_INQUIRY_FINISH = 0x2,
	336	HCI_BT_OP_PAGING_START = 0x3,
	337	HCI_BT_OP_PAGING_SUCCESS = 0x4,
	338	HCI_BT_OP_PAGING_UNSUCCESS = 0x5,
	339	HCI_BT_OP_PAIRING_START = 0x6,
	340	HCI_BT_OP_PAIRING_FINISH = 0x7,
	341	HCI_BT_OP_BT_DEV_ENABLE = 0x8,
	342	HCI_BT_OP_BT_DEV_DISABLE = 0x9,
	343	HCI_BT_OP_MAX
	344	};
	345
aa45a673 LF	346	enum btc_notify_type_stack_operation {
	347	BTC_STACK_OP_NONE = 0x0,
	348	BTC_STACK_OP_INQ_PAGE_PAIR_START = 0x1,
	349	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH = 0x2,
	350	BTC_STACK_OP_MAX
	351	};
	352
aa45a673 LF	353	typedef u8 (bfp_btc_r1)(void btc_context, u32 reg_addr);
	354
	355	typedef u16 (bfp_btc_r2)(void btc_context, u32 reg_addr);
	356
	357	typedef u32 (bfp_btc_r4)(void btc_context, u32 reg_addr);
	358
dbb30ebe	359	typedef void (bfp_btc_w1)(void btc_context, u32 reg_addr, u32 data);
aa45a673 LF	360
aa45a673 LF	361	typedef void (bfp_btc_w1_bit_mak)(void btc_context, u32 reg_addr,
ed364abf	362	u8 bit_mask, u8 data1b);
aa45a673 LF	363
	364	typedef void (bfp_btc_w2)(void btc_context, u32 reg_addr, u16 data);
	365
	366	typedef void (bfp_btc_w4)(void btc_context, u32 reg_addr, u32 data);
	367
	368	typedef void (bfp_btc_wr_1byte_bit_mask)(void btc_context, u32 reg_addr,
	369	u8 bit_mask, u8 data);
	370
	371	typedef void (bfp_btc_set_bb_reg)(void btc_context, u32 reg_addr,
	372	u32 bit_mask, u32 data);
	373
	374	typedef u32 (bfp_btc_get_bb_reg)(void btc_context, u32 reg_addr,
	375	u32 bit_mask);
	376
	377	typedef void (bfp_btc_set_rf_reg)(void btc_context, u8 rf_path, u32 reg_addr,
	378	u32 bit_mask, u32 data);
	379
	380	typedef u32 (bfp_btc_get_rf_reg)(void btc_context, u8 rf_path,
	381	u32 reg_addr, u32 bit_mask);
	382
	383	typedef void (bfp_btc_fill_h2c)(void btc_context, u8 element_id,
	384	u32 cmd_len, u8 *cmd_buffer);
	385
	386	typedef bool (bfp_btc_get)(void btcoexist, u8 get_type, void *out_buf);
	387
	388	typedef bool (bfp_btc_set)(void btcoexist, u8 set_type, void *in_buf);
	389
	390	typedef void (bfp_btc_disp_dbg_msg)(void btcoexist, u8 disp_type);
	391
	392	struct btc_bt_info {
	393	bool bt_disabled;
	394	u8 rssi_adjust_for_agc_table_on;
	395	u8 rssi_adjust_for_1ant_coex_type;
	396	bool bt_busy;
	397	u8 agg_buf_size;
	398	bool limited_dig;
	399	bool reject_agg_pkt;
ed364abf	400	bool bt_ctrl_buf_size;
aa45a673 LF	401	bool increase_scan_dev_num;
	402	u16 bt_hci_ver;
	403	u16 bt_real_fw_ver;
	404	u8 bt_fw_ver;
	405
ed364abf LF	406	bool bt_disable_low_pwr;
ed364abf LF	407
aa45a673 LF	408	/* the following is for 1Ant solution */
	409	bool bt_ctrl_lps;
	410	bool bt_pwr_save_mode;
	411	bool bt_lps_on;
	412	bool force_to_roam;
	413	u8 force_exec_pwr_cmd_cnt;
ed364abf LF	414	u8 lps_val;
ed364abf LF	415	u8 rpwm_val;
aa45a673 LF	416	u32 ra_mask;
	417	};
	418
	419	struct btc_stack_info {
	420	bool profile_notified;
	421	u16 hci_version; /* stack hci version */
	422	u8 num_of_link;
	423	bool bt_link_exist;
	424	bool sco_exist;
	425	bool acl_exist;
	426	bool a2dp_exist;
	427	bool hid_exist;
	428	u8 num_of_hid;
	429	bool pan_exist;
	430	bool unknown_acl_exist;
	431	char min_bt_rssi;
	432	};
	433
	434	struct btc_statistics {
	435	u32 cnt_bind;
	436	u32 cnt_init_hw_config;
	437	u32 cnt_init_coex_dm;
	438	u32 cnt_ips_notify;
	439	u32 cnt_lps_notify;
	440	u32 cnt_scan_notify;
	441	u32 cnt_connect_notify;
	442	u32 cnt_media_status_notify;
	443	u32 cnt_special_packet_notify;
	444	u32 cnt_bt_info_notify;
	445	u32 cnt_periodical;
ed364abf	446	u32 cnt_coex_dm_switch;
aa45a673 LF	447	u32 cnt_stack_operation_notify;
	448	u32 cnt_dbg_ctrl;
	449	};
	450
	451	struct btc_bt_link_info {
	452	bool bt_link_exist;
	453	bool sco_exist;
	454	bool sco_only;
	455	bool a2dp_exist;
	456	bool a2dp_only;
	457	bool hid_exist;
	458	bool hid_only;
	459	bool pan_exist;
	460	bool pan_only;
	461	};
	462
	463	enum btc_antenna_pos {
	464	BTC_ANTENNA_AT_MAIN_PORT = 0x1,
	465	BTC_ANTENNA_AT_AUX_PORT = 0x2,
	466	};
	467
	468	struct btc_coexist {
	469	/* make sure only one adapter can bind the data context */
	470	bool binded;
	471	/* default adapter */
	472	void *adapter;
	473	struct btc_board_info board_info;
	474	/* some bt info referenced by non-bt module */
	475	struct btc_bt_info bt_info;
	476	struct btc_stack_info stack_info;
	477	enum btc_chip_interface chip_interface;
	478	struct btc_bt_link_info bt_link_info;
	479
	480	bool initilized;
	481	bool stop_coex_dm;
	482	bool manual_control;
aa45a673 LF	483	struct btc_statistics statistics;
	484	u8 pwr_mode_val[10];
	485
	486	/* function pointers - io related */
	487	bfp_btc_r1 btc_read_1byte;
	488	bfp_btc_w1 btc_write_1byte;
	489	bfp_btc_w1_bit_mak btc_write_1byte_bitmask;
	490	bfp_btc_r2 btc_read_2byte;
	491	bfp_btc_w2 btc_write_2byte;
	492	bfp_btc_r4 btc_read_4byte;
	493	bfp_btc_w4 btc_write_4byte;
	494
	495	bfp_btc_set_bb_reg btc_set_bb_reg;
	496	bfp_btc_get_bb_reg btc_get_bb_reg;
	497
aa45a673 LF	498	bfp_btc_set_rf_reg btc_set_rf_reg;
	499	bfp_btc_get_rf_reg btc_get_rf_reg;
	500
	501	bfp_btc_fill_h2c btc_fill_h2c;
	502
	503	bfp_btc_disp_dbg_msg btc_disp_dbg_msg;
	504
	505	bfp_btc_get btc_get;
	506	bfp_btc_set btc_set;
	507	};
	508
	509	bool halbtc_is_wifi_uplink(struct rtl_priv *adapter);
	510
	511	extern struct btc_coexist gl_bt_coexist;
	512
	513	bool exhalbtc_initlize_variables(struct rtl_priv *adapter);
	514	void exhalbtc_init_hw_config(struct btc_coexist *btcoexist);
	515	void exhalbtc_init_coex_dm(struct btc_coexist *btcoexist);
	516	void exhalbtc_ips_notify(struct btc_coexist *btcoexist, u8 type);
	517	void exhalbtc_lps_notify(struct btc_coexist *btcoexist, u8 type);
	518	void exhalbtc_scan_notify(struct btc_coexist *btcoexist, u8 type);
	519	void exhalbtc_connect_notify(struct btc_coexist *btcoexist, u8 action);
	520	void exhalbtc_mediastatus_notify(struct btc_coexist *btcoexist,
ed364abf	521	enum rt_media_status media_status);
aa45a673 LF	522	void exhalbtc_special_packet_notify(struct btc_coexist *btcoexist, u8 pkt_type);
	523	void exhalbtc_bt_info_notify(struct btc_coexist btcoexist, u8 tmp_buf,
	524	u8 length);
	525	void exhalbtc_stack_operation_notify(struct btc_coexist *btcoexist, u8 type);
	526	void exhalbtc_halt_notify(struct btc_coexist *btcoexist);
	527	void exhalbtc_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state);
ed364abf	528	void exhalbtc_coex_dm_switch(struct btc_coexist *btcoexist);
aa45a673 LF	529	void exhalbtc_periodical(struct btc_coexist *btcoexist);
	530	void exhalbtc_dbg_control(struct btc_coexist *btcoexist, u8 code, u8 len,
	531	u8 *data);
	532	void exhalbtc_stack_update_profile_info(void);
	533	void exhalbtc_set_hci_version(u16 hci_version);
	534	void exhalbtc_set_bt_patch_version(u16 bt_hci_version, u16 bt_patch_version);
	535	void exhalbtc_update_min_bt_rssi(char bt_rssi);
	536	void exhalbtc_set_bt_exist(bool bt_exist);
	537	void exhalbtc_set_chip_type(u8 chip_type);
	538	void exhalbtc_set_ant_num(u8 type, u8 ant_num);
	539	void exhalbtc_display_bt_coex_info(struct btc_coexist *btcoexist);
	540	void exhalbtc_signal_compensation(struct btc_coexist *btcoexist,
	541	u8 rssi_wifi, u8 rssi_bt);
	542	void exhalbtc_lps_leave(struct btc_coexist *btcoexist);
	543	void exhalbtc_low_wifi_traffic_notify(struct btc_coexist *btcoexist);
	544
	545	#endif