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rtlwifi: rtl8192ce: rtl8192cu: rtl8192de: rtl8192se: rtl8723ae: rtl8723be: rtl8188eu...
[deliverable/linux.git] / drivers / net / wireless / rtlwifi / rtl8192se / trx.c
CommitLineData
84f494ce
CL		 1/******************************************************************************
2 *
ca742cd9 3 * Copyright(c) 2009-2012 Realtek Corporation.
84f494ce
CL		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#include "../wifi.h"
31#include "../pci.h"
32#include "../base.h"
2455c92c 33#include "../stats.h"
84f494ce
CL		 34#include "reg.h"
35#include "def.h"
36#include "phy.h"
37#include "fw.h"
38#include "trx.h"
39#include "led.h"
40
41static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
42{
43 __le16 fc = rtl_get_fc(skb);
44
45 if (unlikely(ieee80211_is_beacon(fc)))
46 return QSLT_BEACON;
2455c92c 47 if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
84f494ce
CL		 48 return QSLT_MGNT;
49 if (ieee80211_is_nullfunc(fc))
50 return QSLT_HIGH;
51
52 return skb->priority;
53}
54
84f494ce
CL		 55static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
56 struct rtl_stats *pstats, u8 *pdesc,
57 struct rx_fwinfo *p_drvinfo,
58 bool packet_match_bssid,
59 bool packet_toself,
60 bool packet_beacon)
61{
62 struct rtl_priv *rtlpriv = rtl_priv(hw);
63 struct phy_sts_cck_8192s_t *cck_buf;
2455c92c 64 struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
84f494ce
CL		 65 s8 rx_pwr_all = 0, rx_pwr[4];
66 u8 rf_rx_num = 0, evm, pwdb_all;
67 u8 i, max_spatial_stream;
68 u32 rssi, total_rssi = 0;
5c079d88 69 bool is_cck = pstats->is_cck;
84f494ce 70
84f494ce
CL		 71 pstats->packet_matchbssid = packet_match_bssid;
72 pstats->packet_toself = packet_toself;
84f494ce 73 pstats->packet_beacon = packet_beacon;
da17fcff
LF		 74 pstats->rx_mimo_sig_qual[0] = -1;
75 pstats->rx_mimo_sig_qual[1] = -1;
84f494ce 76
5c079d88 77 if (is_cck) {
84f494ce
CL		 78 u8 report, cck_highpwr;
79 cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
80
2455c92c 81 if (ppsc->rfpwr_state == ERFON)
84f494ce
CL		 82 cck_highpwr = (u8) rtl_get_bbreg(hw,
83 RFPGA0_XA_HSSIPARAMETER2,
84 0x200);
85 else
86 cck_highpwr = false;
87
88 if (!cck_highpwr) {
89 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
90 report = cck_buf->cck_agc_rpt & 0xc0;
91 report = report >> 6;
92 switch (report) {
93 case 0x3:
94 rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
95 break;
96 case 0x2:
97 rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
98 break;
99 case 0x1:
100 rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
101 break;
102 case 0x0:
103 rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
104 break;
105 }
106 } else {
107 u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
108 report = p_drvinfo->cfosho[0] & 0x60;
109 report = report >> 5;
110 switch (report) {
111 case 0x3:
112 rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
113 break;
114 case 0x2:
115 rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
116 break;
117 case 0x1:
118 rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
119 break;
120 case 0x0:
121 rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
122 break;
123 }
124 }
125
2455c92c 126 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
84f494ce
CL		 127
128 /* CCK gain is smaller than OFDM/MCS gain, */
129 /* so we add gain diff by experiences, the val is 6 */
130 pwdb_all += 6;
131 if (pwdb_all > 100)
132 pwdb_all = 100;
133 /* modify the offset to make the same gain index with OFDM. */
134 if (pwdb_all > 34 && pwdb_all <= 42)
135 pwdb_all -= 2;
136 else if (pwdb_all > 26 && pwdb_all <= 34)
137 pwdb_all -= 6;
138 else if (pwdb_all > 14 && pwdb_all <= 26)
139 pwdb_all -= 8;
140 else if (pwdb_all > 4 && pwdb_all <= 14)
141 pwdb_all -= 4;
142
143 pstats->rx_pwdb_all = pwdb_all;
144 pstats->recvsignalpower = rx_pwr_all;
145
146 if (packet_match_bssid) {
147 u8 sq;
148 if (pstats->rx_pwdb_all > 40) {
149 sq = 100;
150 } else {
151 sq = cck_buf->sq_rpt;
152 if (sq > 64)
153 sq = 0;
154 else if (sq < 20)
155 sq = 100;
156 else
157 sq = ((64 - sq) * 100) / 44;
158 }
159
160 pstats->signalquality = sq;
da17fcff
LF		 161 pstats->rx_mimo_sig_qual[0] = sq;
162 pstats->rx_mimo_sig_qual[1] = -1;
84f494ce
CL		 163 }
164 } else {
165 rtlpriv->dm.rfpath_rxenable[0] =
166 rtlpriv->dm.rfpath_rxenable[1] = true;
2455c92c 167 for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
84f494ce
CL		 168 if (rtlpriv->dm.rfpath_rxenable[i])
169 rf_rx_num++;
170
171 rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
172 0x3f) * 2) - 110;
2455c92c 173 rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
84f494ce
CL		 174 total_rssi += rssi;
175 rtlpriv->stats.rx_snr_db[i] =
176 (long)(p_drvinfo->rxsnr[i] / 2);
177
178 if (packet_match_bssid)
179 pstats->rx_mimo_signalstrength[i] = (u8) rssi;
180 }
181
182 rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
2455c92c 183 pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
84f494ce
CL		 184 pstats->rx_pwdb_all = pwdb_all;
185 pstats->rxpower = rx_pwr_all;
186 pstats->recvsignalpower = rx_pwr_all;
187
5c079d88
CL		 188 if (pstats->is_ht && pstats->rate >= DESC92_RATEMCS8 &&
189 pstats->rate <= DESC92_RATEMCS15)
84f494ce
CL		 190 max_spatial_stream = 2;
191 else
192 max_spatial_stream = 1;
193
194 for (i = 0; i < max_spatial_stream; i++) {
2455c92c 195 evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
84f494ce
CL		 196
197 if (packet_match_bssid) {
198 if (i == 0)
199 pstats->signalquality = (u8)(evm &
200 0xff);
da17fcff 201 pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff);
84f494ce
CL		 202 }
203 }
204 }
205
5c079d88 206 if (is_cck)
2455c92c 207 pstats->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
84f494ce
CL		 208 pwdb_all));
209 else if (rf_rx_num != 0)
2455c92c 210 pstats->signalstrength = (u8) (rtl_signal_scale_mapping(hw,
84f494ce
CL		 211 total_rssi /= rf_rx_num));
212}
213
84f494ce
CL		 214static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
215 struct sk_buff *skb, struct rtl_stats *pstats,
216 u8 *pdesc, struct rx_fwinfo *p_drvinfo)
217{
218 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
219 struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
220
221 struct ieee80211_hdr *hdr;
222 u8 *tmp_buf;
223 u8 *praddr;
84f494ce
CL		 224 __le16 fc;
225 u16 type, cfc;
eee569e4 226 bool packet_matchbssid, packet_toself, packet_beacon = false;
84f494ce
CL		 227
228 tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
229
230 hdr = (struct ieee80211_hdr *)tmp_buf;
231 fc = hdr->frame_control;
232 cfc = le16_to_cpu(fc);
233 type = WLAN_FC_GET_TYPE(fc);
234 praddr = hdr->addr1;
84f494ce
CL		 235
236 packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
2e42e474
JP		 237 ether_addr_equal(mac->bssid,
238 (cfc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
239 (cfc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
240 hdr->addr3) &&
241 (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
84f494ce
CL		 242
243 packet_toself = packet_matchbssid &&
2e42e474 244 ether_addr_equal(praddr, rtlefuse->dev_addr);
84f494ce
CL		 245
246 if (ieee80211_is_beacon(fc))
247 packet_beacon = true;
248
249 _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
250 packet_matchbssid, packet_toself, packet_beacon);
2455c92c 251 rtl_process_phyinfo(hw, tmp_buf, pstats);
84f494ce
CL		 252}
253
254bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
255 struct ieee80211_rx_status *rx_status, u8 *pdesc,
256 struct sk_buff *skb)
257{
258 struct rx_fwinfo *p_drvinfo;
259 u32 phystatus = (u32)GET_RX_STATUS_DESC_PHY_STATUS(pdesc);
5c079d88
CL		 260 struct ieee80211_hdr *hdr;
261 bool first_ampdu = false;
84f494ce
CL		 262
263 stats->length = (u16)GET_RX_STATUS_DESC_PKT_LEN(pdesc);
264 stats->rx_drvinfo_size = (u8)GET_RX_STATUS_DESC_DRVINFO_SIZE(pdesc) * 8;
265 stats->rx_bufshift = (u8)(GET_RX_STATUS_DESC_SHIFT(pdesc) & 0x03);
266 stats->icv = (u16)GET_RX_STATUS_DESC_ICV(pdesc);
267 stats->crc = (u16)GET_RX_STATUS_DESC_CRC32(pdesc);
268 stats->hwerror = (u16)(stats->crc | stats->icv);
269 stats->decrypted = !GET_RX_STATUS_DESC_SWDEC(pdesc);
270
271 stats->rate = (u8)GET_RX_STATUS_DESC_RX_MCS(pdesc);
272 stats->shortpreamble = (u16)GET_RX_STATUS_DESC_SPLCP(pdesc);
273 stats->isampdu = (bool)(GET_RX_STATUS_DESC_PAGGR(pdesc) == 1);
5c079d88
CL		 274 stats->isfirst_ampdu = (bool) ((GET_RX_STATUS_DESC_PAGGR(pdesc) == 1)
275 && (GET_RX_STATUS_DESC_FAGGR(pdesc) == 1));
84f494ce
CL		 276 stats->timestamp_low = GET_RX_STATUS_DESC_TSFL(pdesc);
277 stats->rx_is40Mhzpacket = (bool)GET_RX_STATUS_DESC_BW(pdesc);
5c079d88
CL		 278 stats->is_ht = (bool)GET_RX_STATUS_DESC_RX_HT(pdesc);
279 stats->is_cck = SE_RX_HAL_IS_CCK_RATE(pdesc);
84f494ce
CL		 280
281 if (stats->hwerror)
282 return false;
283
675a0b04
KB		 284 rx_status->freq = hw->conf.chandef.chan->center_freq;
285 rx_status->band = hw->conf.chandef.chan->band;
84f494ce 286
5c079d88
CL		 287 if (stats->crc)
288 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
84f494ce 289
5c079d88 290 if (stats->rx_is40Mhzpacket)
84f494ce
CL		 291 rx_status->flag |= RX_FLAG_40MHZ;
292
5c079d88 293 if (stats->is_ht)
84f494ce
CL		 294 rx_status->flag |= RX_FLAG_HT;
295
f4bda337 296 rx_status->flag |= RX_FLAG_MACTIME_START;
84f494ce 297
5c079d88
CL		 298 /* hw will set stats->decrypted true, if it finds the
299 * frame is open data frame or mgmt frame,
300 * hw will not decrypt robust managment frame
301 * for IEEE80211w but still set stats->decrypted
302 * true, so here we should set it back to undecrypted
303 * for IEEE80211w frame, and mac80211 sw will help
304 * to decrypt it */
305 if (stats->decrypted) {
2455c92c
LF		 306 hdr = (struct ieee80211_hdr *)(skb->data +
307 stats->rx_drvinfo_size + stats->rx_bufshift);
308
309 if (!hdr) {
310 /* during testing, hdr was NULL here */
311 return false;
312 }
d8ca16db 313 if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
5c079d88
CL		 314 (ieee80211_has_protected(hdr->frame_control)))
315 rx_status->flag &= ~RX_FLAG_DECRYPTED;
316 else
317 rx_status->flag |= RX_FLAG_DECRYPTED;
318 }
84f494ce 319
8e353377 320 rx_status->rate_idx = rtlwifi_rate_mapping(hw,
5c079d88 321 stats->is_ht, stats->rate, first_ampdu);
84f494ce 322
5c079d88 323 rx_status->mactime = stats->timestamp_low;
e10542c4 324 if (phystatus) {
84f494ce
CL		 325 p_drvinfo = (struct rx_fwinfo *)(skb->data +
326 stats->rx_bufshift);
327 _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
328 p_drvinfo);
329 }
330
331 /*rx_status->qual = stats->signal; */
b4ade797 332 rx_status->signal = stats->recvsignalpower + 10;
84f494ce
CL		 333
334 return true;
335}
336
337void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
338 struct ieee80211_hdr *hdr, u8 *pdesc_tx,
f3355dd9 339 u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
36323f81
TH		 340 struct ieee80211_sta *sta,
341 struct sk_buff *skb,
84f494ce
CL		 342 u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
343{
344 struct rtl_priv *rtlpriv = rtl_priv(hw);
345 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
346 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
347 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
2c208890 348 u8 *pdesc = pdesc_tx;
84f494ce
CL		 349 u16 seq_number;
350 __le16 fc = hdr->frame_control;
351 u8 reserved_macid = 0;
352 u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
353 bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
354 bool lastseg = (!(hdr->frame_control &
355 cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
356 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
357 PCI_DMA_TODEVICE);
358 u8 bw_40 = 0;
359
f6aa93ad
LF		 360 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
361 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
362 "DMA mapping error");
363 return;
364 }
84f494ce
CL		 365 if (mac->opmode == NL80211_IFTYPE_STATION) {
366 bw_40 = mac->bw_40;
367 } else if (mac->opmode == NL80211_IFTYPE_AP ||
368 mac->opmode == NL80211_IFTYPE_ADHOC) {
369 if (sta)
e1a0c6b3 370 bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
84f494ce
CL		 371 }
372
373 seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
374
375 rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
376
377 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
378
2455c92c
LF		 379 if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
380 firstseg = true;
381 lastseg = true;
382 }
383
84f494ce
CL		 384 if (firstseg) {
385 if (rtlpriv->dm.useramask) {
386 /* set txdesc macId */
387 if (ptcb_desc->mac_id < 32) {
388 SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
389 reserved_macid |= ptcb_desc->mac_id;
390 }
391 }
392 SET_TX_DESC_RSVD_MACID(pdesc, reserved_macid);
393
394 SET_TX_DESC_TXHT(pdesc, ((ptcb_desc->hw_rate >=
8e353377 395 DESC92_RATEMCS0) ? 1 : 0));
84f494ce
CL		 396
397 if (rtlhal->version == VERSION_8192S_ACUT) {
8e353377
LF		 398 if (ptcb_desc->hw_rate == DESC92_RATE1M ||
399 ptcb_desc->hw_rate == DESC92_RATE2M ||
400 ptcb_desc->hw_rate == DESC92_RATE5_5M ||
401 ptcb_desc->hw_rate == DESC92_RATE11M) {
402 ptcb_desc->hw_rate = DESC92_RATE12M;
84f494ce
CL		 403 }
404 }
405
406 SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
407
408 if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
409 SET_TX_DESC_TX_SHORT(pdesc, 0);
410
411 /* Aggregation related */
412 if (info->flags & IEEE80211_TX_CTL_AMPDU)
413 SET_TX_DESC_AGG_ENABLE(pdesc, 1);
414
415 /* For AMPDU, we must insert SSN into TX_DESC */
416 SET_TX_DESC_SEQ(pdesc, seq_number);
417
418 /* Protection mode related */
419 /* For 92S, if RTS/CTS are set, HW will execute RTS. */
420 /* We choose only one protection mode to execute */
421 SET_TX_DESC_RTS_ENABLE(pdesc, ((ptcb_desc->rts_enable &&
422 !ptcb_desc->cts_enable) ? 1 : 0));
423 SET_TX_DESC_CTS_ENABLE(pdesc, ((ptcb_desc->cts_enable) ?
424 1 : 0));
425 SET_TX_DESC_RTS_STBC(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
426
427 SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
428 SET_TX_DESC_RTS_BANDWIDTH(pdesc, 0);
429 SET_TX_DESC_RTS_SUB_CARRIER(pdesc, ptcb_desc->rts_sc);
430 SET_TX_DESC_RTS_SHORT(pdesc, ((ptcb_desc->rts_rate <=
8e353377 431 DESC92_RATE54M) ?
84f494ce
CL		 432 (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
433 : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
434
435
436 /* Set Bandwidth and sub-channel settings. */
437 if (bw_40) {
438 if (ptcb_desc->packet_bw) {
439 SET_TX_DESC_TX_BANDWIDTH(pdesc, 1);
440 /* use duplicated mode */
441 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
442 } else {
443 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
444 SET_TX_DESC_TX_SUB_CARRIER(pdesc,
445 mac->cur_40_prime_sc);
446 }
447 } else {
448 SET_TX_DESC_TX_BANDWIDTH(pdesc, 0);
449 SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
450 }
451
452 /* 3 Fill necessary field in First Descriptor */
453 /*DWORD 0*/
454 SET_TX_DESC_LINIP(pdesc, 0);
455 SET_TX_DESC_OFFSET(pdesc, 32);
456 SET_TX_DESC_PKT_SIZE(pdesc, (u16) skb->len);
457
458 /*DWORD 1*/
459 SET_TX_DESC_RA_BRSR_ID(pdesc, ptcb_desc->ratr_index);
460
461 /* Fill security related */
462 if (info->control.hw_key) {
463 struct ieee80211_key_conf *keyconf;
464
465 keyconf = info->control.hw_key;
466 switch (keyconf->cipher) {
467 case WLAN_CIPHER_SUITE_WEP40:
468 case WLAN_CIPHER_SUITE_WEP104:
469 SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
470 break;
471 case WLAN_CIPHER_SUITE_TKIP:
472 SET_TX_DESC_SEC_TYPE(pdesc, 0x2);
473 break;
474 case WLAN_CIPHER_SUITE_CCMP:
475 SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
476 break;
477 default:
478 SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
479 break;
480
481 }
482 }
483
484 /* Set Packet ID */
485 SET_TX_DESC_PACKET_ID(pdesc, 0);
486
487 /* We will assign magement queue to BK. */
488 SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
489
490 /* Alwasy enable all rate fallback range */
491 SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
492
493 /* Fix: I don't kown why hw use 6.5M to tx when set it */
494 SET_TX_DESC_USER_RATE(pdesc,
495 ptcb_desc->use_driver_rate ? 1 : 0);
496
497 /* Set NON_QOS bit. */
498 if (!ieee80211_is_data_qos(fc))
499 SET_TX_DESC_NON_QOS(pdesc, 1);
500
501 }
502
503 /* Fill fields that are required to be initialized
504 * in all of the descriptors */
505 /*DWORD 0 */
506 SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
507 SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
508
509 /* DWORD 7 */
510 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16) skb->len);
511
512 /* DOWRD 8 */
8e2c406a 513 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
84f494ce 514
f30d7507 515 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
84f494ce
CL		 516}
517
518void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
519 bool firstseg, bool lastseg, struct sk_buff *skb)
520{
f6aa93ad 521 struct rtl_priv *rtlpriv = rtl_priv(hw);
84f494ce
CL		 522 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
523 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
524 struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
525
526 dma_addr_t mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
527 PCI_DMA_TODEVICE);
528
f6aa93ad
LF		 529 if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
530 RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
531 "DMA mapping error");
532 return;
533 }
534 /* Clear all status */
84f494ce
CL		 535 CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
536
537 /* This bit indicate this packet is used for FW download. */
538 if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
539 /* For firmware downlaod we only need to set LINIP */
540 SET_TX_DESC_LINIP(pdesc, tcb_desc->last_inipkt);
541
542 /* 92SE must set as 1 for firmware download HW DMA error */
543 SET_TX_DESC_FIRST_SEG(pdesc, 1);
544 SET_TX_DESC_LAST_SEG(pdesc, 1);
545
546 /* 92SE need not to set TX packet size when firmware download */
547 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
548 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
8e2c406a 549 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
84f494ce 550
5111dd3e 551 wmb();
84f494ce
CL		 552 SET_TX_DESC_OWN(pdesc, 1);
553 } else { /* H2C Command Desc format (Host TXCMD) */
554 /* 92SE must set as 1 for firmware download HW DMA error */
555 SET_TX_DESC_FIRST_SEG(pdesc, 1);
556 SET_TX_DESC_LAST_SEG(pdesc, 1);
557
558 SET_TX_DESC_OFFSET(pdesc, 0x20);
559
560 /* Buffer size + command header */
561 SET_TX_DESC_PKT_SIZE(pdesc, (u16)(skb->len));
562 /* Fixed queue of H2C command */
563 SET_TX_DESC_QUEUE_SEL(pdesc, 0x13);
564
565 SET_BITS_TO_LE_4BYTE(skb->data, 24, 7, rtlhal->h2c_txcmd_seq);
566
567 SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
8e2c406a 568 SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
84f494ce 569
5111dd3e 570 wmb();
84f494ce
CL		 571 SET_TX_DESC_OWN(pdesc, 1);
572
573 }
574}
575
f3355dd9
LF		 576void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
577 u8 desc_name, u8 *val)
84f494ce 578{
e10542c4 579 if (istx) {
84f494ce
CL		 580 switch (desc_name) {
581 case HW_DESC_OWN:
5111dd3e 582 wmb();
84f494ce
CL		 583 SET_TX_DESC_OWN(pdesc, 1);
584 break;
585 case HW_DESC_TX_NEXTDESC_ADDR:
586 SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *) val);
587 break;
588 default:
9d833ed7
JP		 589 RT_ASSERT(false, "ERR txdesc :%d not process\n",
590 desc_name);
84f494ce
CL		 591 break;
592 }
593 } else {
594 switch (desc_name) {
595 case HW_DESC_RXOWN:
5111dd3e 596 wmb();
84f494ce
CL		 597 SET_RX_STATUS_DESC_OWN(pdesc, 1);
598 break;
599 case HW_DESC_RXBUFF_ADDR:
600 SET_RX_STATUS__DESC_BUFF_ADDR(pdesc, *(u32 *) val);
601 break;
602 case HW_DESC_RXPKT_LEN:
603 SET_RX_STATUS_DESC_PKT_LEN(pdesc, *(u32 *) val);
604 break;
605 case HW_DESC_RXERO:
606 SET_RX_STATUS_DESC_EOR(pdesc, 1);
607 break;
608 default:
9d833ed7
JP		 609 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
610 desc_name);
84f494ce
CL		 611 break;
612 }
613 }
614}
615
616u32 rtl92se_get_desc(u8 *desc, bool istx, u8 desc_name)
617{
618 u32 ret = 0;
619
e10542c4 620 if (istx) {
84f494ce
CL		 621 switch (desc_name) {
622 case HW_DESC_OWN:
623 ret = GET_TX_DESC_OWN(desc);
624 break;
625 case HW_DESC_TXBUFF_ADDR:
626 ret = GET_TX_DESC_TX_BUFFER_ADDRESS(desc);
627 break;
628 default:
9d833ed7
JP		 629 RT_ASSERT(false, "ERR txdesc :%d not process\n",
630 desc_name);
84f494ce
CL		 631 break;
632 }
633 } else {
634 switch (desc_name) {
635 case HW_DESC_OWN:
636 ret = GET_RX_STATUS_DESC_OWN(desc);
637 break;
638 case HW_DESC_RXPKT_LEN:
639 ret = GET_RX_STATUS_DESC_PKT_LEN(desc);
640 break;
641 default:
9d833ed7
JP		 642 RT_ASSERT(false, "ERR rxdesc :%d not process\n",
643 desc_name);
84f494ce
CL		 644 break;
645 }
646 }
647 return ret;
648}
649
650void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
651{
652 struct rtl_priv *rtlpriv = rtl_priv(hw);
653 rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
654}
Linux kernel - Deliverables
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