projects / deliverable / linux.git / blame
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| a619d1ab LF |
1 | /****************************************************************************** |
| 2 | * | |
| 3 | * Copyright(c) 2009-2014 Realtek Corporation. | |
| 4 | * | |
| 5 | * This program is free software; you can redistribute it and/or modify it | |
| 6 | * under the terms of version 2 of the GNU General Public License as | |
| 7 | * published by the Free Software Foundation. | |
| 8 | * | |
| 9 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
| 10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 12 | * more details. | |
| 13 | * | |
| 14 | * The full GNU General Public License is included in this distribution in the | |
| 15 | * file called LICENSE. | |
| 16 | * | |
| 17 | * Contact Information: | |
| 18 | * wlanfae <wlanfae@realtek.com> | |
| 19 | * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, | |
| 20 | * Hsinchu 300, Taiwan. | |
| 21 | * | |
| 22 | * Larry Finger <Larry.Finger@lwfinger.net> | |
| 23 | * | |
| 24 | *****************************************************************************/ | |
| 25 | ||
| 26 | #include "../wifi.h" | |
| 27 | #include "../core.h" | |
| 28 | #include "../pci.h" | |
| 29 | #include "reg.h" | |
| 30 | #include "def.h" | |
| 31 | #include "phy.h" | |
| 32 | #include "../rtl8723com/phy_common.h" | |
| 33 | #include "dm.h" | |
| 34 | #include "hw.h" | |
| 35 | #include "fw.h" | |
| 36 | #include "../rtl8723com/fw_common.h" | |
| 37 | #include "sw.h" | |
| 38 | #include "trx.h" | |
| 39 | #include "led.h" | |
| 40 | #include "table.h" | |
| 41 | #include "../btcoexist/rtl_btc.h" | |
| 42 | ||
| 43 | #include <linux/vmalloc.h> | |
| 44 | #include <linux/module.h> | |
| 45 | ||
| 46 | static void rtl8723be_init_aspm_vars(struct ieee80211_hw *hw) | |
| 47 | { | |
| 48 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | |
| 49 | ||
| 50 | /*close ASPM for AMD defaultly */ | |
| 51 | rtlpci->const_amdpci_aspm = 0; | |
| 52 | ||
| 53 | /* ASPM PS mode. | |
| 54 | * 0 - Disable ASPM, | |
| 55 | * 1 - Enable ASPM without Clock Req, | |
| 56 | * 2 - Enable ASPM with Clock Req, | |
| 57 | * 3 - Alwyas Enable ASPM with Clock Req, | |
| 58 | * 4 - Always Enable ASPM without Clock Req. | |
| 59 | * set defult to RTL8192CE:3 RTL8192E:2 | |
| 60 | */ | |
| 61 | rtlpci->const_pci_aspm = 3; | |
| 62 | ||
| 63 | /*Setting for PCI-E device */ | |
| 64 | rtlpci->const_devicepci_aspm_setting = 0x03; | |
| 65 | ||
| 66 | /*Setting for PCI-E bridge */ | |
| 67 | rtlpci->const_hostpci_aspm_setting = 0x02; | |
| 68 | ||
| 69 | /* In Hw/Sw Radio Off situation. | |
| 70 | * 0 - Default, | |
| 71 | * 1 - From ASPM setting without low Mac Pwr, | |
| 72 | * 2 - From ASPM setting with low Mac Pwr, | |
| 73 | * 3 - Bus D3 | |
| 74 | * set default to RTL8192CE:0 RTL8192SE:2 | |
| 75 | */ | |
| 76 | rtlpci->const_hwsw_rfoff_d3 = 0; | |
| 77 | ||
| 78 | /* This setting works for those device with | |
| 79 | * backdoor ASPM setting such as EPHY setting. | |
| 80 | * 0 - Not support ASPM, | |
| 81 | * 1 - Support ASPM, | |
| 82 | * 2 - According to chipset. | |
| 83 | */ | |
| 84 | rtlpci->const_support_pciaspm = 1; | |
| 85 | } | |
| 86 | ||
| 87 | int rtl8723be_init_sw_vars(struct ieee80211_hw *hw) | |
| 88 | { | |
| 89 | int err = 0; | |
| 90 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
| 91 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | |
| 92 | struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); | |
| 93 | ||
| 94 | rtl8723be_bt_reg_init(hw); | |
| 3924e338 | 95 | rtlpci->msi_support = rtlpriv->cfg->mod_params->msi_support; |
| a619d1ab LF |
96 | rtlpriv->btcoexist.btc_ops = rtl_btc_get_ops_pointer(); |
| 97 | ||
| 98 | rtlpriv->dm.dm_initialgain_enable = 1; | |
| 99 | rtlpriv->dm.dm_flag = 0; | |
| 100 | rtlpriv->dm.disable_framebursting = 0; | |
| 101 | rtlpriv->dm.thermalvalue = 0; | |
| 102 | rtlpci->transmit_config = CFENDFORM | BIT(15) | BIT(24) | BIT(25); | |
| 103 | ||
| 104 | mac->ht_enable = true; | |
| 105 | ||
| 106 | /* compatible 5G band 88ce just 2.4G band & smsp */ | |
| 107 | rtlpriv->rtlhal.current_bandtype = BAND_ON_2_4G; | |
| 108 | rtlpriv->rtlhal.bandset = BAND_ON_2_4G; | |
| 109 | rtlpriv->rtlhal.macphymode = SINGLEMAC_SINGLEPHY; | |
| 110 | ||
| 111 | rtlpci->receive_config = (RCR_APPFCS | | |
| 112 | RCR_APP_MIC | | |
| 113 | RCR_APP_ICV | | |
| 114 | RCR_APP_PHYST_RXFF | | |
| 115 | RCR_HTC_LOC_CTRL | | |
| 116 | RCR_AMF | | |
| 117 | RCR_ACF | | |
| 118 | RCR_ADF | | |
| 119 | RCR_AICV | | |
| 120 | RCR_AB | | |
| 121 | RCR_AM | | |
| 122 | RCR_APM | | |
| 123 | 0); | |
| 124 | ||
| 125 | rtlpci->irq_mask[0] = (u32) (IMR_PSTIMEOUT | | |
| 126 | IMR_HSISR_IND_ON_INT | | |
| 127 | IMR_C2HCMD | | |
| 128 | IMR_HIGHDOK | | |
| 129 | IMR_MGNTDOK | | |
| 130 | IMR_BKDOK | | |
| 131 | IMR_BEDOK | | |
| 132 | IMR_VIDOK | | |
| 133 | IMR_VODOK | | |
| 134 | IMR_RDU | | |
| 135 | IMR_ROK | | |
| 136 | 0); | |
| 137 | ||
| 138 | rtlpci->irq_mask[1] = (u32)(IMR_RXFOVW | 0); | |
| 139 | ||
| 140 | /* for debug level */ | |
| 141 | rtlpriv->dbg.global_debuglevel = rtlpriv->cfg->mod_params->debug; | |
| 142 | /* for LPS & IPS */ | |
| 143 | rtlpriv->psc.inactiveps = rtlpriv->cfg->mod_params->inactiveps; | |
| 144 | rtlpriv->psc.swctrl_lps = rtlpriv->cfg->mod_params->swctrl_lps; | |
| 145 | rtlpriv->psc.fwctrl_lps = rtlpriv->cfg->mod_params->fwctrl_lps; | |
| 146 | rtlpriv->psc.reg_fwctrl_lps = 3; | |
| 147 | rtlpriv->psc.reg_max_lps_awakeintvl = 5; | |
| 148 | /* for ASPM, you can close aspm through | |
| 149 | * set const_support_pciaspm = 0 | |
| 150 | */ | |
| 151 | rtl8723be_init_aspm_vars(hw); | |
| 152 | ||
| 153 | if (rtlpriv->psc.reg_fwctrl_lps == 1) | |
| 154 | rtlpriv->psc.fwctrl_psmode = FW_PS_MIN_MODE; | |
| 155 | else if (rtlpriv->psc.reg_fwctrl_lps == 2) | |
| 156 | rtlpriv->psc.fwctrl_psmode = FW_PS_MAX_MODE; | |
| 157 | else if (rtlpriv->psc.reg_fwctrl_lps == 3) | |
| 158 | rtlpriv->psc.fwctrl_psmode = FW_PS_DTIM_MODE; | |
| 159 | ||
| 160 | /* for firmware buf */ | |
| 161 | rtlpriv->rtlhal.pfirmware = vzalloc(0x8000); | |
| 162 | if (!rtlpriv->rtlhal.pfirmware) { | |
| 163 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
| 164 | "Can't alloc buffer for fw.\n"); | |
| 165 | return 1; | |
| 166 | } | |
| 167 | ||
| 168 | rtlpriv->max_fw_size = 0x8000; | |
| 169 | pr_info("Using firmware %s\n", rtlpriv->cfg->fw_name); | |
| 170 | err = request_firmware_nowait(THIS_MODULE, 1, rtlpriv->cfg->fw_name, | |
| 171 | rtlpriv->io.dev, GFP_KERNEL, hw, | |
| 172 | rtl_fw_cb); | |
| 173 | if (err) { | |
| 174 | RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, | |
| 175 | "Failed to request firmware!\n"); | |
| 176 | return 1; | |
| 177 | } | |
| 178 | return 0; | |
| 179 | } | |
| 180 | ||
| 181 | void rtl8723be_deinit_sw_vars(struct ieee80211_hw *hw) | |
| 182 | { | |
| 183 | struct rtl_priv *rtlpriv = rtl_priv(hw); | |
| 184 | ||
| 185 | if (rtlpriv->cfg->ops->get_btc_status()) | |
| 186 | rtlpriv->btcoexist.btc_ops->btc_halt_notify(); | |
| 187 | if (rtlpriv->rtlhal.pfirmware) { | |
| 188 | vfree(rtlpriv->rtlhal.pfirmware); | |
| 189 | rtlpriv->rtlhal.pfirmware = NULL; | |
| 190 | } | |
| 191 | } | |
| 192 | ||
| 193 | /* get bt coexist status */ | |
| 194 | bool rtl8723be_get_btc_status(void) | |
| 195 | { | |
| 196 | return true; | |
| 197 | } | |
| 198 | ||
| 199 | static bool is_fw_header(struct rtl92c_firmware_header *hdr) | |
| 200 | { | |
| 201 | return (hdr->signature & 0xfff0) == 0x5300; | |
| 202 | } | |
| 203 | ||
| 204 | static struct rtl_hal_ops rtl8723be_hal_ops = { | |
| 205 | .init_sw_vars = rtl8723be_init_sw_vars, | |
| 206 | .deinit_sw_vars = rtl8723be_deinit_sw_vars, | |
| 207 | .read_eeprom_info = rtl8723be_read_eeprom_info, | |
| 208 | .interrupt_recognized = rtl8723be_interrupt_recognized, | |
| 209 | .hw_init = rtl8723be_hw_init, | |
| 210 | .hw_disable = rtl8723be_card_disable, | |
| 211 | .hw_suspend = rtl8723be_suspend, | |
| 212 | .hw_resume = rtl8723be_resume, | |
| 213 | .enable_interrupt = rtl8723be_enable_interrupt, | |
| 214 | .disable_interrupt = rtl8723be_disable_interrupt, | |
| 215 | .set_network_type = rtl8723be_set_network_type, | |
| 216 | .set_chk_bssid = rtl8723be_set_check_bssid, | |
| 217 | .set_qos = rtl8723be_set_qos, | |
| 218 | .set_bcn_reg = rtl8723be_set_beacon_related_registers, | |
| 219 | .set_bcn_intv = rtl8723be_set_beacon_interval, | |
| 220 | .update_interrupt_mask = rtl8723be_update_interrupt_mask, | |
| 221 | .get_hw_reg = rtl8723be_get_hw_reg, | |
| 222 | .set_hw_reg = rtl8723be_set_hw_reg, | |
| 223 | .update_rate_tbl = rtl8723be_update_hal_rate_tbl, | |
| 224 | .fill_tx_desc = rtl8723be_tx_fill_desc, | |
| 225 | .fill_tx_cmddesc = rtl8723be_tx_fill_cmddesc, | |
| 226 | .query_rx_desc = rtl8723be_rx_query_desc, | |
| 227 | .set_channel_access = rtl8723be_update_channel_access_setting, | |
| 228 | .radio_onoff_checking = rtl8723be_gpio_radio_on_off_checking, | |
| 229 | .set_bw_mode = rtl8723be_phy_set_bw_mode, | |
| 230 | .switch_channel = rtl8723be_phy_sw_chnl, | |
| 231 | .dm_watchdog = rtl8723be_dm_watchdog, | |
| 232 | .scan_operation_backup = rtl8723be_phy_scan_operation_backup, | |
| 233 | .set_rf_power_state = rtl8723be_phy_set_rf_power_state, | |
| 234 | .led_control = rtl8723be_led_control, | |
| 235 | .set_desc = rtl8723be_set_desc, | |
| 236 | .get_desc = rtl8723be_get_desc, | |
| 237 | .is_tx_desc_closed = rtl8723be_is_tx_desc_closed, | |
| 238 | .tx_polling = rtl8723be_tx_polling, | |
| 239 | .enable_hw_sec = rtl8723be_enable_hw_security_config, | |
| 240 | .set_key = rtl8723be_set_key, | |
| 241 | .init_sw_leds = rtl8723be_init_sw_leds, | |
| a619d1ab LF |
242 | .get_bbreg = rtl8723_phy_query_bb_reg, |
| 243 | .set_bbreg = rtl8723_phy_set_bb_reg, | |
| 244 | .get_rfreg = rtl8723be_phy_query_rf_reg, | |
| 245 | .set_rfreg = rtl8723be_phy_set_rf_reg, | |
| 246 | .fill_h2c_cmd = rtl8723be_fill_h2c_cmd, | |
| 247 | .get_btc_status = rtl8723be_get_btc_status, | |
| 248 | .is_fw_header = is_fw_header, | |
| 249 | }; | |
| 250 | ||
| 251 | static struct rtl_mod_params rtl8723be_mod_params = { | |
| 252 | .sw_crypto = false, | |
| 253 | .inactiveps = true, | |
| 254 | .swctrl_lps = false, | |
| 255 | .fwctrl_lps = true, | |
| 3924e338 | 256 | .msi_support = false, |
| a619d1ab LF |
257 | .debug = DBG_EMERG, |
| 258 | }; | |
| 259 | ||
| 260 | static struct rtl_hal_cfg rtl8723be_hal_cfg = { | |
| 261 | .bar_id = 2, | |
| 262 | .write_readback = true, | |
| 263 | .name = "rtl8723be_pci", | |
| 264 | .fw_name = "rtlwifi/rtl8723befw.bin", | |
| 265 | .ops = &rtl8723be_hal_ops, | |
| 266 | .mod_params = &rtl8723be_mod_params, | |
| 267 | .maps[SYS_ISO_CTRL] = REG_SYS_ISO_CTRL, | |
| 268 | .maps[SYS_FUNC_EN] = REG_SYS_FUNC_EN, | |
| 269 | .maps[SYS_CLK] = REG_SYS_CLKR, | |
| 270 | .maps[MAC_RCR_AM] = AM, | |
| 271 | .maps[MAC_RCR_AB] = AB, | |
| 272 | .maps[MAC_RCR_ACRC32] = ACRC32, | |
| 273 | .maps[MAC_RCR_ACF] = ACF, | |
| 274 | .maps[MAC_RCR_AAP] = AAP, | |
| 275 | ||
| 276 | .maps[EFUSE_ACCESS] = REG_EFUSE_ACCESS, | |
| 277 | ||
| 278 | .maps[EFUSE_TEST] = REG_EFUSE_TEST, | |
| 279 | .maps[EFUSE_CTRL] = REG_EFUSE_CTRL, | |
| 280 | .maps[EFUSE_CLK] = 0, | |
| 281 | .maps[EFUSE_CLK_CTRL] = REG_EFUSE_CTRL, | |
| 282 | .maps[EFUSE_PWC_EV12V] = PWC_EV12V, | |
| 283 | .maps[EFUSE_FEN_ELDR] = FEN_ELDR, | |
| 284 | .maps[EFUSE_LOADER_CLK_EN] = LOADER_CLK_EN, | |
| 285 | .maps[EFUSE_ANA8M] = ANA8M, | |
| 286 | .maps[EFUSE_HWSET_MAX_SIZE] = HWSET_MAX_SIZE, | |
| 287 | .maps[EFUSE_MAX_SECTION_MAP] = EFUSE_MAX_SECTION, | |
| 288 | .maps[EFUSE_REAL_CONTENT_SIZE] = EFUSE_REAL_CONTENT_LEN, | |
| 289 | .maps[EFUSE_OOB_PROTECT_BYTES_LEN] = EFUSE_OOB_PROTECT_BYTES, | |
| 290 | ||
| 291 | .maps[RWCAM] = REG_CAMCMD, | |
| 292 | .maps[WCAMI] = REG_CAMWRITE, | |
| 293 | .maps[RCAMO] = REG_CAMREAD, | |
| 294 | .maps[CAMDBG] = REG_CAMDBG, | |
| 295 | .maps[SECR] = REG_SECCFG, | |
| 296 | .maps[SEC_CAM_NONE] = CAM_NONE, | |
| 297 | .maps[SEC_CAM_WEP40] = CAM_WEP40, | |
| 298 | .maps[SEC_CAM_TKIP] = CAM_TKIP, | |
| 299 | .maps[SEC_CAM_AES] = CAM_AES, | |
| 300 | .maps[SEC_CAM_WEP104] = CAM_WEP104, | |
| 301 | ||
| 302 | .maps[RTL_IMR_BCNDMAINT6] = IMR_BCNDMAINT6, | |
| 303 | .maps[RTL_IMR_BCNDMAINT5] = IMR_BCNDMAINT5, | |
| 304 | .maps[RTL_IMR_BCNDMAINT4] = IMR_BCNDMAINT4, | |
| 305 | .maps[RTL_IMR_BCNDMAINT3] = IMR_BCNDMAINT3, | |
| 306 | .maps[RTL_IMR_BCNDMAINT2] = IMR_BCNDMAINT2, | |
| 307 | .maps[RTL_IMR_BCNDMAINT1] = IMR_BCNDMAINT1, | |
| 308 | .maps[RTL_IMR_BCNDOK7] = IMR_BCNDOK7, | |
| 309 | .maps[RTL_IMR_BCNDOK6] = IMR_BCNDOK6, | |
| 310 | .maps[RTL_IMR_BCNDOK5] = IMR_BCNDOK5, | |
| 311 | .maps[RTL_IMR_BCNDOK4] = IMR_BCNDOK4, | |
| 312 | .maps[RTL_IMR_BCNDOK3] = IMR_BCNDOK3, | |
| 313 | .maps[RTL_IMR_BCNDOK2] = IMR_BCNDOK2, | |
| 314 | .maps[RTL_IMR_BCNDOK1] = IMR_BCNDOK1, | |
| 315 | ||
| 316 | .maps[RTL_IMR_TXFOVW] = IMR_TXFOVW, | |
| 317 | .maps[RTL_IMR_PSTIMEOUT] = IMR_PSTIMEOUT, | |
| 318 | .maps[RTL_IMR_BCNINT] = IMR_BCNDMAINT0, | |
| 319 | .maps[RTL_IMR_RXFOVW] = IMR_RXFOVW, | |
| 320 | .maps[RTL_IMR_RDU] = IMR_RDU, | |
| 321 | .maps[RTL_IMR_ATIMEND] = IMR_ATIMEND, | |
| 322 | .maps[RTL_IMR_BDOK] = IMR_BCNDOK0, | |
| 323 | .maps[RTL_IMR_MGNTDOK] = IMR_MGNTDOK, | |
| 324 | .maps[RTL_IMR_TBDER] = IMR_TBDER, | |
| 325 | .maps[RTL_IMR_HIGHDOK] = IMR_HIGHDOK, | |
| 326 | .maps[RTL_IMR_TBDOK] = IMR_TBDOK, | |
| 327 | .maps[RTL_IMR_BKDOK] = IMR_BKDOK, | |
| 328 | .maps[RTL_IMR_BEDOK] = IMR_BEDOK, | |
| 329 | .maps[RTL_IMR_VIDOK] = IMR_VIDOK, | |
| 330 | .maps[RTL_IMR_VODOK] = IMR_VODOK, | |
| 331 | .maps[RTL_IMR_ROK] = IMR_ROK, | |
| 332 | .maps[RTL_IBSS_INT_MASKS] = (IMR_BCNDMAINT0 | IMR_TBDOK | IMR_TBDER), | |
| 333 | ||
| 334 | .maps[RTL_RC_CCK_RATE1M] = DESC92C_RATE1M, | |
| 335 | .maps[RTL_RC_CCK_RATE2M] = DESC92C_RATE2M, | |
| 336 | .maps[RTL_RC_CCK_RATE5_5M] = DESC92C_RATE5_5M, | |
| 337 | .maps[RTL_RC_CCK_RATE11M] = DESC92C_RATE11M, | |
| 338 | .maps[RTL_RC_OFDM_RATE6M] = DESC92C_RATE6M, | |
| 339 | .maps[RTL_RC_OFDM_RATE9M] = DESC92C_RATE9M, | |
| 340 | .maps[RTL_RC_OFDM_RATE12M] = DESC92C_RATE12M, | |
| 341 | .maps[RTL_RC_OFDM_RATE18M] = DESC92C_RATE18M, | |
| 342 | .maps[RTL_RC_OFDM_RATE24M] = DESC92C_RATE24M, | |
| 343 | .maps[RTL_RC_OFDM_RATE36M] = DESC92C_RATE36M, | |
| 344 | .maps[RTL_RC_OFDM_RATE48M] = DESC92C_RATE48M, | |
| 345 | .maps[RTL_RC_OFDM_RATE54M] = DESC92C_RATE54M, | |
| 346 | ||
| 347 | .maps[RTL_RC_HT_RATEMCS7] = DESC92C_RATEMCS7, | |
| 348 | .maps[RTL_RC_HT_RATEMCS15] = DESC92C_RATEMCS15, | |
| 349 | }; | |
| 350 | ||
| 9baa3c34 | 351 | static const struct pci_device_id rtl8723be_pci_id[] = { |
| a619d1ab LF |
352 | {RTL_PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb723, rtl8723be_hal_cfg)}, |
| 353 | {}, | |
| 354 | }; | |
| 355 | ||
| 356 | MODULE_DEVICE_TABLE(pci, rtl8723be_pci_id); | |
| 357 | ||
| 358 | MODULE_AUTHOR("PageHe <page_he@realsil.com.cn>"); | |
| 359 | MODULE_AUTHOR("Realtek WlanFAE <wlanfae@realtek.com>"); | |
| 360 | MODULE_LICENSE("GPL"); | |
| 361 | MODULE_DESCRIPTION("Realtek 8723BE 802.11n PCI wireless"); | |
| 362 | MODULE_FIRMWARE("rtlwifi/rtl8723befw.bin"); | |
| 363 | ||
| 364 | module_param_named(swenc, rtl8723be_mod_params.sw_crypto, bool, 0444); | |
| 365 | module_param_named(debug, rtl8723be_mod_params.debug, int, 0444); | |
| 366 | module_param_named(ips, rtl8723be_mod_params.inactiveps, bool, 0444); | |
| 367 | module_param_named(swlps, rtl8723be_mod_params.swctrl_lps, bool, 0444); | |
| 368 | module_param_named(fwlps, rtl8723be_mod_params.fwctrl_lps, bool, 0444); | |
| 3924e338 | 369 | module_param_named(msi, rtl8723be_mod_params.msi_support, bool, 0444); |
| a619d1ab LF |
370 | MODULE_PARM_DESC(swenc, "using hardware crypto (default 0 [hardware])\n"); |
| 371 | MODULE_PARM_DESC(ips, "using no link power save (default 1 is open)\n"); | |
| 372 | MODULE_PARM_DESC(fwlps, "using linked fw control power save (default 1 is open)\n"); | |
| 3924e338 | 373 | MODULE_PARM_DESC(msi, "Set to 1 to use MSI interrupts mode (default 0)\n"); |
| a619d1ab LF |
374 | MODULE_PARM_DESC(debug, "Set debug level (0-5) (default 0)"); |
| 375 | ||
| 2903d04b | 376 | static SIMPLE_DEV_PM_OPS(rtlwifi_pm_ops, rtl_pci_suspend, rtl_pci_resume); |
| a619d1ab LF |
377 | |
| 378 | static struct pci_driver rtl8723be_driver = { | |
| 379 | .name = KBUILD_MODNAME, | |
| 380 | .id_table = rtl8723be_pci_id, | |
| 381 | .probe = rtl_pci_probe, | |
| 382 | .remove = rtl_pci_disconnect, | |
| 383 | ||
| 384 | .driver.pm = &rtlwifi_pm_ops, | |
| 385 | }; | |
| 386 | ||
| 387 | module_pci_driver(rtl8723be_driver); |