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2f01a1f5 | 1 | /* |
80301cdc | 2 | * This file is part of wl1251 |
2f01a1f5 KV |
3 | * |
4 | * Copyright (c) 1998-2007 Texas Instruments Incorporated | |
5 | * Copyright (C) 2008 Nokia Corporation | |
6 | * | |
2f01a1f5 KV |
7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License | |
9 | * version 2 as published by the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but | |
12 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
19 | * 02110-1301 USA | |
20 | * | |
21 | */ | |
22 | ||
80301cdc KV |
23 | #ifndef __WL1251_EVENT_H__ |
24 | #define __WL1251_EVENT_H__ | |
2f01a1f5 KV |
25 | |
26 | /* | |
27 | * Mbox events | |
28 | * | |
29 | * The event mechanism is based on a pair of event buffers (buffers A and | |
30 | * B) at fixed locations in the target's memory. The host processes one | |
31 | * buffer while the other buffer continues to collect events. If the host | |
32 | * is not processing events, an interrupt is issued to signal that a buffer | |
33 | * is ready. Once the host is done with processing events from one buffer, | |
34 | * it signals the target (with an ACK interrupt) that the event buffer is | |
35 | * free. | |
36 | */ | |
37 | ||
38 | enum { | |
39 | RESERVED1_EVENT_ID = BIT(0), | |
40 | RESERVED2_EVENT_ID = BIT(1), | |
41 | MEASUREMENT_START_EVENT_ID = BIT(2), | |
42 | SCAN_COMPLETE_EVENT_ID = BIT(3), | |
43 | CALIBRATION_COMPLETE_EVENT_ID = BIT(4), | |
44 | ROAMING_TRIGGER_LOW_RSSI_EVENT_ID = BIT(5), | |
45 | PS_REPORT_EVENT_ID = BIT(6), | |
46 | SYNCHRONIZATION_TIMEOUT_EVENT_ID = BIT(7), | |
47 | HEALTH_REPORT_EVENT_ID = BIT(8), | |
48 | ACI_DETECTION_EVENT_ID = BIT(9), | |
49 | DEBUG_REPORT_EVENT_ID = BIT(10), | |
50 | MAC_STATUS_EVENT_ID = BIT(11), | |
51 | DISCONNECT_EVENT_COMPLETE_ID = BIT(12), | |
52 | JOIN_EVENT_COMPLETE_ID = BIT(13), | |
53 | CHANNEL_SWITCH_COMPLETE_EVENT_ID = BIT(14), | |
54 | BSS_LOSE_EVENT_ID = BIT(15), | |
55 | ROAMING_TRIGGER_MAX_TX_RETRY_EVENT_ID = BIT(16), | |
56 | MEASUREMENT_COMPLETE_EVENT_ID = BIT(17), | |
57 | AP_DISCOVERY_COMPLETE_EVENT_ID = BIT(18), | |
58 | SCHEDULED_SCAN_COMPLETE_EVENT_ID = BIT(19), | |
59 | PSPOLL_DELIVERY_FAILURE_EVENT_ID = BIT(20), | |
60 | RESET_BSS_EVENT_ID = BIT(21), | |
61 | REGAINED_BSS_EVENT_ID = BIT(22), | |
62 | ROAMING_TRIGGER_REGAINED_RSSI_EVENT_ID = BIT(23), | |
63 | ROAMING_TRIGGER_LOW_SNR_EVENT_ID = BIT(24), | |
64 | ROAMING_TRIGGER_REGAINED_SNR_EVENT_ID = BIT(25), | |
65 | ||
66 | DBG_EVENT_ID = BIT(26), | |
67 | BT_PTA_SENSE_EVENT_ID = BIT(27), | |
68 | BT_PTA_PREDICTION_EVENT_ID = BIT(28), | |
69 | BT_PTA_AVALANCHE_EVENT_ID = BIT(29), | |
70 | ||
71 | PLT_RX_CALIBRATION_COMPLETE_EVENT_ID = BIT(30), | |
72 | ||
73 | EVENT_MBOX_ALL_EVENT_ID = 0x7fffffff, | |
74 | }; | |
75 | ||
76 | struct event_debug_report { | |
77 | u8 debug_event_id; | |
78 | u8 num_params; | |
79 | u16 pad; | |
80 | u32 report_1; | |
81 | u32 report_2; | |
82 | u32 report_3; | |
ba2d3587 | 83 | } __packed; |
2f01a1f5 KV |
84 | |
85 | struct event_mailbox { | |
86 | u32 events_vector; | |
87 | u32 events_mask; | |
88 | u32 reserved_1; | |
89 | u32 reserved_2; | |
90 | ||
91 | char average_rssi_level; | |
92 | u8 ps_status; | |
93 | u8 channel_switch_status; | |
94 | u8 scheduled_scan_status; | |
95 | ||
96 | /* Channels scanned by the scheduled scan */ | |
97 | u16 scheduled_scan_channels; | |
98 | ||
99 | /* If bit 0 is set -> target's fatal error */ | |
100 | u16 health_report; | |
101 | u16 bad_fft_counter; | |
102 | u8 bt_pta_sense_info; | |
103 | u8 bt_pta_protective_info; | |
104 | u32 reserved; | |
105 | u32 debug_report[2]; | |
106 | ||
107 | /* Number of FCS errors since last event */ | |
108 | u32 fcs_err_counter; | |
109 | ||
110 | struct event_debug_report report; | |
111 | u8 average_snr_level; | |
112 | u8 padding[19]; | |
ba2d3587 | 113 | } __packed; |
2f01a1f5 | 114 | |
f7ad1eed DG |
115 | enum { |
116 | EVENT_ENTER_POWER_SAVE_FAIL = 0, | |
117 | EVENT_ENTER_POWER_SAVE_SUCCESS, | |
118 | EVENT_EXIT_POWER_SAVE_FAIL, | |
119 | EVENT_EXIT_POWER_SAVE_SUCCESS, | |
120 | }; | |
121 | ||
80301cdc KV |
122 | int wl1251_event_unmask(struct wl1251 *wl); |
123 | void wl1251_event_mbox_config(struct wl1251 *wl); | |
124 | int wl1251_event_handle(struct wl1251 *wl, u8 mbox); | |
7273b970 | 125 | int wl1251_event_wait(struct wl1251 *wl, u32 mask, int timeout_ms); |
2f01a1f5 KV |
126 | |
127 | #endif |