Commit | Line | Data |
---|---|---|
f5fc0f86 LC |
1 | /* |
2 | * This file is part of wl1271 | |
3 | * | |
4 | * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. | |
5 | * Copyright (C) 2009 Nokia Corporation | |
6 | * | |
7 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
21 | * 02110-1301 USA | |
22 | * | |
23 | */ | |
24 | ||
25 | #ifndef __WL1271_TX_H__ | |
26 | #define __WL1271_TX_H__ | |
27 | ||
28 | #define TX_HW_BLOCK_SPARE 2 | |
5c9417f1 | 29 | #define TX_HW_BLOCK_SIZE 252 |
f5fc0f86 LC |
30 | |
31 | #define TX_HW_MGMT_PKT_LIFETIME_TU 2000 | |
32 | /* The chipset reference driver states, that the "aid" value 1 | |
33 | * is for infra-BSS, but is still always used */ | |
34 | #define TX_HW_DEFAULT_AID 1 | |
35 | ||
36 | #define TX_HW_ATTR_SAVE_RETRIES BIT(0) | |
37 | #define TX_HW_ATTR_HEADER_PAD BIT(1) | |
38 | #define TX_HW_ATTR_SESSION_COUNTER (BIT(2) | BIT(3) | BIT(4)) | |
39 | #define TX_HW_ATTR_RATE_POLICY (BIT(5) | BIT(6) | BIT(7) | \ | |
40 | BIT(8) | BIT(9)) | |
41 | #define TX_HW_ATTR_LAST_WORD_PAD (BIT(10) | BIT(11)) | |
42 | #define TX_HW_ATTR_TX_CMPLT_REQ BIT(12) | |
43 | ||
44 | #define TX_HW_ATTR_OFST_SAVE_RETRIES 0 | |
45 | #define TX_HW_ATTR_OFST_HEADER_PAD 1 | |
46 | #define TX_HW_ATTR_OFST_SESSION_COUNTER 2 | |
47 | #define TX_HW_ATTR_OFST_RATE_POLICY 5 | |
48 | #define TX_HW_ATTR_OFST_LAST_WORD_PAD 10 | |
49 | #define TX_HW_ATTR_OFST_TX_CMPLT_REQ 12 | |
50 | ||
51 | #define TX_HW_RESULT_QUEUE_LEN 16 | |
52 | #define TX_HW_RESULT_QUEUE_LEN_MASK 0xf | |
53 | ||
54 | #define WL1271_TX_ALIGN_TO 4 | |
55 | #define WL1271_TX_ALIGN(len) (((len) + WL1271_TX_ALIGN_TO - 1) & \ | |
56 | ~(WL1271_TX_ALIGN_TO - 1)) | |
57 | #define WL1271_TKIP_IV_SPACE 4 | |
58 | ||
59 | struct wl1271_tx_hw_descr { | |
60 | /* Length of packet in words, including descriptor+header+data */ | |
d0f63b20 | 61 | __le16 length; |
f5fc0f86 LC |
62 | /* Number of extra memory blocks to allocate for this packet in |
63 | addition to the number of blocks derived from the packet length */ | |
64 | u8 extra_mem_blocks; | |
65 | /* Total number of memory blocks allocated by the host for this packet. | |
66 | Must be equal or greater than the actual blocks number allocated by | |
67 | HW!! */ | |
68 | u8 total_mem_blocks; | |
69 | /* Device time (in us) when the packet arrived to the driver */ | |
d0f63b20 | 70 | __le32 start_time; |
f5fc0f86 LC |
71 | /* Max delay in TUs until transmission. The last device time the |
72 | packet can be transmitted is: startTime+(1024*LifeTime) */ | |
d0f63b20 | 73 | __le16 life_time; |
f5fc0f86 | 74 | /* Bitwise fields - see TX_ATTR... definitions above. */ |
d0f63b20 | 75 | __le16 tx_attr; |
f5fc0f86 LC |
76 | /* Packet identifier used also in the Tx-Result. */ |
77 | u8 id; | |
78 | /* The packet TID value (as User-Priority) */ | |
79 | u8 tid; | |
80 | /* Identifier of the remote STA in IBSS, 1 in infra-BSS */ | |
81 | u8 aid; | |
82 | u8 reserved; | |
ba2d3587 | 83 | } __packed; |
f5fc0f86 LC |
84 | |
85 | enum wl1271_tx_hw_res_status { | |
86 | TX_SUCCESS = 0, | |
87 | TX_HW_ERROR = 1, | |
88 | TX_DISABLED = 2, | |
89 | TX_RETRY_EXCEEDED = 3, | |
90 | TX_TIMEOUT = 4, | |
91 | TX_KEY_NOT_FOUND = 5, | |
92 | TX_PEER_NOT_FOUND = 6, | |
93 | TX_SESSION_MISMATCH = 7 | |
94 | }; | |
95 | ||
96 | struct wl1271_tx_hw_res_descr { | |
97 | /* Packet Identifier - same value used in the Tx descriptor.*/ | |
98 | u8 id; | |
99 | /* The status of the transmission, indicating success or one of | |
100 | several possible reasons for failure. */ | |
101 | u8 status; | |
102 | /* Total air access duration including all retrys and overheads.*/ | |
d0f63b20 | 103 | __le16 medium_usage; |
f5fc0f86 | 104 | /* The time passed from host xfer to Tx-complete.*/ |
d0f63b20 | 105 | __le32 fw_handling_time; |
f5fc0f86 LC |
106 | /* Total media delay |
107 | (from 1st EDCA AIFS counter until TX Complete). */ | |
d0f63b20 | 108 | __le32 medium_delay; |
f5fc0f86 LC |
109 | /* LS-byte of last TKIP seq-num (saved per AC for recovery). */ |
110 | u8 lsb_security_sequence_number; | |
111 | /* Retry count - number of transmissions without successful ACK.*/ | |
112 | u8 ack_failures; | |
113 | /* The rate that succeeded getting ACK | |
114 | (Valid only if status=SUCCESS). */ | |
115 | u8 rate_class_index; | |
116 | /* for 4-byte alignment. */ | |
117 | u8 spare; | |
ba2d3587 | 118 | } __packed; |
f5fc0f86 LC |
119 | |
120 | struct wl1271_tx_hw_res_if { | |
d0f63b20 LC |
121 | __le32 tx_result_fw_counter; |
122 | __le32 tx_result_host_counter; | |
f5fc0f86 | 123 | struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN]; |
ba2d3587 | 124 | } __packed; |
f5fc0f86 | 125 | |
c6999d83 KV |
126 | static inline int wl1271_tx_get_queue(int queue) |
127 | { | |
c6999d83 KV |
128 | switch (queue) { |
129 | case 0: | |
130 | return CONF_TX_AC_VO; | |
131 | case 1: | |
132 | return CONF_TX_AC_VI; | |
133 | case 2: | |
134 | return CONF_TX_AC_BE; | |
135 | case 3: | |
136 | return CONF_TX_AC_BK; | |
137 | default: | |
138 | return CONF_TX_AC_BE; | |
139 | } | |
140 | } | |
141 | ||
142 | /* wl1271 tx descriptor needs the tid and we need to convert it from ac */ | |
143 | static inline int wl1271_tx_ac_to_tid(int ac) | |
144 | { | |
145 | switch (ac) { | |
146 | case 0: | |
147 | return 0; | |
148 | case 1: | |
149 | return 2; | |
150 | case 2: | |
151 | return 4; | |
152 | case 3: | |
153 | return 6; | |
154 | default: | |
155 | return 0; | |
156 | } | |
157 | } | |
158 | ||
f5fc0f86 | 159 | void wl1271_tx_work(struct work_struct *work); |
ffb591cd | 160 | void wl1271_tx_complete(struct wl1271 *wl); |
f5fc0f86 | 161 | void wl1271_tx_flush(struct wl1271 *wl); |
31627dc5 | 162 | u8 wl1271_rate_to_idx(struct wl1271 *wl, int rate); |
ebba60c6 | 163 | u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set); |
f5fc0f86 LC |
164 | |
165 | #endif |