Commit | Line | Data |
---|---|---|
f5fc0f86 LC |
1 | /* |
2 | * This file is part of wl1271 | |
3 | * | |
4 | * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. | |
5 | * Copyright (C) 2008-2009 Nokia Corporation | |
6 | * | |
7 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU General Public License | |
11 | * version 2 as published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, but | |
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
16 | * General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | |
21 | * 02110-1301 USA | |
22 | * | |
23 | */ | |
24 | ||
00d20100 SL |
25 | #ifndef __WL12XX_H__ |
26 | #define __WL12XX_H__ | |
f5fc0f86 LC |
27 | |
28 | #include <linux/mutex.h> | |
29 | #include <linux/completion.h> | |
30 | #include <linux/spinlock.h> | |
31 | #include <linux/list.h> | |
32 | #include <linux/bitops.h> | |
33 | #include <net/mac80211.h> | |
34 | ||
00d20100 SL |
35 | #include "conf.h" |
36 | #include "ini.h" | |
2b60100b | 37 | |
f5fc0f86 LC |
38 | #define DRIVER_NAME "wl1271" |
39 | #define DRIVER_PREFIX DRIVER_NAME ": " | |
40 | ||
4b7fac77 LS |
41 | /* |
42 | * FW versions support BA 11n | |
43 | * versions marks x.x.x.50-60.x | |
44 | */ | |
45 | #define WL12XX_BA_SUPPORT_FW_COST_VER2_START 50 | |
46 | #define WL12XX_BA_SUPPORT_FW_COST_VER2_END 60 | |
47 | ||
f5fc0f86 LC |
48 | enum { |
49 | DEBUG_NONE = 0, | |
50 | DEBUG_IRQ = BIT(0), | |
51 | DEBUG_SPI = BIT(1), | |
52 | DEBUG_BOOT = BIT(2), | |
53 | DEBUG_MAILBOX = BIT(3), | |
c8c90873 | 54 | DEBUG_TESTMODE = BIT(4), |
f5fc0f86 LC |
55 | DEBUG_EVENT = BIT(5), |
56 | DEBUG_TX = BIT(6), | |
57 | DEBUG_RX = BIT(7), | |
58 | DEBUG_SCAN = BIT(8), | |
59 | DEBUG_CRYPT = BIT(9), | |
60 | DEBUG_PSM = BIT(10), | |
61 | DEBUG_MAC80211 = BIT(11), | |
62 | DEBUG_CMD = BIT(12), | |
63 | DEBUG_ACX = BIT(13), | |
a3b8ea75 | 64 | DEBUG_SDIO = BIT(14), |
14b228a0 | 65 | DEBUG_FILTERS = BIT(15), |
5da11dcd | 66 | DEBUG_ADHOC = BIT(16), |
e78a287a AN |
67 | DEBUG_AP = BIT(17), |
68 | DEBUG_MASTER = (DEBUG_ADHOC | DEBUG_AP), | |
f5fc0f86 LC |
69 | DEBUG_ALL = ~0, |
70 | }; | |
71 | ||
17c1755c | 72 | extern u32 wl12xx_debug_level; |
f5fc0f86 LC |
73 | |
74 | #define DEBUG_DUMP_LIMIT 1024 | |
75 | ||
76 | #define wl1271_error(fmt, arg...) \ | |
17c1755c | 77 | pr_err(DRIVER_PREFIX "ERROR " fmt "\n", ##arg) |
f5fc0f86 LC |
78 | |
79 | #define wl1271_warning(fmt, arg...) \ | |
17c1755c | 80 | pr_warning(DRIVER_PREFIX "WARNING " fmt "\n", ##arg) |
f5fc0f86 LC |
81 | |
82 | #define wl1271_notice(fmt, arg...) \ | |
17c1755c | 83 | pr_info(DRIVER_PREFIX fmt "\n", ##arg) |
f5fc0f86 LC |
84 | |
85 | #define wl1271_info(fmt, arg...) \ | |
17c1755c | 86 | pr_info(DRIVER_PREFIX fmt "\n", ##arg) |
f5fc0f86 LC |
87 | |
88 | #define wl1271_debug(level, fmt, arg...) \ | |
89 | do { \ | |
17c1755c EP |
90 | if (level & wl12xx_debug_level) \ |
91 | pr_debug(DRIVER_PREFIX fmt "\n", ##arg); \ | |
f5fc0f86 LC |
92 | } while (0) |
93 | ||
17c1755c | 94 | /* TODO: use pr_debug_hex_dump when it will be available */ |
f5fc0f86 LC |
95 | #define wl1271_dump(level, prefix, buf, len) \ |
96 | do { \ | |
17c1755c | 97 | if (level & wl12xx_debug_level) \ |
f5fc0f86 LC |
98 | print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ |
99 | DUMP_PREFIX_OFFSET, 16, 1, \ | |
100 | buf, \ | |
101 | min_t(size_t, len, DEBUG_DUMP_LIMIT), \ | |
102 | 0); \ | |
103 | } while (0) | |
104 | ||
105 | #define wl1271_dump_ascii(level, prefix, buf, len) \ | |
106 | do { \ | |
17c1755c | 107 | if (level & wl12xx_debug_level) \ |
f5fc0f86 LC |
108 | print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \ |
109 | DUMP_PREFIX_OFFSET, 16, 1, \ | |
110 | buf, \ | |
111 | min_t(size_t, len, DEBUG_DUMP_LIMIT), \ | |
112 | true); \ | |
113 | } while (0) | |
114 | ||
ae113b57 | 115 | #define WL1271_DEFAULT_STA_RX_CONFIG (CFG_UNI_FILTER_EN | \ |
c87dec9f JO |
116 | CFG_BSSID_FILTER_EN | \ |
117 | CFG_MC_FILTER_EN) | |
f5fc0f86 | 118 | |
ae113b57 | 119 | #define WL1271_DEFAULT_STA_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \ |
f5fc0f86 LC |
120 | CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \ |
121 | CFG_RX_CTL_EN | CFG_RX_BCN_EN | \ | |
122 | CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN) | |
123 | ||
ae113b57 AN |
124 | #define WL1271_DEFAULT_AP_RX_CONFIG 0 |
125 | ||
126 | #define WL1271_DEFAULT_AP_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PREQ_EN | \ | |
127 | CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \ | |
128 | CFG_RX_CTL_EN | CFG_RX_AUTH_EN | \ | |
129 | CFG_RX_ASSOC_EN) | |
130 | ||
131 | ||
132 | ||
f62c317c SJ |
133 | #define WL1271_FW_NAME "ti-connectivity/wl1271-fw-2.bin" |
134 | #define WL1271_AP_FW_NAME "ti-connectivity/wl1271-fw-ap.bin" | |
166d504e | 135 | |
f62c317c | 136 | #define WL1271_NVS_NAME "ti-connectivity/wl1271-nvs.bin" |
152ee6e0 | 137 | |
04e36fc5 JO |
138 | #define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff)) |
139 | #define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff)) | |
140 | ||
7a55724e JO |
141 | #define WL1271_CIPHER_SUITE_GEM 0x00147201 |
142 | ||
259da430 | 143 | #define WL1271_BUSY_WORD_CNT 1 |
545f1da8 | 144 | #define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32)) |
f5fc0f86 LC |
145 | |
146 | #define WL1271_ELP_HW_STATE_ASLEEP 0 | |
147 | #define WL1271_ELP_HW_STATE_IRQ 1 | |
148 | ||
d94cd297 JO |
149 | #define WL1271_DEFAULT_BEACON_INT 100 |
150 | #define WL1271_DEFAULT_DTIM_PERIOD 1 | |
151 | ||
98bdaabb AN |
152 | #define WL1271_AP_GLOBAL_HLID 0 |
153 | #define WL1271_AP_BROADCAST_HLID 1 | |
154 | #define WL1271_AP_STA_HLID_START 2 | |
155 | ||
b622d992 AN |
156 | /* |
157 | * When in AP-mode, we allow (at least) this number of mem-blocks | |
158 | * to be transmitted to FW for a STA in PS-mode. Only when packets are | |
159 | * present in the FW buffers it will wake the sleeping STA. We want to put | |
160 | * enough packets for the driver to transmit all of its buffered data before | |
161 | * the STA goes to sleep again. But we don't want to take too much mem-blocks | |
162 | * as it might hurt the throughput of active STAs. | |
163 | * The number of blocks (18) is enough for 2 large packets. | |
164 | */ | |
165 | #define WL1271_PS_STA_MAX_BLOCKS (2 * 9) | |
166 | ||
98bdaabb AN |
167 | #define WL1271_AP_BSS_INDEX 0 |
168 | #define WL1271_AP_DEF_INACTIV_SEC 300 | |
169 | #define WL1271_AP_DEF_BEACON_EXP 20 | |
170 | ||
c87dec9f | 171 | #define ACX_TX_DESCRIPTORS 32 |
be7078c2 | 172 | |
1f37cbc9 IY |
173 | #define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE) |
174 | ||
f5fc0f86 LC |
175 | enum wl1271_state { |
176 | WL1271_STATE_OFF, | |
177 | WL1271_STATE_ON, | |
178 | WL1271_STATE_PLT, | |
179 | }; | |
180 | ||
181 | enum wl1271_partition_type { | |
182 | PART_DOWN, | |
183 | PART_WORK, | |
184 | PART_DRPW, | |
185 | ||
186 | PART_TABLE_LEN | |
187 | }; | |
188 | ||
189 | struct wl1271_partition { | |
190 | u32 size; | |
191 | u32 start; | |
192 | }; | |
193 | ||
194 | struct wl1271_partition_set { | |
195 | struct wl1271_partition mem; | |
196 | struct wl1271_partition reg; | |
451de97a JO |
197 | struct wl1271_partition mem2; |
198 | struct wl1271_partition mem3; | |
f5fc0f86 LC |
199 | }; |
200 | ||
201 | struct wl1271; | |
202 | ||
4b7fac77 LS |
203 | #define WL12XX_NUM_FW_VER 5 |
204 | ||
f5fc0f86 LC |
205 | /* FIXME: I'm not sure about this structure name */ |
206 | struct wl1271_chip { | |
207 | u32 id; | |
4b7fac77 LS |
208 | char fw_ver_str[ETHTOOL_BUSINFO_LEN]; |
209 | unsigned int fw_ver[WL12XX_NUM_FW_VER]; | |
f5fc0f86 LC |
210 | }; |
211 | ||
212 | struct wl1271_stats { | |
213 | struct acx_statistics *fw_stats; | |
214 | unsigned long fw_stats_update; | |
215 | ||
216 | unsigned int retry_count; | |
217 | unsigned int excessive_retries; | |
218 | }; | |
219 | ||
f5fc0f86 LC |
220 | #define NUM_TX_QUEUES 4 |
221 | #define NUM_RX_PKT_DESC 8 | |
222 | ||
beb6c880 AN |
223 | #define AP_MAX_STATIONS 5 |
224 | ||
225 | /* Broadcast and Global links + links to stations */ | |
226 | #define AP_MAX_LINKS (AP_MAX_STATIONS + 2) | |
227 | ||
c8bde243 EP |
228 | /* FW status registers common for AP/STA */ |
229 | struct wl1271_fw_common_status { | |
d0f63b20 | 230 | __le32 intr; |
f5fc0f86 LC |
231 | u8 fw_rx_counter; |
232 | u8 drv_rx_counter; | |
233 | u8 reserved; | |
234 | u8 tx_results_counter; | |
d0f63b20 LC |
235 | __le32 rx_pkt_descs[NUM_RX_PKT_DESC]; |
236 | __le32 tx_released_blks[NUM_TX_QUEUES]; | |
237 | __le32 fw_localtime; | |
c8bde243 EP |
238 | } __packed; |
239 | ||
240 | /* FW status registers for AP */ | |
241 | struct wl1271_fw_ap_status { | |
242 | struct wl1271_fw_common_status common; | |
beb6c880 AN |
243 | |
244 | /* Next fields valid only in AP FW */ | |
245 | ||
246 | /* | |
247 | * A bitmap (where each bit represents a single HLID) | |
248 | * to indicate if the station is in PS mode. | |
249 | */ | |
250 | __le32 link_ps_bitmap; | |
251 | ||
252 | /* Number of freed MBs per HLID */ | |
253 | u8 tx_lnk_free_blks[AP_MAX_LINKS]; | |
254 | u8 padding_1[1]; | |
ba2d3587 | 255 | } __packed; |
f5fc0f86 | 256 | |
c8bde243 EP |
257 | /* FW status registers for STA */ |
258 | struct wl1271_fw_sta_status { | |
259 | struct wl1271_fw_common_status common; | |
260 | ||
261 | u8 tx_total; | |
262 | u8 reserved1; | |
263 | __le16 reserved2; | |
264 | } __packed; | |
265 | ||
266 | struct wl1271_fw_full_status { | |
267 | union { | |
268 | struct wl1271_fw_common_status common; | |
269 | struct wl1271_fw_sta_status sta; | |
270 | struct wl1271_fw_ap_status ap; | |
271 | }; | |
272 | } __packed; | |
273 | ||
274 | ||
f5fc0f86 LC |
275 | struct wl1271_rx_mem_pool_addr { |
276 | u32 addr; | |
277 | u32 addr_extra; | |
278 | }; | |
279 | ||
abb0b3bf | 280 | struct wl1271_scan { |
4fb26fa9 | 281 | struct cfg80211_scan_request *req; |
08688d6b | 282 | bool *scanned_ch; |
78abd320 | 283 | bool failed; |
abb0b3bf TP |
284 | u8 state; |
285 | u8 ssid[IW_ESSID_MAX_SIZE+1]; | |
286 | size_t ssid_len; | |
abb0b3bf TP |
287 | }; |
288 | ||
8197b711 TP |
289 | struct wl1271_if_operations { |
290 | void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len, | |
291 | bool fixed); | |
292 | void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len, | |
293 | bool fixed); | |
294 | void (*reset)(struct wl1271 *wl); | |
295 | void (*init)(struct wl1271 *wl); | |
2cc78ff7 | 296 | int (*power)(struct wl1271 *wl, bool enable); |
8197b711 TP |
297 | struct device* (*dev)(struct wl1271 *wl); |
298 | void (*enable_irq)(struct wl1271 *wl); | |
299 | void (*disable_irq)(struct wl1271 *wl); | |
300 | }; | |
301 | ||
7f179b46 AN |
302 | #define MAX_NUM_KEYS 14 |
303 | #define MAX_KEY_SIZE 32 | |
304 | ||
305 | struct wl1271_ap_key { | |
306 | u8 id; | |
307 | u8 key_type; | |
308 | u8 key_size; | |
309 | u8 key[MAX_KEY_SIZE]; | |
310 | u8 hlid; | |
311 | u32 tx_seq_32; | |
312 | u16 tx_seq_16; | |
313 | }; | |
314 | ||
72c2d9e5 EP |
315 | enum wl12xx_flags { |
316 | WL1271_FLAG_STA_ASSOCIATED, | |
317 | WL1271_FLAG_JOINED, | |
318 | WL1271_FLAG_GPIO_POWER, | |
319 | WL1271_FLAG_TX_QUEUE_STOPPED, | |
320 | WL1271_FLAG_IN_ELP, | |
321 | WL1271_FLAG_PSM, | |
322 | WL1271_FLAG_PSM_REQUESTED, | |
72c2d9e5 EP |
323 | WL1271_FLAG_IRQ_RUNNING, |
324 | WL1271_FLAG_IDLE, | |
325 | WL1271_FLAG_IDLE_REQUESTED, | |
326 | WL1271_FLAG_PSPOLL_FAILURE, | |
327 | WL1271_FLAG_STA_STATE_SENT, | |
328 | WL1271_FLAG_FW_TX_BUSY, | |
329 | WL1271_FLAG_AP_STARTED | |
330 | }; | |
331 | ||
a8c0ddb5 AN |
332 | struct wl1271_link { |
333 | /* AP-mode - TX queue per AC in link */ | |
334 | struct sk_buff_head tx_queue[NUM_TX_QUEUES]; | |
09039f42 AN |
335 | |
336 | /* accounting for allocated / available TX blocks in FW */ | |
337 | u8 allocated_blks; | |
338 | u8 prev_freed_blks; | |
b622d992 AN |
339 | |
340 | u8 addr[ETH_ALEN]; | |
a8c0ddb5 AN |
341 | }; |
342 | ||
f5fc0f86 | 343 | struct wl1271 { |
3b56dd6a | 344 | struct platform_device *plat_dev; |
f5fc0f86 LC |
345 | struct ieee80211_hw *hw; |
346 | bool mac80211_registered; | |
347 | ||
8197b711 TP |
348 | void *if_priv; |
349 | ||
350 | struct wl1271_if_operations *if_ops; | |
f5fc0f86 LC |
351 | |
352 | void (*set_power)(bool enable); | |
353 | int irq; | |
15cea993 | 354 | int ref_clock; |
f5fc0f86 LC |
355 | |
356 | spinlock_t wl_lock; | |
357 | ||
358 | enum wl1271_state state; | |
359 | struct mutex mutex; | |
360 | ||
830fb67b JO |
361 | unsigned long flags; |
362 | ||
451de97a | 363 | struct wl1271_partition_set part; |
f5fc0f86 LC |
364 | |
365 | struct wl1271_chip chip; | |
366 | ||
367 | int cmd_box_addr; | |
368 | int event_box_addr; | |
369 | ||
370 | u8 *fw; | |
371 | size_t fw_len; | |
166d504e | 372 | u8 fw_bss_type; |
152ee6e0 | 373 | struct wl1271_nvs_file *nvs; |
02fabb0e | 374 | size_t nvs_len; |
f5fc0f86 | 375 | |
d717fd61 JO |
376 | s8 hw_pg_ver; |
377 | ||
f5fc0f86 LC |
378 | u8 bssid[ETH_ALEN]; |
379 | u8 mac_addr[ETH_ALEN]; | |
380 | u8 bss_type; | |
5da11dcd | 381 | u8 set_bss_type; |
f5fc0f86 LC |
382 | u8 ssid[IW_ESSID_MAX_SIZE + 1]; |
383 | u8 ssid_len; | |
f5fc0f86 LC |
384 | int channel; |
385 | ||
386 | struct wl1271_acx_mem_map *target_mem_map; | |
387 | ||
388 | /* Accounting for allocated / available TX blocks on HW */ | |
389 | u32 tx_blocks_freed[NUM_TX_QUEUES]; | |
390 | u32 tx_blocks_available; | |
ffb591cd | 391 | u32 tx_results_count; |
f5fc0f86 LC |
392 | |
393 | /* Transmitted TX packets counter for chipset interface */ | |
ffb591cd | 394 | u32 tx_packets_count; |
f5fc0f86 LC |
395 | |
396 | /* Time-offset between host and chipset clocks */ | |
ac5e1e39 | 397 | s64 time_offset; |
f5fc0f86 LC |
398 | |
399 | /* Session counter for the chipset */ | |
400 | int session_counter; | |
401 | ||
402 | /* Frames scheduled for transmission, not handled yet */ | |
6742f554 JO |
403 | struct sk_buff_head tx_queue[NUM_TX_QUEUES]; |
404 | int tx_queue_count; | |
f5fc0f86 | 405 | |
a620865e IY |
406 | /* Frames received, not handled yet by mac80211 */ |
407 | struct sk_buff_head deferred_rx_queue; | |
408 | ||
409 | /* Frames sent, not returned yet to mac80211 */ | |
410 | struct sk_buff_head deferred_tx_queue; | |
411 | ||
f5fc0f86 | 412 | struct work_struct tx_work; |
c87dec9f | 413 | |
f5fc0f86 | 414 | /* Pending TX frames */ |
25eeb9e3 | 415 | unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)]; |
be7078c2 | 416 | struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS]; |
781608c4 | 417 | int tx_frames_cnt; |
f5fc0f86 | 418 | |
ac4e4ce5 JO |
419 | /* Security sequence number counters */ |
420 | u8 tx_security_last_seq; | |
04e36fc5 | 421 | s64 tx_security_seq; |
ac4e4ce5 | 422 | |
f5fc0f86 LC |
423 | /* FW Rx counter */ |
424 | u32 rx_counter; | |
425 | ||
426 | /* Rx memory pool address */ | |
427 | struct wl1271_rx_mem_pool_addr rx_mem_pool_addr; | |
428 | ||
1f37cbc9 IY |
429 | /* Intermediate buffer, used for packet aggregation */ |
430 | u8 *aggr_buf; | |
431 | ||
a620865e IY |
432 | /* Network stack work */ |
433 | struct work_struct netstack_work; | |
f5fc0f86 | 434 | |
52b0e7a6 JO |
435 | /* Hardware recovery work */ |
436 | struct work_struct recovery_work; | |
437 | ||
f5fc0f86 LC |
438 | /* The mbox event mask */ |
439 | u32 event_mask; | |
440 | ||
441 | /* Mailbox pointers */ | |
442 | u32 mbox_ptr[2]; | |
443 | ||
444 | /* Are we currently scanning */ | |
abb0b3bf | 445 | struct wl1271_scan scan; |
78abd320 | 446 | struct delayed_work scan_complete_work; |
f5fc0f86 | 447 | |
2f6724b2 JO |
448 | /* probe-req template for the current AP */ |
449 | struct sk_buff *probereq; | |
450 | ||
f5fc0f86 LC |
451 | /* Our association ID */ |
452 | u16 aid; | |
453 | ||
e8b03a2b SL |
454 | /* |
455 | * currently configured rate set: | |
456 | * bits 0-15 - 802.11abg rates | |
457 | * bits 16-23 - 802.11n MCS index mask | |
458 | * support only 1 stream, thus only 8 bits for the MCS rates (0-7). | |
459 | */ | |
d94cd297 | 460 | u32 basic_rate_set; |
ebba60c6 | 461 | u32 basic_rate; |
830fb67b | 462 | u32 rate_set; |
d94cd297 | 463 | |
8a5a37a6 JO |
464 | /* The current band */ |
465 | enum ieee80211_band band; | |
466 | ||
60e84c2e JO |
467 | /* Beaconing interval (needed for ad-hoc) */ |
468 | u32 beacon_int; | |
469 | ||
f5fc0f86 LC |
470 | /* Default key (for WEP) */ |
471 | u32 default_key; | |
472 | ||
14b228a0 | 473 | unsigned int filters; |
f5fc0f86 LC |
474 | unsigned int rx_config; |
475 | unsigned int rx_filter; | |
476 | ||
f5fc0f86 | 477 | struct completion *elp_compl; |
37b70a81 | 478 | struct delayed_work elp_work; |
90494a90 JO |
479 | struct delayed_work pspoll_work; |
480 | ||
481 | /* counter for ps-poll delivery failures */ | |
482 | int ps_poll_failures; | |
f5fc0f86 | 483 | |
19ad0715 JO |
484 | /* retry counter for PSM entries */ |
485 | u8 psm_entry_retry; | |
486 | ||
f5fc0f86 LC |
487 | /* in dBm */ |
488 | int power_level; | |
489 | ||
00236aed JO |
490 | int rssi_thold; |
491 | int last_rssi_event; | |
492 | ||
f5fc0f86 | 493 | struct wl1271_stats stats; |
f5fc0f86 | 494 | |
554d7209 | 495 | __le32 buffer_32; |
f5fc0f86 | 496 | u32 buffer_cmd; |
545f1da8 | 497 | u32 buffer_busyword[WL1271_BUSY_WORD_CNT]; |
f5fc0f86 | 498 | |
c8bde243 | 499 | struct wl1271_fw_full_status *fw_status; |
f5fc0f86 | 500 | struct wl1271_tx_hw_res_if *tx_res_if; |
b771eee5 JO |
501 | |
502 | struct ieee80211_vif *vif; | |
d6e19d13 | 503 | |
2b60100b JO |
504 | /* Current chipset configuration */ |
505 | struct conf_drv_settings conf; | |
01c09162 | 506 | |
7fc3a864 JO |
507 | bool sg_enabled; |
508 | ||
02fabb0e JO |
509 | bool enable_11a; |
510 | ||
01c09162 | 511 | struct list_head list; |
ece550d0 JL |
512 | |
513 | /* Most recently reported noise in dBm */ | |
514 | s8 noise; | |
f84f7d78 AN |
515 | |
516 | /* map for HLIDs of associated stations - when operating in AP mode */ | |
517 | unsigned long ap_hlid_map[BITS_TO_LONGS(AP_MAX_STATIONS)]; | |
7f179b46 AN |
518 | |
519 | /* recoreded keys for AP-mode - set here before AP startup */ | |
520 | struct wl1271_ap_key *recorded_ap_keys[MAX_NUM_KEYS]; | |
a8aaaf53 LC |
521 | |
522 | /* bands supported by this instance of wl12xx */ | |
523 | struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; | |
4b7fac77 LS |
524 | |
525 | /* RX BA constraint value */ | |
526 | bool ba_support; | |
4b7fac77 | 527 | u8 ba_rx_bitmap; |
a8c0ddb5 AN |
528 | |
529 | /* | |
530 | * AP-mode - links indexed by HLID. The global and broadcast links | |
531 | * are always active. | |
532 | */ | |
533 | struct wl1271_link links[AP_MAX_LINKS]; | |
534 | ||
535 | /* the hlid of the link where the last transmitted skb came from */ | |
536 | int last_tx_hlid; | |
b622d992 AN |
537 | |
538 | /* AP-mode - a bitmap of links currently in PS mode according to FW */ | |
539 | u32 ap_fw_ps_map; | |
540 | ||
541 | /* AP-mode - a bitmap of links currently in PS mode in mac80211 */ | |
542 | unsigned long ap_ps_map; | |
606ea9fa IY |
543 | |
544 | /* Quirks of specific hardware revisions */ | |
545 | unsigned int quirks; | |
f84f7d78 AN |
546 | }; |
547 | ||
548 | struct wl1271_station { | |
549 | u8 hlid; | |
f5fc0f86 LC |
550 | }; |
551 | ||
552 | int wl1271_plt_start(struct wl1271 *wl); | |
553 | int wl1271_plt_stop(struct wl1271 *wl); | |
554 | ||
555 | #define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */ | |
556 | ||
557 | #define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */ | |
558 | ||
559 | #define WL1271_DEFAULT_POWER_LEVEL 0 | |
560 | ||
06f7bc7d JO |
561 | #define WL1271_TX_QUEUE_LOW_WATERMARK 10 |
562 | #define WL1271_TX_QUEUE_HIGH_WATERMARK 25 | |
f5fc0f86 | 563 | |
a620865e IY |
564 | #define WL1271_DEFERRED_QUEUE_LIMIT 64 |
565 | ||
01ac17ec JO |
566 | /* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power |
567 | on in case is has been shut down shortly before */ | |
e8a8b252 SW |
568 | #define WL1271_PRE_POWER_ON_SLEEP 20 /* in milliseconds */ |
569 | #define WL1271_POWER_ON_SLEEP 200 /* in milliseconds */ | |
f5fc0f86 | 570 | |
e8b03a2b SL |
571 | /* Macros to handle wl1271.sta_rate_set */ |
572 | #define HW_BG_RATES_MASK 0xffff | |
573 | #define HW_HT_RATES_OFFSET 16 | |
574 | ||
606ea9fa IY |
575 | /* Quirks */ |
576 | ||
577 | /* Each RX/TX transaction requires an end-of-transaction transfer */ | |
578 | #define WL12XX_QUIRK_END_OF_TRANSACTION BIT(0) | |
579 | ||
f5fc0f86 | 580 | #endif |