zd1211rw: move set_multicast_hash and set_rx_filter from workers to configure_filter
[deliverable/linux.git] / drivers / net / wireless / zd1211rw / zd_mac.c
CommitLineData
66bb42fd 1/* ZD1211 USB-WLAN driver for Linux
459c51ad 2 *
66bb42fd
DD
3 * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
4 * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
5 * Copyright (C) 2006-2007 Michael Wu <flamingice@sourmilk.net>
e83a1070 6 * Copyright (C) 2007-2008 Luis R. Rodriguez <mcgrof@winlab.rutgers.edu>
e85d0918
DD
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23#include <linux/netdevice.h>
24#include <linux/etherdevice.h>
5a0e3ad6 25#include <linux/slab.h>
e85d0918
DD
26#include <linux/usb.h>
27#include <linux/jiffies.h>
28#include <net/ieee80211_radiotap.h>
29
30#include "zd_def.h"
31#include "zd_chip.h"
32#include "zd_mac.h"
e85d0918 33#include "zd_rf.h"
e85d0918 34
e83a1070
LR
35struct zd_reg_alpha2_map {
36 u32 reg;
37 char alpha2[2];
38};
39
40static struct zd_reg_alpha2_map reg_alpha2_map[] = {
41 { ZD_REGDOMAIN_FCC, "US" },
42 { ZD_REGDOMAIN_IC, "CA" },
43 { ZD_REGDOMAIN_ETSI, "DE" }, /* Generic ETSI, use most restrictive */
44 { ZD_REGDOMAIN_JAPAN, "JP" },
3d3b33bd
JL
45 { ZD_REGDOMAIN_JAPAN_2, "JP" },
46 { ZD_REGDOMAIN_JAPAN_3, "JP" },
e83a1070
LR
47 { ZD_REGDOMAIN_SPAIN, "ES" },
48 { ZD_REGDOMAIN_FRANCE, "FR" },
49};
50
459c51ad
DD
51/* This table contains the hardware specific values for the modulation rates. */
52static const struct ieee80211_rate zd_rates[] = {
8318d78a
JB
53 { .bitrate = 10,
54 .hw_value = ZD_CCK_RATE_1M, },
55 { .bitrate = 20,
56 .hw_value = ZD_CCK_RATE_2M,
57 .hw_value_short = ZD_CCK_RATE_2M | ZD_CCK_PREA_SHORT,
58 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
59 { .bitrate = 55,
60 .hw_value = ZD_CCK_RATE_5_5M,
61 .hw_value_short = ZD_CCK_RATE_5_5M | ZD_CCK_PREA_SHORT,
62 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
63 { .bitrate = 110,
64 .hw_value = ZD_CCK_RATE_11M,
65 .hw_value_short = ZD_CCK_RATE_11M | ZD_CCK_PREA_SHORT,
66 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
67 { .bitrate = 60,
68 .hw_value = ZD_OFDM_RATE_6M,
69 .flags = 0 },
70 { .bitrate = 90,
71 .hw_value = ZD_OFDM_RATE_9M,
72 .flags = 0 },
73 { .bitrate = 120,
74 .hw_value = ZD_OFDM_RATE_12M,
75 .flags = 0 },
76 { .bitrate = 180,
77 .hw_value = ZD_OFDM_RATE_18M,
78 .flags = 0 },
79 { .bitrate = 240,
80 .hw_value = ZD_OFDM_RATE_24M,
81 .flags = 0 },
82 { .bitrate = 360,
83 .hw_value = ZD_OFDM_RATE_36M,
84 .flags = 0 },
85 { .bitrate = 480,
86 .hw_value = ZD_OFDM_RATE_48M,
87 .flags = 0 },
88 { .bitrate = 540,
89 .hw_value = ZD_OFDM_RATE_54M,
90 .flags = 0 },
459c51ad
DD
91};
92
7f4013f0
BP
93/*
94 * Zydas retry rates table. Each line is listed in the same order as
95 * in zd_rates[] and contains all the rate used when a packet is sent
96 * starting with a given rates. Let's consider an example :
97 *
98 * "11 Mbits : 4, 3, 2, 1, 0" means :
99 * - packet is sent using 4 different rates
100 * - 1st rate is index 3 (ie 11 Mbits)
101 * - 2nd rate is index 2 (ie 5.5 Mbits)
102 * - 3rd rate is index 1 (ie 2 Mbits)
103 * - 4th rate is index 0 (ie 1 Mbits)
104 */
105
106static const struct tx_retry_rate zd_retry_rates[] = {
107 { /* 1 Mbits */ 1, { 0 }},
108 { /* 2 Mbits */ 2, { 1, 0 }},
109 { /* 5.5 Mbits */ 3, { 2, 1, 0 }},
110 { /* 11 Mbits */ 4, { 3, 2, 1, 0 }},
111 { /* 6 Mbits */ 5, { 4, 3, 2, 1, 0 }},
112 { /* 9 Mbits */ 6, { 5, 4, 3, 2, 1, 0}},
113 { /* 12 Mbits */ 5, { 6, 3, 2, 1, 0 }},
114 { /* 18 Mbits */ 6, { 7, 6, 3, 2, 1, 0 }},
115 { /* 24 Mbits */ 6, { 8, 6, 3, 2, 1, 0 }},
116 { /* 36 Mbits */ 7, { 9, 8, 6, 3, 2, 1, 0 }},
117 { /* 48 Mbits */ 8, {10, 9, 8, 6, 3, 2, 1, 0 }},
118 { /* 54 Mbits */ 9, {11, 10, 9, 8, 6, 3, 2, 1, 0 }}
119};
120
459c51ad 121static const struct ieee80211_channel zd_channels[] = {
8318d78a
JB
122 { .center_freq = 2412, .hw_value = 1 },
123 { .center_freq = 2417, .hw_value = 2 },
124 { .center_freq = 2422, .hw_value = 3 },
125 { .center_freq = 2427, .hw_value = 4 },
126 { .center_freq = 2432, .hw_value = 5 },
127 { .center_freq = 2437, .hw_value = 6 },
128 { .center_freq = 2442, .hw_value = 7 },
129 { .center_freq = 2447, .hw_value = 8 },
130 { .center_freq = 2452, .hw_value = 9 },
131 { .center_freq = 2457, .hw_value = 10 },
132 { .center_freq = 2462, .hw_value = 11 },
133 { .center_freq = 2467, .hw_value = 12 },
134 { .center_freq = 2472, .hw_value = 13 },
135 { .center_freq = 2484, .hw_value = 14 },
459c51ad 136};
e85d0918 137
583afd1e
UK
138static void housekeeping_init(struct zd_mac *mac);
139static void housekeeping_enable(struct zd_mac *mac);
140static void housekeeping_disable(struct zd_mac *mac);
141
e83a1070
LR
142static int zd_reg2alpha2(u8 regdomain, char *alpha2)
143{
144 unsigned int i;
145 struct zd_reg_alpha2_map *reg_map;
146 for (i = 0; i < ARRAY_SIZE(reg_alpha2_map); i++) {
147 reg_map = &reg_alpha2_map[i];
148 if (regdomain == reg_map->reg) {
149 alpha2[0] = reg_map->alpha2[0];
150 alpha2[1] = reg_map->alpha2[1];
151 return 0;
152 }
153 }
154 return 1;
155}
156
459c51ad 157int zd_mac_preinit_hw(struct ieee80211_hw *hw)
e85d0918
DD
158{
159 int r;
e85d0918 160 u8 addr[ETH_ALEN];
459c51ad 161 struct zd_mac *mac = zd_hw_mac(hw);
74553aed
DD
162
163 r = zd_chip_read_mac_addr_fw(&mac->chip, addr);
164 if (r)
165 return r;
166
459c51ad
DD
167 SET_IEEE80211_PERM_ADDR(hw, addr);
168
74553aed
DD
169 return 0;
170}
171
459c51ad 172int zd_mac_init_hw(struct ieee80211_hw *hw)
74553aed
DD
173{
174 int r;
459c51ad 175 struct zd_mac *mac = zd_hw_mac(hw);
74553aed 176 struct zd_chip *chip = &mac->chip;
e83a1070 177 char alpha2[2];
e85d0918
DD
178 u8 default_regdomain;
179
180 r = zd_chip_enable_int(chip);
181 if (r)
182 goto out;
74553aed 183 r = zd_chip_init_hw(chip);
e85d0918
DD
184 if (r)
185 goto disable_int;
186
e85d0918 187 ZD_ASSERT(!irqs_disabled());
e85d0918
DD
188
189 r = zd_read_regdomain(chip, &default_regdomain);
190 if (r)
191 goto disable_int;
e85d0918
DD
192 spin_lock_irq(&mac->lock);
193 mac->regdomain = mac->default_regdomain = default_regdomain;
194 spin_unlock_irq(&mac->lock);
e85d0918 195
40da08bc
DD
196 /* We must inform the device that we are doing encryption/decryption in
197 * software at the moment. */
198 r = zd_set_encryption_type(chip, ENC_SNIFFER);
e85d0918
DD
199 if (r)
200 goto disable_int;
201
e83a1070 202 r = zd_reg2alpha2(mac->regdomain, alpha2);
fe33eb39
LR
203 if (r)
204 goto disable_int;
e85d0918 205
fe33eb39 206 r = regulatory_hint(hw->wiphy, alpha2);
e85d0918
DD
207disable_int:
208 zd_chip_disable_int(chip);
209out:
210 return r;
211}
212
213void zd_mac_clear(struct zd_mac *mac)
214{
9cdac965 215 flush_workqueue(zd_workqueue);
e85d0918 216 zd_chip_clear(&mac->chip);
c48cf125
UK
217 ZD_ASSERT(!spin_is_locked(&mac->lock));
218 ZD_MEMCLEAR(mac, sizeof(struct zd_mac));
e85d0918
DD
219}
220
c5691235 221static int set_rx_filter(struct zd_mac *mac)
e85d0918 222{
459c51ad
DD
223 unsigned long flags;
224 u32 filter = STA_RX_FILTER;
e85d0918 225
459c51ad
DD
226 spin_lock_irqsave(&mac->lock, flags);
227 if (mac->pass_ctrl)
228 filter |= RX_FILTER_CTRL;
229 spin_unlock_irqrestore(&mac->lock, flags);
230
231 return zd_iowrite32(&mac->chip, CR_RX_FILTER, filter);
c5691235
UK
232}
233
234static int set_mc_hash(struct zd_mac *mac)
235{
236 struct zd_mc_hash hash;
c5691235 237 zd_mc_clear(&hash);
c5691235
UK
238 return zd_chip_set_multicast_hash(&mac->chip, &hash);
239}
240
459c51ad 241static int zd_op_start(struct ieee80211_hw *hw)
e85d0918 242{
459c51ad 243 struct zd_mac *mac = zd_hw_mac(hw);
e85d0918 244 struct zd_chip *chip = &mac->chip;
74553aed 245 struct zd_usb *usb = &chip->usb;
e85d0918
DD
246 int r;
247
74553aed
DD
248 if (!usb->initialized) {
249 r = zd_usb_init_hw(usb);
250 if (r)
251 goto out;
252 }
253
e85d0918
DD
254 r = zd_chip_enable_int(chip);
255 if (r < 0)
256 goto out;
257
258 r = zd_chip_set_basic_rates(chip, CR_RATES_80211B | CR_RATES_80211G);
259 if (r < 0)
260 goto disable_int;
c5691235 261 r = set_rx_filter(mac);
c5691235
UK
262 if (r)
263 goto disable_int;
264 r = set_mc_hash(mac);
e85d0918
DD
265 if (r)
266 goto disable_int;
267 r = zd_chip_switch_radio_on(chip);
268 if (r < 0)
269 goto disable_int;
459c51ad 270 r = zd_chip_enable_rxtx(chip);
e85d0918
DD
271 if (r < 0)
272 goto disable_radio;
273 r = zd_chip_enable_hwint(chip);
274 if (r < 0)
459c51ad 275 goto disable_rxtx;
e85d0918 276
583afd1e 277 housekeeping_enable(mac);
e85d0918 278 return 0;
459c51ad
DD
279disable_rxtx:
280 zd_chip_disable_rxtx(chip);
e85d0918
DD
281disable_radio:
282 zd_chip_switch_radio_off(chip);
283disable_int:
284 zd_chip_disable_int(chip);
285out:
286 return r;
287}
288
459c51ad
DD
289static void zd_op_stop(struct ieee80211_hw *hw)
290{
291 struct zd_mac *mac = zd_hw_mac(hw);
292 struct zd_chip *chip = &mac->chip;
293 struct sk_buff *skb;
294 struct sk_buff_head *ack_wait_queue = &mac->ack_wait_queue;
c9a4b35d 295
459c51ad 296 /* The order here deliberately is a little different from the open()
e85d0918 297 * method, since we need to make sure there is no opportunity for RX
459c51ad 298 * frames to be processed by mac80211 after we have stopped it.
e85d0918
DD
299 */
300
459c51ad 301 zd_chip_disable_rxtx(chip);
583afd1e 302 housekeeping_disable(mac);
b1382ede 303 flush_workqueue(zd_workqueue);
b1382ede 304
e85d0918
DD
305 zd_chip_disable_hwint(chip);
306 zd_chip_switch_radio_off(chip);
307 zd_chip_disable_int(chip);
308
e85d0918 309
459c51ad 310 while ((skb = skb_dequeue(ack_wait_queue)))
e039fa4a 311 dev_kfree_skb_any(skb);
e85d0918
DD
312}
313
459c51ad 314/**
7f4013f0 315 * zd_mac_tx_status - reports tx status of a packet if required
459c51ad
DD
316 * @hw - a &struct ieee80211_hw pointer
317 * @skb - a sk-buffer
e039fa4a
JB
318 * @flags: extra flags to set in the TX status info
319 * @ackssi: ACK signal strength
73ac36ea 320 * @success - True for successful transmission of the frame
459c51ad
DD
321 *
322 * This information calls ieee80211_tx_status_irqsafe() if required by the
323 * control information. It copies the control information into the status
324 * information.
325 *
326 * If no status information has been requested, the skb is freed.
327 */
7f4013f0
BP
328static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
329 int ackssi, struct tx_status *tx_status)
b1382ede 330{
e039fa4a 331 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
7f4013f0
BP
332 int i;
333 int success = 1, retry = 1;
334 int first_idx;
335 const struct tx_retry_rate *retries;
e039fa4a 336
e6a9854b 337 ieee80211_tx_info_clear_status(info);
b1382ede 338
7f4013f0
BP
339 if (tx_status) {
340 success = !tx_status->failure;
341 retry = tx_status->retry + success;
342 }
343
344 if (success) {
345 /* success */
e6a9854b 346 info->flags |= IEEE80211_TX_STAT_ACK;
7f4013f0
BP
347 } else {
348 /* failure */
349 info->flags &= ~IEEE80211_TX_STAT_ACK;
350 }
351
352 first_idx = info->status.rates[0].idx;
353 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
354 retries = &zd_retry_rates[first_idx];
86baf712 355 ZD_ASSERT(1 <= retry && retry <= retries->count);
7f4013f0
BP
356
357 info->status.rates[0].idx = retries->rate[0];
358 info->status.rates[0].count = 1; // (retry > 1 ? 2 : 1);
359
360 for (i=1; i<IEEE80211_TX_MAX_RATES-1 && i<retry; i++) {
361 info->status.rates[i].idx = retries->rate[i];
362 info->status.rates[i].count = 1; // ((i==retry-1) && success ? 1:2);
363 }
364 for (; i<IEEE80211_TX_MAX_RATES && i<retry; i++) {
86baf712 365 info->status.rates[i].idx = retries->rate[retry - 1];
7f4013f0
BP
366 info->status.rates[i].count = 1; // (success ? 1:2);
367 }
368 if (i<IEEE80211_TX_MAX_RATES)
369 info->status.rates[i].idx = -1; /* terminate */
370
e039fa4a
JB
371 info->status.ack_signal = ackssi;
372 ieee80211_tx_status_irqsafe(hw, skb);
b1382ede
DD
373}
374
459c51ad
DD
375/**
376 * zd_mac_tx_failed - callback for failed frames
377 * @dev: the mac80211 wireless device
378 *
303863f4 379 * This function is called if a frame couldn't be successfully
459c51ad
DD
380 * transferred. The first frame from the tx queue, will be selected and
381 * reported as error to the upper layers.
382 */
7f4013f0 383void zd_mac_tx_failed(struct urb *urb)
b1382ede 384{
7f4013f0
BP
385 struct ieee80211_hw * hw = zd_usb_to_hw(urb->context);
386 struct zd_mac *mac = zd_hw_mac(hw);
387 struct sk_buff_head *q = &mac->ack_wait_queue;
459c51ad 388 struct sk_buff *skb;
7f4013f0
BP
389 struct tx_status *tx_status = (struct tx_status *)urb->transfer_buffer;
390 unsigned long flags;
391 int success = !tx_status->failure;
392 int retry = tx_status->retry + success;
393 int found = 0;
394 int i, position = 0;
b1382ede 395
7f4013f0
BP
396 q = &mac->ack_wait_queue;
397 spin_lock_irqsave(&q->lock, flags);
398
399 skb_queue_walk(q, skb) {
400 struct ieee80211_hdr *tx_hdr;
401 struct ieee80211_tx_info *info;
402 int first_idx, final_idx;
403 const struct tx_retry_rate *retries;
404 u8 final_rate;
405
406 position ++;
407
408 /* if the hardware reports a failure and we had a 802.11 ACK
409 * pending, then we skip the first skb when searching for a
410 * matching frame */
411 if (tx_status->failure && mac->ack_pending &&
412 skb_queue_is_first(q, skb)) {
413 continue;
414 }
415
416 tx_hdr = (struct ieee80211_hdr *)skb->data;
417
418 /* we skip all frames not matching the reported destination */
419 if (unlikely(memcmp(tx_hdr->addr1, tx_status->mac, ETH_ALEN))) {
420 continue;
421 }
422
423 /* we skip all frames not matching the reported final rate */
5078ed50 424
7f4013f0
BP
425 info = IEEE80211_SKB_CB(skb);
426 first_idx = info->status.rates[0].idx;
427 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
428 retries = &zd_retry_rates[first_idx];
86baf712 429 if (retry <= 0 || retry > retries->count)
7f4013f0 430 continue;
7f4013f0 431
86baf712 432 final_idx = retries->rate[retry - 1];
7f4013f0
BP
433 final_rate = zd_rates[final_idx].hw_value;
434
435 if (final_rate != tx_status->rate) {
436 continue;
437 }
438
439 found = 1;
440 break;
441 }
442
443 if (found) {
444 for (i=1; i<=position; i++) {
445 skb = __skb_dequeue(q);
446 zd_mac_tx_status(hw, skb,
447 mac->ack_pending ? mac->ack_signal : 0,
448 i == position ? tx_status : NULL);
449 mac->ack_pending = 0;
450 }
451 }
452
453 spin_unlock_irqrestore(&q->lock, flags);
b1382ede
DD
454}
455
459c51ad
DD
456/**
457 * zd_mac_tx_to_dev - callback for USB layer
458 * @skb: a &sk_buff pointer
459 * @error: error value, 0 if transmission successful
460 *
461 * Informs the MAC layer that the frame has successfully transferred to the
462 * device. If an ACK is required and the transfer to the device has been
463 * successful, the packets are put on the @ack_wait_queue with
464 * the control set removed.
465 */
466void zd_mac_tx_to_dev(struct sk_buff *skb, int error)
467{
e039fa4a 468 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e6a9854b 469 struct ieee80211_hw *hw = info->rate_driver_data[0];
7f4013f0
BP
470 struct zd_mac *mac = zd_hw_mac(hw);
471
472 ieee80211_tx_info_clear_status(info);
b1382ede 473
e039fa4a
JB
474 skb_pull(skb, sizeof(struct zd_ctrlset));
475 if (unlikely(error ||
476 (info->flags & IEEE80211_TX_CTL_NO_ACK))) {
7f4013f0
BP
477 /*
478 * FIXME : do we need to fill in anything ?
479 */
480 ieee80211_tx_status_irqsafe(hw, skb);
459c51ad 481 } else {
7f4013f0 482 struct sk_buff_head *q = &mac->ack_wait_queue;
e039fa4a
JB
483
484 skb_queue_tail(q, skb);
7f4013f0
BP
485 while (skb_queue_len(q) > ZD_MAC_MAX_ACK_WAITERS) {
486 zd_mac_tx_status(hw, skb_dequeue(q),
487 mac->ack_pending ? mac->ack_signal : 0,
488 NULL);
489 mac->ack_pending = 0;
490 }
e85d0918 491 }
e85d0918
DD
492}
493
b1cd8416 494static int zd_calc_tx_length_us(u8 *service, u8 zd_rate, u16 tx_length)
e85d0918 495{
64f222cc 496 /* ZD_PURE_RATE() must be used to remove the modulation type flag of
459c51ad
DD
497 * the zd-rate values.
498 */
e85d0918 499 static const u8 rate_divisor[] = {
459c51ad
DD
500 [ZD_PURE_RATE(ZD_CCK_RATE_1M)] = 1,
501 [ZD_PURE_RATE(ZD_CCK_RATE_2M)] = 2,
502 /* Bits must be doubled. */
503 [ZD_PURE_RATE(ZD_CCK_RATE_5_5M)] = 11,
504 [ZD_PURE_RATE(ZD_CCK_RATE_11M)] = 11,
505 [ZD_PURE_RATE(ZD_OFDM_RATE_6M)] = 6,
506 [ZD_PURE_RATE(ZD_OFDM_RATE_9M)] = 9,
507 [ZD_PURE_RATE(ZD_OFDM_RATE_12M)] = 12,
508 [ZD_PURE_RATE(ZD_OFDM_RATE_18M)] = 18,
509 [ZD_PURE_RATE(ZD_OFDM_RATE_24M)] = 24,
510 [ZD_PURE_RATE(ZD_OFDM_RATE_36M)] = 36,
511 [ZD_PURE_RATE(ZD_OFDM_RATE_48M)] = 48,
512 [ZD_PURE_RATE(ZD_OFDM_RATE_54M)] = 54,
e85d0918
DD
513 };
514
515 u32 bits = (u32)tx_length * 8;
516 u32 divisor;
517
64f222cc 518 divisor = rate_divisor[ZD_PURE_RATE(zd_rate)];
e85d0918
DD
519 if (divisor == 0)
520 return -EINVAL;
521
b1cd8416
DD
522 switch (zd_rate) {
523 case ZD_CCK_RATE_5_5M:
e85d0918
DD
524 bits = (2*bits) + 10; /* round up to the next integer */
525 break;
b1cd8416 526 case ZD_CCK_RATE_11M:
e85d0918
DD
527 if (service) {
528 u32 t = bits % 11;
529 *service &= ~ZD_PLCP_SERVICE_LENGTH_EXTENSION;
530 if (0 < t && t <= 3) {
531 *service |= ZD_PLCP_SERVICE_LENGTH_EXTENSION;
532 }
533 }
534 bits += 10; /* round up to the next integer */
535 break;
536 }
537
538 return bits/divisor;
539}
540
e85d0918 541static void cs_set_control(struct zd_mac *mac, struct zd_ctrlset *cs,
e6a9854b
JB
542 struct ieee80211_hdr *header,
543 struct ieee80211_tx_info *info)
e85d0918 544{
e85d0918 545 /*
b1382ede 546 * CONTROL TODO:
e85d0918
DD
547 * - if backoff needed, enable bit 0
548 * - if burst (backoff not needed) disable bit 0
e85d0918
DD
549 */
550
551 cs->control = 0;
552
553 /* First fragment */
e6a9854b 554 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
e85d0918
DD
555 cs->control |= ZD_CS_NEED_RANDOM_BACKOFF;
556
13bdcd90
GS
557 /* No ACK expected (multicast, etc.) */
558 if (info->flags & IEEE80211_TX_CTL_NO_ACK)
559 cs->control |= ZD_CS_NO_ACK;
e85d0918
DD
560
561 /* PS-POLL */
85365820 562 if (ieee80211_is_pspoll(header->frame_control))
e85d0918
DD
563 cs->control |= ZD_CS_PS_POLL_FRAME;
564
e6a9854b 565 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
b1382ede
DD
566 cs->control |= ZD_CS_RTS;
567
e6a9854b 568 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
b1382ede 569 cs->control |= ZD_CS_SELF_CTS;
e85d0918
DD
570
571 /* FIXME: Management frame? */
572}
573
f2cae6c5 574static int zd_mac_config_beacon(struct ieee80211_hw *hw, struct sk_buff *beacon)
72e77a8a
LCC
575{
576 struct zd_mac *mac = zd_hw_mac(hw);
f2cae6c5 577 int r;
72e77a8a
LCC
578 u32 tmp, j = 0;
579 /* 4 more bytes for tail CRC */
580 u32 full_len = beacon->len + 4;
f2cae6c5
DD
581
582 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 0);
583 if (r < 0)
584 return r;
585 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp);
586 if (r < 0)
587 return r;
588
72e77a8a 589 while (tmp & 0x2) {
f2cae6c5
DD
590 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp);
591 if (r < 0)
592 return r;
72e77a8a
LCC
593 if ((++j % 100) == 0) {
594 printk(KERN_ERR "CR_BCN_FIFO_SEMAPHORE not ready\n");
595 if (j >= 500) {
596 printk(KERN_ERR "Giving up beacon config.\n");
f2cae6c5 597 return -ETIMEDOUT;
72e77a8a
LCC
598 }
599 }
600 msleep(1);
601 }
602
f2cae6c5
DD
603 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, full_len - 1);
604 if (r < 0)
605 return r;
606 if (zd_chip_is_zd1211b(&mac->chip)) {
607 r = zd_iowrite32(&mac->chip, CR_BCN_LENGTH, full_len - 1);
608 if (r < 0)
609 return r;
610 }
72e77a8a 611
f2cae6c5
DD
612 for (j = 0 ; j < beacon->len; j++) {
613 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO,
72e77a8a 614 *((u8 *)(beacon->data + j)));
f2cae6c5
DD
615 if (r < 0)
616 return r;
617 }
72e77a8a 618
f2cae6c5
DD
619 for (j = 0; j < 4; j++) {
620 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, 0x0);
621 if (r < 0)
622 return r;
623 }
624
625 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 1);
626 if (r < 0)
627 return r;
72e77a8a 628
72e77a8a
LCC
629 /* 802.11b/g 2.4G CCK 1Mb
630 * 802.11a, not yet implemented, uses different values (see GPL vendor
631 * driver)
632 */
f2cae6c5 633 return zd_iowrite32(&mac->chip, CR_BCN_PLCP_CFG, 0x00000400 |
72e77a8a
LCC
634 (full_len << 19));
635}
636
e85d0918 637static int fill_ctrlset(struct zd_mac *mac,
e039fa4a 638 struct sk_buff *skb)
e85d0918
DD
639{
640 int r;
459c51ad
DD
641 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
642 unsigned int frag_len = skb->len + FCS_LEN;
e85d0918 643 unsigned int packet_length;
2e92e6f2 644 struct ieee80211_rate *txrate;
e85d0918
DD
645 struct zd_ctrlset *cs = (struct zd_ctrlset *)
646 skb_push(skb, sizeof(struct zd_ctrlset));
e039fa4a 647 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
e85d0918 648
e85d0918 649 ZD_ASSERT(frag_len <= 0xffff);
e85d0918 650
e039fa4a 651 txrate = ieee80211_get_tx_rate(mac->hw, info);
2e92e6f2
JB
652
653 cs->modulation = txrate->hw_value;
e6a9854b 654 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
2e92e6f2 655 cs->modulation = txrate->hw_value_short;
e85d0918
DD
656
657 cs->tx_length = cpu_to_le16(frag_len);
658
e6a9854b 659 cs_set_control(mac, cs, hdr, info);
e85d0918
DD
660
661 packet_length = frag_len + sizeof(struct zd_ctrlset) + 10;
662 ZD_ASSERT(packet_length <= 0xffff);
663 /* ZD1211B: Computing the length difference this way, gives us
664 * flexibility to compute the packet length.
665 */
74553aed 666 cs->packet_length = cpu_to_le16(zd_chip_is_zd1211b(&mac->chip) ?
e85d0918
DD
667 packet_length - frag_len : packet_length);
668
669 /*
670 * CURRENT LENGTH:
671 * - transmit frame length in microseconds
672 * - seems to be derived from frame length
673 * - see Cal_Us_Service() in zdinlinef.h
674 * - if macp->bTxBurstEnable is enabled, then multiply by 4
675 * - bTxBurstEnable is never set in the vendor driver
676 *
677 * SERVICE:
678 * - "for PLCP configuration"
679 * - always 0 except in some situations at 802.11b 11M
680 * - see line 53 of zdinlinef.h
681 */
682 cs->service = 0;
64f222cc 683 r = zd_calc_tx_length_us(&cs->service, ZD_RATE(cs->modulation),
e85d0918
DD
684 le16_to_cpu(cs->tx_length));
685 if (r < 0)
686 return r;
687 cs->current_length = cpu_to_le16(r);
459c51ad 688 cs->next_frame_length = 0;
e85d0918
DD
689
690 return 0;
691}
692
459c51ad
DD
693/**
694 * zd_op_tx - transmits a network frame to the device
695 *
696 * @dev: mac80211 hardware device
697 * @skb: socket buffer
698 * @control: the control structure
699 *
700 * This function transmit an IEEE 802.11 network frame to the device. The
701 * control block of the skbuff will be initialized. If necessary the incoming
702 * mac80211 queues will be stopped.
703 */
e039fa4a 704static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
e85d0918 705{
459c51ad 706 struct zd_mac *mac = zd_hw_mac(hw);
e039fa4a 707 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
459c51ad 708 int r;
e85d0918 709
e039fa4a 710 r = fill_ctrlset(mac, skb);
459c51ad 711 if (r)
640c65ea 712 goto fail;
e85d0918 713
e6a9854b 714 info->rate_driver_data[0] = hw;
e039fa4a 715
459c51ad 716 r = zd_usb_tx(&mac->chip.usb, skb);
e039fa4a 717 if (r)
640c65ea
JM
718 goto fail;
719 return 0;
720
721fail:
722 dev_kfree_skb(skb);
e85d0918
DD
723 return 0;
724}
725
459c51ad
DD
726/**
727 * filter_ack - filters incoming packets for acknowledgements
728 * @dev: the mac80211 device
729 * @rx_hdr: received header
730 * @stats: the status for the received packet
741fec53 731 *
459c51ad
DD
732 * This functions looks for ACK packets and tries to match them with the
733 * frames in the tx queue. If a match is found the frame will be dequeued and
734 * the upper layers is informed about the successful transmission. If
735 * mac80211 queues have been stopped and the number of frames still to be
736 * transmitted is low the queues will be opened again.
e85d0918 737 *
459c51ad 738 * Returns 1 if the frame was an ACK, 0 if it was ignored.
e85d0918 739 */
459c51ad
DD
740static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr,
741 struct ieee80211_rx_status *stats)
e85d0918 742{
7f4013f0 743 struct zd_mac *mac = zd_hw_mac(hw);
459c51ad
DD
744 struct sk_buff *skb;
745 struct sk_buff_head *q;
746 unsigned long flags;
7f4013f0
BP
747 int found = 0;
748 int i, position = 0;
e85d0918 749
85365820 750 if (!ieee80211_is_ack(rx_hdr->frame_control))
e85d0918 751 return 0;
e85d0918 752
7f4013f0 753 q = &mac->ack_wait_queue;
459c51ad 754 spin_lock_irqsave(&q->lock, flags);
47a227db 755 skb_queue_walk(q, skb) {
459c51ad
DD
756 struct ieee80211_hdr *tx_hdr;
757
7f4013f0
BP
758 position ++;
759
760 if (mac->ack_pending && skb_queue_is_first(q, skb))
761 continue;
762
459c51ad 763 tx_hdr = (struct ieee80211_hdr *)skb->data;
cde6901b 764 if (likely(!memcmp(tx_hdr->addr2, rx_hdr->addr1, ETH_ALEN)))
459c51ad 765 {
7f4013f0
BP
766 found = 1;
767 break;
459c51ad
DD
768 }
769 }
7f4013f0
BP
770
771 if (found) {
772 for (i=1; i<position; i++) {
773 skb = __skb_dequeue(q);
774 zd_mac_tx_status(hw, skb,
775 mac->ack_pending ? mac->ack_signal : 0,
776 NULL);
777 mac->ack_pending = 0;
778 }
779
780 mac->ack_pending = 1;
781 mac->ack_signal = stats->signal;
782 }
783
459c51ad
DD
784 spin_unlock_irqrestore(&q->lock, flags);
785 return 1;
e85d0918
DD
786}
787
459c51ad 788int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
e85d0918 789{
459c51ad
DD
790 struct zd_mac *mac = zd_hw_mac(hw);
791 struct ieee80211_rx_status stats;
792 const struct rx_status *status;
793 struct sk_buff *skb;
794 int bad_frame = 0;
85365820
HH
795 __le16 fc;
796 int need_padding;
8318d78a
JB
797 int i;
798 u8 rate;
db888aed 799
459c51ad
DD
800 if (length < ZD_PLCP_HEADER_SIZE + 10 /* IEEE80211_1ADDR_LEN */ +
801 FCS_LEN + sizeof(struct rx_status))
802 return -EINVAL;
e85d0918 803
459c51ad 804 memset(&stats, 0, sizeof(stats));
e85d0918 805
459c51ad
DD
806 /* Note about pass_failed_fcs and pass_ctrl access below:
807 * mac locking intentionally omitted here, as this is the only unlocked
808 * reader and the only writer is configure_filter. Plus, if there were
809 * any races accessing these variables, it wouldn't really matter.
810 * If mac80211 ever provides a way for us to access filter flags
811 * from outside configure_filter, we could improve on this. Also, this
812 * situation may change once we implement some kind of DMA-into-skb
813 * RX path. */
e85d0918 814
459c51ad
DD
815 /* Caller has to ensure that length >= sizeof(struct rx_status). */
816 status = (struct rx_status *)
937a049d 817 (buffer + (length - sizeof(struct rx_status)));
e85d0918 818 if (status->frame_status & ZD_RX_ERROR) {
459c51ad
DD
819 if (mac->pass_failed_fcs &&
820 (status->frame_status & ZD_RX_CRC32_ERROR)) {
821 stats.flag |= RX_FLAG_FAILED_FCS_CRC;
822 bad_frame = 1;
823 } else {
824 return -EINVAL;
22d3405f 825 }
e85d0918 826 }
22d3405f 827
8318d78a
JB
828 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq;
829 stats.band = IEEE80211_BAND_2GHZ;
566bfe5a 830 stats.signal = status->signal_strength;
8318d78a
JB
831
832 rate = zd_rx_rate(buffer, status);
833
834 /* todo: return index in the big switches in zd_rx_rate instead */
835 for (i = 0; i < mac->band.n_bitrates; i++)
836 if (rate == mac->band.bitrates[i].hw_value)
837 stats.rate_idx = i;
459c51ad
DD
838
839 length -= ZD_PLCP_HEADER_SIZE + sizeof(struct rx_status);
840 buffer += ZD_PLCP_HEADER_SIZE;
841
842 /* Except for bad frames, filter each frame to see if it is an ACK, in
843 * which case our internal TX tracking is updated. Normally we then
844 * bail here as there's no need to pass ACKs on up to the stack, but
845 * there is also the case where the stack has requested us to pass
846 * control frames on up (pass_ctrl) which we must consider. */
847 if (!bad_frame &&
848 filter_ack(hw, (struct ieee80211_hdr *)buffer, &stats)
849 && !mac->pass_ctrl)
850 return 0;
e85d0918 851
42935eca 852 fc = get_unaligned((__le16*)buffer);
85365820 853 need_padding = ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc);
9081728b
MB
854
855 skb = dev_alloc_skb(length + (need_padding ? 2 : 0));
459c51ad
DD
856 if (skb == NULL)
857 return -ENOMEM;
9081728b 858 if (need_padding) {
77c2061d 859 /* Make sure the payload data is 4 byte aligned. */
9081728b
MB
860 skb_reserve(skb, 2);
861 }
862
7f4013f0 863 /* FIXME : could we avoid this big memcpy ? */
459c51ad
DD
864 memcpy(skb_put(skb, length), buffer, length);
865
f1d58c25
JB
866 memcpy(IEEE80211_SKB_RXCB(skb), &stats, sizeof(stats));
867 ieee80211_rx_irqsafe(hw, skb);
e85d0918
DD
868 return 0;
869}
870
459c51ad 871static int zd_op_add_interface(struct ieee80211_hw *hw,
1ed32e4f 872 struct ieee80211_vif *vif)
e85d0918 873{
459c51ad 874 struct zd_mac *mac = zd_hw_mac(hw);
e85d0918 875
05c914fe
JB
876 /* using NL80211_IFTYPE_UNSPECIFIED to indicate no mode selected */
877 if (mac->type != NL80211_IFTYPE_UNSPECIFIED)
459c51ad 878 return -EOPNOTSUPP;
e85d0918 879
1ed32e4f 880 switch (vif->type) {
05c914fe
JB
881 case NL80211_IFTYPE_MONITOR:
882 case NL80211_IFTYPE_MESH_POINT:
883 case NL80211_IFTYPE_STATION:
884 case NL80211_IFTYPE_ADHOC:
1ed32e4f 885 mac->type = vif->type;
459c51ad
DD
886 break;
887 default:
888 return -EOPNOTSUPP;
4d1feabc 889 }
e85d0918 890
1ed32e4f 891 return zd_write_mac_addr(&mac->chip, vif->addr);
459c51ad 892}
e85d0918 893
459c51ad 894static void zd_op_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 895 struct ieee80211_vif *vif)
459c51ad
DD
896{
897 struct zd_mac *mac = zd_hw_mac(hw);
05c914fe 898 mac->type = NL80211_IFTYPE_UNSPECIFIED;
86229f0c 899 zd_set_beacon_interval(&mac->chip, 0);
459c51ad
DD
900 zd_write_mac_addr(&mac->chip, NULL);
901}
93137943 902
e8975581 903static int zd_op_config(struct ieee80211_hw *hw, u32 changed)
459c51ad
DD
904{
905 struct zd_mac *mac = zd_hw_mac(hw);
e8975581
JB
906 struct ieee80211_conf *conf = &hw->conf;
907
8318d78a 908 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value);
459c51ad 909}
db888aed 910
e83a1070 911static void zd_process_intr(struct work_struct *work)
72e77a8a
LCC
912{
913 u16 int_status;
8b17f75c 914 unsigned long flags;
72e77a8a
LCC
915 struct zd_mac *mac = container_of(work, struct zd_mac, process_intr);
916
8b17f75c
JK
917 spin_lock_irqsave(&mac->lock, flags);
918 int_status = le16_to_cpu(*(__le16 *)(mac->intr_buffer + 4));
919 spin_unlock_irqrestore(&mac->lock, flags);
920
570a0a7c
JB
921 if (int_status & INT_CFG_NEXT_BCN)
922 dev_dbg_f_limit(zd_mac_dev(mac), "INT_CFG_NEXT_BCN\n");
923 else
72e77a8a
LCC
924 dev_dbg_f(zd_mac_dev(mac), "Unsupported interrupt\n");
925
926 zd_chip_enable_hwint(&mac->chip);
927}
928
929
3ac64bee 930static u64 zd_op_prepare_multicast(struct ieee80211_hw *hw,
22bedad3 931 struct netdev_hw_addr_list *mc_list)
3ac64bee
JB
932{
933 struct zd_mac *mac = zd_hw_mac(hw);
934 struct zd_mc_hash hash;
22bedad3 935 struct netdev_hw_addr *ha;
3ac64bee
JB
936
937 zd_mc_clear(&hash);
938
22bedad3
JP
939 netdev_hw_addr_list_for_each(ha, mc_list) {
940 dev_dbg_f(zd_mac_dev(mac), "mc addr %pM\n", ha->addr);
941 zd_mc_add_addr(&hash, ha->addr);
3ac64bee
JB
942 }
943
944 return hash.low | ((u64)hash.high << 32);
945}
946
459c51ad
DD
947#define SUPPORTED_FIF_FLAGS \
948 (FIF_PROMISC_IN_BSS | FIF_ALLMULTI | FIF_FCSFAIL | FIF_CONTROL | \
2c1a1b12 949 FIF_OTHER_BSS | FIF_BCN_PRBRESP_PROMISC)
459c51ad
DD
950static void zd_op_configure_filter(struct ieee80211_hw *hw,
951 unsigned int changed_flags,
952 unsigned int *new_flags,
3ac64bee 953 u64 multicast)
e85d0918 954{
3ac64bee
JB
955 struct zd_mc_hash hash = {
956 .low = multicast,
957 .high = multicast >> 32,
958 };
459c51ad
DD
959 struct zd_mac *mac = zd_hw_mac(hw);
960 unsigned long flags;
a6fb071b 961 int r;
e85d0918 962
459c51ad
DD
963 /* Only deal with supported flags */
964 changed_flags &= SUPPORTED_FIF_FLAGS;
965 *new_flags &= SUPPORTED_FIF_FLAGS;
966
7de3c5dc
BP
967 /*
968 * If multicast parameter (as returned by zd_op_prepare_multicast)
969 * has changed, no bit in changed_flags is set. To handle this
970 * situation, we do not return if changed_flags is 0. If we do so,
971 * we will have some issue with IPv6 which uses multicast for link
972 * layer address resolution.
973 */
3ac64bee 974 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI))
459c51ad 975 zd_mc_add_all(&hash);
459c51ad
DD
976
977 spin_lock_irqsave(&mac->lock, flags);
978 mac->pass_failed_fcs = !!(*new_flags & FIF_FCSFAIL);
979 mac->pass_ctrl = !!(*new_flags & FIF_CONTROL);
980 mac->multicast_hash = hash;
981 spin_unlock_irqrestore(&mac->lock, flags);
3ac64bee 982
a6fb071b 983 zd_chip_set_multicast_hash(&mac->chip, &hash);
459c51ad 984
a6fb071b
JK
985 if (changed_flags & FIF_CONTROL) {
986 r = set_rx_filter(mac);
987 if (r)
988 dev_err(zd_mac_dev(mac), "set_rx_filter error %d\n", r);
989 }
459c51ad
DD
990
991 /* no handling required for FIF_OTHER_BSS as we don't currently
992 * do BSSID filtering */
993 /* FIXME: in future it would be nice to enable the probe response
994 * filter (so that the driver doesn't see them) until
995 * FIF_BCN_PRBRESP_PROMISC is set. however due to atomicity here, we'd
996 * have to schedule work to enable prbresp reception, which might
997 * happen too late. For now we'll just listen and forward them all the
998 * time. */
e85d0918
DD
999}
1000
459c51ad 1001static void set_rts_cts_work(struct work_struct *work)
e85d0918 1002{
459c51ad
DD
1003 struct zd_mac *mac =
1004 container_of(work, struct zd_mac, set_rts_cts_work);
1005 unsigned long flags;
1006 unsigned int short_preamble;
1007
1008 mutex_lock(&mac->chip.mutex);
1009
1010 spin_lock_irqsave(&mac->lock, flags);
1011 mac->updating_rts_rate = 0;
1012 short_preamble = mac->short_preamble;
1013 spin_unlock_irqrestore(&mac->lock, flags);
1014
1015 zd_chip_set_rts_cts_rate_locked(&mac->chip, short_preamble);
1016 mutex_unlock(&mac->chip.mutex);
e85d0918
DD
1017}
1018
471b3efd
JB
1019static void zd_op_bss_info_changed(struct ieee80211_hw *hw,
1020 struct ieee80211_vif *vif,
1021 struct ieee80211_bss_conf *bss_conf,
1022 u32 changes)
e85d0918 1023{
459c51ad
DD
1024 struct zd_mac *mac = zd_hw_mac(hw);
1025 unsigned long flags;
2d0ddec5 1026 int associated;
459c51ad
DD
1027
1028 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes);
1029
2d0ddec5
JB
1030 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
1031 mac->type == NL80211_IFTYPE_ADHOC) {
1032 associated = true;
1033 if (changes & BSS_CHANGED_BEACON) {
1034 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1035
1036 if (beacon) {
1037 zd_mac_config_beacon(hw, beacon);
1038 kfree_skb(beacon);
1039 }
1040 }
1041
1042 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1043 u32 interval;
1044
1045 if (bss_conf->enable_beacon)
1046 interval = BCN_MODE_IBSS |
1047 bss_conf->beacon_int;
1048 else
1049 interval = 0;
1050
1051 zd_set_beacon_interval(&mac->chip, interval);
1052 }
1053 } else
1054 associated = is_valid_ether_addr(bss_conf->bssid);
1055
1056 spin_lock_irq(&mac->lock);
1057 mac->associated = associated;
1058 spin_unlock_irq(&mac->lock);
1059
1060 /* TODO: do hardware bssid filtering */
1061
471b3efd 1062 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
459c51ad 1063 spin_lock_irqsave(&mac->lock, flags);
471b3efd 1064 mac->short_preamble = bss_conf->use_short_preamble;
459c51ad
DD
1065 if (!mac->updating_rts_rate) {
1066 mac->updating_rts_rate = 1;
1067 /* FIXME: should disable TX here, until work has
1068 * completed and RTS_CTS reg is updated */
1069 queue_work(zd_workqueue, &mac->set_rts_cts_work);
1070 }
1071 spin_unlock_irqrestore(&mac->lock, flags);
1072 }
e85d0918
DD
1073}
1074
5fe73197
AF
1075static u64 zd_op_get_tsf(struct ieee80211_hw *hw)
1076{
1077 struct zd_mac *mac = zd_hw_mac(hw);
1078 return zd_chip_get_tsf(&mac->chip);
1079}
1080
459c51ad
DD
1081static const struct ieee80211_ops zd_ops = {
1082 .tx = zd_op_tx,
1083 .start = zd_op_start,
1084 .stop = zd_op_stop,
1085 .add_interface = zd_op_add_interface,
1086 .remove_interface = zd_op_remove_interface,
1087 .config = zd_op_config,
3ac64bee 1088 .prepare_multicast = zd_op_prepare_multicast,
459c51ad 1089 .configure_filter = zd_op_configure_filter,
471b3efd 1090 .bss_info_changed = zd_op_bss_info_changed,
5fe73197 1091 .get_tsf = zd_op_get_tsf,
459c51ad
DD
1092};
1093
1094struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf)
e85d0918 1095{
459c51ad
DD
1096 struct zd_mac *mac;
1097 struct ieee80211_hw *hw;
e85d0918 1098
459c51ad
DD
1099 hw = ieee80211_alloc_hw(sizeof(struct zd_mac), &zd_ops);
1100 if (!hw) {
1101 dev_dbg_f(&intf->dev, "out of memory\n");
1102 return NULL;
db888aed 1103 }
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DD
1104
1105 mac = zd_hw_mac(hw);
1106
1107 memset(mac, 0, sizeof(*mac));
1108 spin_lock_init(&mac->lock);
1109 mac->hw = hw;
1110
05c914fe 1111 mac->type = NL80211_IFTYPE_UNSPECIFIED;
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DD
1112
1113 memcpy(mac->channels, zd_channels, sizeof(zd_channels));
1114 memcpy(mac->rates, zd_rates, sizeof(zd_rates));
8318d78a
JB
1115 mac->band.n_bitrates = ARRAY_SIZE(zd_rates);
1116 mac->band.bitrates = mac->rates;
1117 mac->band.n_channels = ARRAY_SIZE(zd_channels);
1118 mac->band.channels = mac->channels;
1119
1120 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band;
1121
72e77a8a 1122 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
7fee5372 1123 IEEE80211_HW_SIGNAL_UNSPEC;
459c51ad 1124
f59ac048
LR
1125 hw->wiphy->interface_modes =
1126 BIT(NL80211_IFTYPE_MESH_POINT) |
1127 BIT(NL80211_IFTYPE_STATION) |
1128 BIT(NL80211_IFTYPE_ADHOC);
1129
566bfe5a 1130 hw->max_signal = 100;
459c51ad
DD
1131 hw->queues = 1;
1132 hw->extra_tx_headroom = sizeof(struct zd_ctrlset);
1133
7f4013f0
BP
1134 /*
1135 * Tell mac80211 that we support multi rate retries
1136 */
1137 hw->max_rates = IEEE80211_TX_MAX_RATES;
1138 hw->max_rate_tries = 18; /* 9 rates * 2 retries/rate */
1139
459c51ad 1140 skb_queue_head_init(&mac->ack_wait_queue);
7f4013f0 1141 mac->ack_pending = 0;
459c51ad 1142
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DD
1143 zd_chip_init(&mac->chip, hw, intf);
1144 housekeeping_init(mac);
459c51ad 1145 INIT_WORK(&mac->set_rts_cts_work, set_rts_cts_work);
72e77a8a 1146 INIT_WORK(&mac->process_intr, zd_process_intr);
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1147
1148 SET_IEEE80211_DEV(hw, &intf->dev);
1149 return hw;
e85d0918
DD
1150}
1151
583afd1e
UK
1152#define LINK_LED_WORK_DELAY HZ
1153
c4028958 1154static void link_led_handler(struct work_struct *work)
583afd1e 1155{
c4028958
DH
1156 struct zd_mac *mac =
1157 container_of(work, struct zd_mac, housekeeping.link_led_work.work);
583afd1e 1158 struct zd_chip *chip = &mac->chip;
583afd1e
UK
1159 int is_associated;
1160 int r;
1161
1162 spin_lock_irq(&mac->lock);
459c51ad 1163 is_associated = mac->associated;
583afd1e
UK
1164 spin_unlock_irq(&mac->lock);
1165
1166 r = zd_chip_control_leds(chip,
14b46c8a 1167 is_associated ? ZD_LED_ASSOCIATED : ZD_LED_SCANNING);
583afd1e 1168 if (r)
459c51ad 1169 dev_dbg_f(zd_mac_dev(mac), "zd_chip_control_leds error %d\n", r);
583afd1e
UK
1170
1171 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work,
1172 LINK_LED_WORK_DELAY);
1173}
1174
1175static void housekeeping_init(struct zd_mac *mac)
1176{
c4028958 1177 INIT_DELAYED_WORK(&mac->housekeeping.link_led_work, link_led_handler);
583afd1e
UK
1178}
1179
1180static void housekeeping_enable(struct zd_mac *mac)
1181{
1182 dev_dbg_f(zd_mac_dev(mac), "\n");
1183 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work,
1184 0);
1185}
1186
1187static void housekeeping_disable(struct zd_mac *mac)
1188{
1189 dev_dbg_f(zd_mac_dev(mac), "\n");
afe2c511 1190 cancel_delayed_work_sync(&mac->housekeeping.link_led_work);
14b46c8a 1191 zd_chip_control_leds(&mac->chip, ZD_LED_OFF);
583afd1e 1192}
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