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bb81b2dd JL |
1 | /* |
2 | * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device. | |
3 | * | |
4 | * This is a new flat driver which is based on the original emac_lite | |
5 | * driver from John Williams <john.williams@petalogix.com>. | |
6 | * | |
7 | * 2007-2009 (c) Xilinx, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | */ | |
14 | ||
15 | #include <linux/module.h> | |
16 | #include <linux/uaccess.h> | |
17 | #include <linux/init.h> | |
18 | #include <linux/netdevice.h> | |
19 | #include <linux/etherdevice.h> | |
20 | #include <linux/skbuff.h> | |
21 | #include <linux/io.h> | |
22 | ||
23 | #include <linux/of_device.h> | |
24 | #include <linux/of_platform.h> | |
5cdaaa12 JL |
25 | #include <linux/of_mdio.h> |
26 | #include <linux/phy.h> | |
bb81b2dd JL |
27 | |
28 | #define DRIVER_NAME "xilinx_emaclite" | |
29 | ||
30 | /* Register offsets for the EmacLite Core */ | |
31 | #define XEL_TXBUFF_OFFSET 0x0 /* Transmit Buffer */ | |
5cdaaa12 JL |
32 | #define XEL_MDIOADDR_OFFSET 0x07E4 /* MDIO Address Register */ |
33 | #define XEL_MDIOWR_OFFSET 0x07E8 /* MDIO Write Data Register */ | |
34 | #define XEL_MDIORD_OFFSET 0x07EC /* MDIO Read Data Register */ | |
35 | #define XEL_MDIOCTRL_OFFSET 0x07F0 /* MDIO Control Register */ | |
bb81b2dd JL |
36 | #define XEL_GIER_OFFSET 0x07F8 /* GIE Register */ |
37 | #define XEL_TSR_OFFSET 0x07FC /* Tx status */ | |
38 | #define XEL_TPLR_OFFSET 0x07F4 /* Tx packet length */ | |
39 | ||
40 | #define XEL_RXBUFF_OFFSET 0x1000 /* Receive Buffer */ | |
41 | #define XEL_RPLR_OFFSET 0x100C /* Rx packet length */ | |
42 | #define XEL_RSR_OFFSET 0x17FC /* Rx status */ | |
43 | ||
44 | #define XEL_BUFFER_OFFSET 0x0800 /* Next Tx/Rx buffer's offset */ | |
45 | ||
5cdaaa12 JL |
46 | /* MDIO Address Register Bit Masks */ |
47 | #define XEL_MDIOADDR_REGADR_MASK 0x0000001F /* Register Address */ | |
48 | #define XEL_MDIOADDR_PHYADR_MASK 0x000003E0 /* PHY Address */ | |
49 | #define XEL_MDIOADDR_PHYADR_SHIFT 5 | |
50 | #define XEL_MDIOADDR_OP_MASK 0x00000400 /* RD/WR Operation */ | |
51 | ||
52 | /* MDIO Write Data Register Bit Masks */ | |
53 | #define XEL_MDIOWR_WRDATA_MASK 0x0000FFFF /* Data to be Written */ | |
54 | ||
55 | /* MDIO Read Data Register Bit Masks */ | |
56 | #define XEL_MDIORD_RDDATA_MASK 0x0000FFFF /* Data to be Read */ | |
57 | ||
58 | /* MDIO Control Register Bit Masks */ | |
59 | #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001 /* MDIO Status Mask */ | |
60 | #define XEL_MDIOCTRL_MDIOEN_MASK 0x00000008 /* MDIO Enable */ | |
61 | ||
bb81b2dd JL |
62 | /* Global Interrupt Enable Register (GIER) Bit Masks */ |
63 | #define XEL_GIER_GIE_MASK 0x80000000 /* Global Enable */ | |
64 | ||
65 | /* Transmit Status Register (TSR) Bit Masks */ | |
66 | #define XEL_TSR_XMIT_BUSY_MASK 0x00000001 /* Tx complete */ | |
67 | #define XEL_TSR_PROGRAM_MASK 0x00000002 /* Program the MAC address */ | |
68 | #define XEL_TSR_XMIT_IE_MASK 0x00000008 /* Tx interrupt enable bit */ | |
69 | #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000 /* Buffer is active, SW bit | |
70 | * only. This is not documented | |
71 | * in the HW spec */ | |
72 | ||
73 | /* Define for programming the MAC address into the EmacLite */ | |
74 | #define XEL_TSR_PROG_MAC_ADDR (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK) | |
75 | ||
76 | /* Receive Status Register (RSR) */ | |
77 | #define XEL_RSR_RECV_DONE_MASK 0x00000001 /* Rx complete */ | |
78 | #define XEL_RSR_RECV_IE_MASK 0x00000008 /* Rx interrupt enable bit */ | |
79 | ||
80 | /* Transmit Packet Length Register (TPLR) */ | |
81 | #define XEL_TPLR_LENGTH_MASK 0x0000FFFF /* Tx packet length */ | |
82 | ||
83 | /* Receive Packet Length Register (RPLR) */ | |
84 | #define XEL_RPLR_LENGTH_MASK 0x0000FFFF /* Rx packet length */ | |
85 | ||
86 | #define XEL_HEADER_OFFSET 12 /* Offset to length field */ | |
87 | #define XEL_HEADER_SHIFT 16 /* Shift value for length */ | |
88 | ||
89 | /* General Ethernet Definitions */ | |
90 | #define XEL_ARP_PACKET_SIZE 28 /* Max ARP packet size */ | |
91 | #define XEL_HEADER_IP_LENGTH_OFFSET 16 /* IP Length Offset */ | |
92 | ||
93 | ||
94 | ||
95 | #define TX_TIMEOUT (60*HZ) /* Tx timeout is 60 seconds. */ | |
96 | #define ALIGNMENT 4 | |
97 | ||
98 | /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */ | |
99 | #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT) | |
100 | ||
101 | /** | |
102 | * struct net_local - Our private per device data | |
103 | * @ndev: instance of the network device | |
104 | * @tx_ping_pong: indicates whether Tx Pong buffer is configured in HW | |
105 | * @rx_ping_pong: indicates whether Rx Pong buffer is configured in HW | |
106 | * @next_tx_buf_to_use: next Tx buffer to write to | |
107 | * @next_rx_buf_to_use: next Rx buffer to read from | |
108 | * @base_addr: base address of the Emaclite device | |
109 | * @reset_lock: lock used for synchronization | |
110 | * @deferred_skb: holds an skb (for transmission at a later time) when the | |
111 | * Tx buffer is not free | |
5cdaaa12 JL |
112 | * @phy_dev: pointer to the PHY device |
113 | * @phy_node: pointer to the PHY device node | |
114 | * @mii_bus: pointer to the MII bus | |
115 | * @mdio_irqs: IRQs table for MDIO bus | |
116 | * @last_link: last link status | |
117 | * @has_mdio: indicates whether MDIO is included in the HW | |
bb81b2dd JL |
118 | */ |
119 | struct net_local { | |
120 | ||
121 | struct net_device *ndev; | |
122 | ||
123 | bool tx_ping_pong; | |
124 | bool rx_ping_pong; | |
125 | u32 next_tx_buf_to_use; | |
126 | u32 next_rx_buf_to_use; | |
127 | void __iomem *base_addr; | |
128 | ||
129 | spinlock_t reset_lock; | |
130 | struct sk_buff *deferred_skb; | |
5cdaaa12 JL |
131 | |
132 | struct phy_device *phy_dev; | |
133 | struct device_node *phy_node; | |
134 | ||
135 | struct mii_bus *mii_bus; | |
136 | int mdio_irqs[PHY_MAX_ADDR]; | |
137 | ||
138 | int last_link; | |
139 | bool has_mdio; | |
bb81b2dd JL |
140 | }; |
141 | ||
142 | ||
143 | /*************************/ | |
144 | /* EmacLite driver calls */ | |
145 | /*************************/ | |
146 | ||
147 | /** | |
148 | * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device | |
149 | * @drvdata: Pointer to the Emaclite device private data | |
150 | * | |
151 | * This function enables the Tx and Rx interrupts for the Emaclite device along | |
152 | * with the Global Interrupt Enable. | |
153 | */ | |
154 | static void xemaclite_enable_interrupts(struct net_local *drvdata) | |
155 | { | |
156 | u32 reg_data; | |
157 | ||
158 | /* Enable the Tx interrupts for the first Buffer */ | |
159 | reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET); | |
160 | out_be32(drvdata->base_addr + XEL_TSR_OFFSET, | |
161 | reg_data | XEL_TSR_XMIT_IE_MASK); | |
162 | ||
163 | /* Enable the Tx interrupts for the second Buffer if | |
164 | * configured in HW */ | |
165 | if (drvdata->tx_ping_pong != 0) { | |
166 | reg_data = in_be32(drvdata->base_addr + | |
167 | XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); | |
168 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
169 | XEL_TSR_OFFSET, | |
170 | reg_data | XEL_TSR_XMIT_IE_MASK); | |
171 | } | |
172 | ||
173 | /* Enable the Rx interrupts for the first buffer */ | |
bb81b2dd | 174 | out_be32(drvdata->base_addr + XEL_RSR_OFFSET, |
95acf7d7 | 175 | XEL_RSR_RECV_IE_MASK); |
bb81b2dd JL |
176 | |
177 | /* Enable the Rx interrupts for the second Buffer if | |
178 | * configured in HW */ | |
179 | if (drvdata->rx_ping_pong != 0) { | |
bb81b2dd JL |
180 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + |
181 | XEL_RSR_OFFSET, | |
95acf7d7 | 182 | XEL_RSR_RECV_IE_MASK); |
bb81b2dd JL |
183 | } |
184 | ||
185 | /* Enable the Global Interrupt Enable */ | |
186 | out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK); | |
187 | } | |
188 | ||
189 | /** | |
190 | * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device | |
191 | * @drvdata: Pointer to the Emaclite device private data | |
192 | * | |
193 | * This function disables the Tx and Rx interrupts for the Emaclite device, | |
194 | * along with the Global Interrupt Enable. | |
195 | */ | |
196 | static void xemaclite_disable_interrupts(struct net_local *drvdata) | |
197 | { | |
198 | u32 reg_data; | |
199 | ||
200 | /* Disable the Global Interrupt Enable */ | |
201 | out_be32(drvdata->base_addr + XEL_GIER_OFFSET, XEL_GIER_GIE_MASK); | |
202 | ||
203 | /* Disable the Tx interrupts for the first buffer */ | |
204 | reg_data = in_be32(drvdata->base_addr + XEL_TSR_OFFSET); | |
205 | out_be32(drvdata->base_addr + XEL_TSR_OFFSET, | |
206 | reg_data & (~XEL_TSR_XMIT_IE_MASK)); | |
207 | ||
208 | /* Disable the Tx interrupts for the second Buffer | |
209 | * if configured in HW */ | |
210 | if (drvdata->tx_ping_pong != 0) { | |
211 | reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
212 | XEL_TSR_OFFSET); | |
213 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
214 | XEL_TSR_OFFSET, | |
215 | reg_data & (~XEL_TSR_XMIT_IE_MASK)); | |
216 | } | |
217 | ||
218 | /* Disable the Rx interrupts for the first buffer */ | |
219 | reg_data = in_be32(drvdata->base_addr + XEL_RSR_OFFSET); | |
220 | out_be32(drvdata->base_addr + XEL_RSR_OFFSET, | |
221 | reg_data & (~XEL_RSR_RECV_IE_MASK)); | |
222 | ||
223 | /* Disable the Rx interrupts for the second buffer | |
224 | * if configured in HW */ | |
225 | if (drvdata->rx_ping_pong != 0) { | |
226 | ||
227 | reg_data = in_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
228 | XEL_RSR_OFFSET); | |
229 | out_be32(drvdata->base_addr + XEL_BUFFER_OFFSET + | |
230 | XEL_RSR_OFFSET, | |
231 | reg_data & (~XEL_RSR_RECV_IE_MASK)); | |
232 | } | |
233 | } | |
234 | ||
235 | /** | |
236 | * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address | |
237 | * @src_ptr: Void pointer to the 16-bit aligned source address | |
238 | * @dest_ptr: Pointer to the 32-bit aligned destination address | |
239 | * @length: Number bytes to write from source to destination | |
240 | * | |
241 | * This function writes data from a 16-bit aligned buffer to a 32-bit aligned | |
242 | * address in the EmacLite device. | |
243 | */ | |
244 | static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr, | |
245 | unsigned length) | |
246 | { | |
247 | u32 align_buffer; | |
248 | u32 *to_u32_ptr; | |
249 | u16 *from_u16_ptr, *to_u16_ptr; | |
250 | ||
251 | to_u32_ptr = dest_ptr; | |
252 | from_u16_ptr = (u16 *) src_ptr; | |
253 | align_buffer = 0; | |
254 | ||
255 | for (; length > 3; length -= 4) { | |
256 | to_u16_ptr = (u16 *) ((void *) &align_buffer); | |
257 | *to_u16_ptr++ = *from_u16_ptr++; | |
258 | *to_u16_ptr++ = *from_u16_ptr++; | |
259 | ||
260 | /* Output a word */ | |
261 | *to_u32_ptr++ = align_buffer; | |
262 | } | |
263 | if (length) { | |
264 | u8 *from_u8_ptr, *to_u8_ptr; | |
265 | ||
266 | /* Set up to output the remaining data */ | |
267 | align_buffer = 0; | |
268 | to_u8_ptr = (u8 *) &align_buffer; | |
269 | from_u8_ptr = (u8 *) from_u16_ptr; | |
270 | ||
271 | /* Output the remaining data */ | |
272 | for (; length > 0; length--) | |
273 | *to_u8_ptr++ = *from_u8_ptr++; | |
274 | ||
275 | *to_u32_ptr = align_buffer; | |
276 | } | |
277 | } | |
278 | ||
279 | /** | |
280 | * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer | |
281 | * @src_ptr: Pointer to the 32-bit aligned source address | |
282 | * @dest_ptr: Pointer to the 16-bit aligned destination address | |
283 | * @length: Number bytes to read from source to destination | |
284 | * | |
285 | * This function reads data from a 32-bit aligned address in the EmacLite device | |
286 | * to a 16-bit aligned buffer. | |
287 | */ | |
288 | static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr, | |
289 | unsigned length) | |
290 | { | |
291 | u16 *to_u16_ptr, *from_u16_ptr; | |
292 | u32 *from_u32_ptr; | |
293 | u32 align_buffer; | |
294 | ||
295 | from_u32_ptr = src_ptr; | |
296 | to_u16_ptr = (u16 *) dest_ptr; | |
297 | ||
298 | for (; length > 3; length -= 4) { | |
299 | /* Copy each word into the temporary buffer */ | |
300 | align_buffer = *from_u32_ptr++; | |
301 | from_u16_ptr = (u16 *)&align_buffer; | |
302 | ||
303 | /* Read data from source */ | |
304 | *to_u16_ptr++ = *from_u16_ptr++; | |
305 | *to_u16_ptr++ = *from_u16_ptr++; | |
306 | } | |
307 | ||
308 | if (length) { | |
309 | u8 *to_u8_ptr, *from_u8_ptr; | |
310 | ||
311 | /* Set up to read the remaining data */ | |
312 | to_u8_ptr = (u8 *) to_u16_ptr; | |
313 | align_buffer = *from_u32_ptr++; | |
314 | from_u8_ptr = (u8 *) &align_buffer; | |
315 | ||
316 | /* Read the remaining data */ | |
317 | for (; length > 0; length--) | |
318 | *to_u8_ptr = *from_u8_ptr; | |
319 | } | |
320 | } | |
321 | ||
322 | /** | |
323 | * xemaclite_send_data - Send an Ethernet frame | |
324 | * @drvdata: Pointer to the Emaclite device private data | |
325 | * @data: Pointer to the data to be sent | |
326 | * @byte_count: Total frame size, including header | |
327 | * | |
328 | * This function checks if the Tx buffer of the Emaclite device is free to send | |
329 | * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it | |
330 | * returns an error. | |
331 | * | |
332 | * Return: 0 upon success or -1 if the buffer(s) are full. | |
333 | * | |
334 | * Note: The maximum Tx packet size can not be more than Ethernet header | |
335 | * (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS. | |
336 | */ | |
337 | static int xemaclite_send_data(struct net_local *drvdata, u8 *data, | |
338 | unsigned int byte_count) | |
339 | { | |
340 | u32 reg_data; | |
341 | void __iomem *addr; | |
342 | ||
343 | /* Determine the expected Tx buffer address */ | |
344 | addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; | |
345 | ||
346 | /* If the length is too large, truncate it */ | |
347 | if (byte_count > ETH_FRAME_LEN) | |
348 | byte_count = ETH_FRAME_LEN; | |
349 | ||
350 | /* Check if the expected buffer is available */ | |
351 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
352 | if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | | |
353 | XEL_TSR_XMIT_ACTIVE_MASK)) == 0) { | |
354 | ||
355 | /* Switch to next buffer if configured */ | |
356 | if (drvdata->tx_ping_pong != 0) | |
357 | drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET; | |
358 | } else if (drvdata->tx_ping_pong != 0) { | |
359 | /* If the expected buffer is full, try the other buffer, | |
360 | * if it is configured in HW */ | |
361 | ||
362 | addr = (void __iomem __force *)((u32 __force)addr ^ | |
363 | XEL_BUFFER_OFFSET); | |
364 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
365 | ||
366 | if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK | | |
367 | XEL_TSR_XMIT_ACTIVE_MASK)) != 0) | |
368 | return -1; /* Buffers were full, return failure */ | |
369 | } else | |
370 | return -1; /* Buffer was full, return failure */ | |
371 | ||
372 | /* Write the frame to the buffer */ | |
373 | xemaclite_aligned_write(data, (u32 __force *) addr, byte_count); | |
374 | ||
375 | out_be32(addr + XEL_TPLR_OFFSET, (byte_count & XEL_TPLR_LENGTH_MASK)); | |
376 | ||
377 | /* Update the Tx Status Register to indicate that there is a | |
378 | * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which | |
379 | * is used by the interrupt handler to check whether a frame | |
380 | * has been transmitted */ | |
381 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
382 | reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK); | |
383 | out_be32(addr + XEL_TSR_OFFSET, reg_data); | |
384 | ||
385 | return 0; | |
386 | } | |
387 | ||
388 | /** | |
389 | * xemaclite_recv_data - Receive a frame | |
390 | * @drvdata: Pointer to the Emaclite device private data | |
391 | * @data: Address where the data is to be received | |
392 | * | |
393 | * This function is intended to be called from the interrupt context or | |
394 | * with a wrapper which waits for the receive frame to be available. | |
395 | * | |
396 | * Return: Total number of bytes received | |
397 | */ | |
398 | static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data) | |
399 | { | |
400 | void __iomem *addr; | |
401 | u16 length, proto_type; | |
402 | u32 reg_data; | |
403 | ||
404 | /* Determine the expected buffer address */ | |
405 | addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use); | |
406 | ||
407 | /* Verify which buffer has valid data */ | |
408 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
409 | ||
410 | if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { | |
411 | if (drvdata->rx_ping_pong != 0) | |
412 | drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET; | |
413 | } else { | |
414 | /* The instance is out of sync, try other buffer if other | |
415 | * buffer is configured, return 0 otherwise. If the instance is | |
416 | * out of sync, do not update the 'next_rx_buf_to_use' since it | |
417 | * will correct on subsequent calls */ | |
418 | if (drvdata->rx_ping_pong != 0) | |
419 | addr = (void __iomem __force *)((u32 __force)addr ^ | |
420 | XEL_BUFFER_OFFSET); | |
421 | else | |
422 | return 0; /* No data was available */ | |
423 | ||
424 | /* Verify that buffer has valid data */ | |
425 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
426 | if ((reg_data & XEL_RSR_RECV_DONE_MASK) != | |
427 | XEL_RSR_RECV_DONE_MASK) | |
428 | return 0; /* No data was available */ | |
429 | } | |
430 | ||
431 | /* Get the protocol type of the ethernet frame that arrived */ | |
432 | proto_type = ((in_be32(addr + XEL_HEADER_OFFSET + | |
433 | XEL_RXBUFF_OFFSET) >> XEL_HEADER_SHIFT) & | |
434 | XEL_RPLR_LENGTH_MASK); | |
435 | ||
436 | /* Check if received ethernet frame is a raw ethernet frame | |
437 | * or an IP packet or an ARP packet */ | |
438 | if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) { | |
439 | ||
440 | if (proto_type == ETH_P_IP) { | |
441 | length = ((in_be32(addr + | |
442 | XEL_HEADER_IP_LENGTH_OFFSET + | |
443 | XEL_RXBUFF_OFFSET) >> | |
444 | XEL_HEADER_SHIFT) & | |
445 | XEL_RPLR_LENGTH_MASK); | |
446 | length += ETH_HLEN + ETH_FCS_LEN; | |
447 | ||
448 | } else if (proto_type == ETH_P_ARP) | |
449 | length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN; | |
450 | else | |
451 | /* Field contains type other than IP or ARP, use max | |
452 | * frame size and let user parse it */ | |
453 | length = ETH_FRAME_LEN + ETH_FCS_LEN; | |
454 | } else | |
455 | /* Use the length in the frame, plus the header and trailer */ | |
456 | length = proto_type + ETH_HLEN + ETH_FCS_LEN; | |
457 | ||
458 | /* Read from the EmacLite device */ | |
459 | xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET), | |
460 | data, length); | |
461 | ||
462 | /* Acknowledge the frame */ | |
463 | reg_data = in_be32(addr + XEL_RSR_OFFSET); | |
464 | reg_data &= ~XEL_RSR_RECV_DONE_MASK; | |
465 | out_be32(addr + XEL_RSR_OFFSET, reg_data); | |
466 | ||
467 | return length; | |
468 | } | |
469 | ||
470 | /** | |
5cdaaa12 | 471 | * xemaclite_update_address - Update the MAC address in the device |
bb81b2dd JL |
472 | * @drvdata: Pointer to the Emaclite device private data |
473 | * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value) | |
474 | * | |
475 | * Tx must be idle and Rx should be idle for deterministic results. | |
476 | * It is recommended that this function should be called after the | |
477 | * initialization and before transmission of any packets from the device. | |
478 | * The MAC address can be programmed using any of the two transmit | |
479 | * buffers (if configured). | |
480 | */ | |
5cdaaa12 JL |
481 | static void xemaclite_update_address(struct net_local *drvdata, |
482 | u8 *address_ptr) | |
bb81b2dd JL |
483 | { |
484 | void __iomem *addr; | |
485 | u32 reg_data; | |
486 | ||
487 | /* Determine the expected Tx buffer address */ | |
488 | addr = drvdata->base_addr + drvdata->next_tx_buf_to_use; | |
489 | ||
490 | xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN); | |
491 | ||
492 | out_be32(addr + XEL_TPLR_OFFSET, ETH_ALEN); | |
493 | ||
494 | /* Update the MAC address in the EmacLite */ | |
495 | reg_data = in_be32(addr + XEL_TSR_OFFSET); | |
496 | out_be32(addr + XEL_TSR_OFFSET, reg_data | XEL_TSR_PROG_MAC_ADDR); | |
497 | ||
498 | /* Wait for EmacLite to finish with the MAC address update */ | |
499 | while ((in_be32(addr + XEL_TSR_OFFSET) & | |
500 | XEL_TSR_PROG_MAC_ADDR) != 0) | |
501 | ; | |
502 | } | |
503 | ||
5cdaaa12 JL |
504 | /** |
505 | * xemaclite_set_mac_address - Set the MAC address for this device | |
506 | * @dev: Pointer to the network device instance | |
507 | * @addr: Void pointer to the sockaddr structure | |
508 | * | |
509 | * This function copies the HW address from the sockaddr strucutre to the | |
510 | * net_device structure and updates the address in HW. | |
511 | * | |
512 | * Return: Error if the net device is busy or 0 if the addr is set | |
513 | * successfully | |
514 | */ | |
515 | static int xemaclite_set_mac_address(struct net_device *dev, void *address) | |
516 | { | |
517 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
518 | struct sockaddr *addr = address; | |
519 | ||
520 | if (netif_running(dev)) | |
521 | return -EBUSY; | |
522 | ||
523 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | |
524 | xemaclite_update_address(lp, dev->dev_addr); | |
525 | return 0; | |
526 | } | |
527 | ||
bb81b2dd JL |
528 | /** |
529 | * xemaclite_tx_timeout - Callback for Tx Timeout | |
530 | * @dev: Pointer to the network device | |
531 | * | |
532 | * This function is called when Tx time out occurs for Emaclite device. | |
533 | */ | |
534 | static void xemaclite_tx_timeout(struct net_device *dev) | |
535 | { | |
536 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
537 | unsigned long flags; | |
538 | ||
539 | dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n", | |
540 | TX_TIMEOUT * 1000UL / HZ); | |
541 | ||
542 | dev->stats.tx_errors++; | |
543 | ||
544 | /* Reset the device */ | |
545 | spin_lock_irqsave(&lp->reset_lock, flags); | |
546 | ||
547 | /* Shouldn't really be necessary, but shouldn't hurt */ | |
548 | netif_stop_queue(dev); | |
549 | ||
550 | xemaclite_disable_interrupts(lp); | |
551 | xemaclite_enable_interrupts(lp); | |
552 | ||
553 | if (lp->deferred_skb) { | |
554 | dev_kfree_skb(lp->deferred_skb); | |
555 | lp->deferred_skb = NULL; | |
556 | dev->stats.tx_errors++; | |
557 | } | |
558 | ||
559 | /* To exclude tx timeout */ | |
560 | dev->trans_start = 0xffffffff - TX_TIMEOUT - TX_TIMEOUT; | |
561 | ||
562 | /* We're all ready to go. Start the queue */ | |
563 | netif_wake_queue(dev); | |
564 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
565 | } | |
566 | ||
567 | /**********************/ | |
568 | /* Interrupt Handlers */ | |
569 | /**********************/ | |
570 | ||
571 | /** | |
572 | * xemaclite_tx_handler - Interrupt handler for frames sent | |
573 | * @dev: Pointer to the network device | |
574 | * | |
575 | * This function updates the number of packets transmitted and handles the | |
576 | * deferred skb, if there is one. | |
577 | */ | |
578 | static void xemaclite_tx_handler(struct net_device *dev) | |
579 | { | |
580 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
581 | ||
582 | dev->stats.tx_packets++; | |
583 | if (lp->deferred_skb) { | |
584 | if (xemaclite_send_data(lp, | |
585 | (u8 *) lp->deferred_skb->data, | |
586 | lp->deferred_skb->len) != 0) | |
587 | return; | |
588 | else { | |
589 | dev->stats.tx_bytes += lp->deferred_skb->len; | |
590 | dev_kfree_skb_irq(lp->deferred_skb); | |
591 | lp->deferred_skb = NULL; | |
592 | dev->trans_start = jiffies; | |
593 | netif_wake_queue(dev); | |
594 | } | |
595 | } | |
596 | } | |
597 | ||
598 | /** | |
599 | * xemaclite_rx_handler- Interrupt handler for frames received | |
600 | * @dev: Pointer to the network device | |
601 | * | |
602 | * This function allocates memory for a socket buffer, fills it with data | |
603 | * received and hands it over to the TCP/IP stack. | |
604 | */ | |
605 | static void xemaclite_rx_handler(struct net_device *dev) | |
606 | { | |
607 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
608 | struct sk_buff *skb; | |
609 | unsigned int align; | |
610 | u32 len; | |
611 | ||
612 | len = ETH_FRAME_LEN + ETH_FCS_LEN; | |
613 | skb = dev_alloc_skb(len + ALIGNMENT); | |
614 | if (!skb) { | |
615 | /* Couldn't get memory. */ | |
616 | dev->stats.rx_dropped++; | |
617 | dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n"); | |
618 | return; | |
619 | } | |
620 | ||
621 | /* | |
622 | * A new skb should have the data halfword aligned, but this code is | |
623 | * here just in case that isn't true. Calculate how many | |
624 | * bytes we should reserve to get the data to start on a word | |
625 | * boundary */ | |
626 | align = BUFFER_ALIGN(skb->data); | |
627 | if (align) | |
628 | skb_reserve(skb, align); | |
629 | ||
630 | skb_reserve(skb, 2); | |
631 | ||
632 | len = xemaclite_recv_data(lp, (u8 *) skb->data); | |
633 | ||
634 | if (!len) { | |
635 | dev->stats.rx_errors++; | |
636 | dev_kfree_skb_irq(skb); | |
637 | return; | |
638 | } | |
639 | ||
640 | skb_put(skb, len); /* Tell the skb how much data we got */ | |
641 | skb->dev = dev; /* Fill out required meta-data */ | |
642 | ||
643 | skb->protocol = eth_type_trans(skb, dev); | |
644 | skb->ip_summed = CHECKSUM_NONE; | |
645 | ||
646 | dev->stats.rx_packets++; | |
647 | dev->stats.rx_bytes += len; | |
bb81b2dd JL |
648 | |
649 | netif_rx(skb); /* Send the packet upstream */ | |
650 | } | |
651 | ||
652 | /** | |
653 | * xemaclite_interrupt - Interrupt handler for this driver | |
654 | * @irq: Irq of the Emaclite device | |
655 | * @dev_id: Void pointer to the network device instance used as callback | |
656 | * reference | |
657 | * | |
658 | * This function handles the Tx and Rx interrupts of the EmacLite device. | |
659 | */ | |
660 | static irqreturn_t xemaclite_interrupt(int irq, void *dev_id) | |
661 | { | |
662 | bool tx_complete = 0; | |
663 | struct net_device *dev = dev_id; | |
664 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
665 | void __iomem *base_addr = lp->base_addr; | |
666 | u32 tx_status; | |
667 | ||
668 | /* Check if there is Rx Data available */ | |
669 | if ((in_be32(base_addr + XEL_RSR_OFFSET) & XEL_RSR_RECV_DONE_MASK) || | |
670 | (in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET) | |
671 | & XEL_RSR_RECV_DONE_MASK)) | |
672 | ||
673 | xemaclite_rx_handler(dev); | |
674 | ||
675 | /* Check if the Transmission for the first buffer is completed */ | |
676 | tx_status = in_be32(base_addr + XEL_TSR_OFFSET); | |
677 | if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && | |
678 | (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { | |
679 | ||
680 | tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; | |
681 | out_be32(base_addr + XEL_TSR_OFFSET, tx_status); | |
682 | ||
683 | tx_complete = 1; | |
684 | } | |
685 | ||
686 | /* Check if the Transmission for the second buffer is completed */ | |
687 | tx_status = in_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET); | |
688 | if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) && | |
689 | (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) { | |
690 | ||
691 | tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK; | |
692 | out_be32(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, | |
693 | tx_status); | |
694 | ||
695 | tx_complete = 1; | |
696 | } | |
697 | ||
698 | /* If there was a Tx interrupt, call the Tx Handler */ | |
699 | if (tx_complete != 0) | |
700 | xemaclite_tx_handler(dev); | |
701 | ||
702 | return IRQ_HANDLED; | |
703 | } | |
704 | ||
5cdaaa12 JL |
705 | /**********************/ |
706 | /* MDIO Bus functions */ | |
707 | /**********************/ | |
708 | ||
709 | /** | |
710 | * xemaclite_mdio_wait - Wait for the MDIO to be ready to use | |
711 | * @lp: Pointer to the Emaclite device private data | |
712 | * | |
713 | * This function waits till the device is ready to accept a new MDIO | |
714 | * request. | |
715 | * | |
716 | * Return: 0 for success or ETIMEDOUT for a timeout | |
717 | */ | |
718 | ||
719 | static int xemaclite_mdio_wait(struct net_local *lp) | |
720 | { | |
721 | long end = jiffies + 2; | |
722 | ||
723 | /* wait for the MDIO interface to not be busy or timeout | |
724 | after some time. | |
725 | */ | |
726 | while (in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET) & | |
727 | XEL_MDIOCTRL_MDIOSTS_MASK) { | |
728 | if (end - jiffies <= 0) { | |
729 | WARN_ON(1); | |
730 | return -ETIMEDOUT; | |
731 | } | |
732 | msleep(1); | |
733 | } | |
734 | return 0; | |
735 | } | |
736 | ||
737 | /** | |
738 | * xemaclite_mdio_read - Read from a given MII management register | |
739 | * @bus: the mii_bus struct | |
740 | * @phy_id: the phy address | |
741 | * @reg: register number to read from | |
742 | * | |
743 | * This function waits till the device is ready to accept a new MDIO | |
744 | * request and then writes the phy address to the MDIO Address register | |
745 | * and reads data from MDIO Read Data register, when its available. | |
746 | * | |
747 | * Return: Value read from the MII management register | |
748 | */ | |
749 | static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg) | |
750 | { | |
751 | struct net_local *lp = bus->priv; | |
752 | u32 ctrl_reg; | |
753 | u32 rc; | |
754 | ||
755 | if (xemaclite_mdio_wait(lp)) | |
756 | return -ETIMEDOUT; | |
757 | ||
758 | /* Write the PHY address, register number and set the OP bit in the | |
759 | * MDIO Address register. Set the Status bit in the MDIO Control | |
760 | * register to start a MDIO read transaction. | |
761 | */ | |
762 | ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET); | |
763 | out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET, | |
764 | XEL_MDIOADDR_OP_MASK | | |
765 | ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg)); | |
766 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
767 | ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); | |
768 | ||
769 | if (xemaclite_mdio_wait(lp)) | |
770 | return -ETIMEDOUT; | |
771 | ||
772 | rc = in_be32(lp->base_addr + XEL_MDIORD_OFFSET); | |
773 | ||
774 | dev_dbg(&lp->ndev->dev, | |
775 | "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n", | |
776 | phy_id, reg, rc); | |
777 | ||
778 | return rc; | |
779 | } | |
780 | ||
781 | /** | |
782 | * xemaclite_mdio_write - Write to a given MII management register | |
783 | * @bus: the mii_bus struct | |
784 | * @phy_id: the phy address | |
785 | * @reg: register number to write to | |
786 | * @val: value to write to the register number specified by reg | |
787 | * | |
788 | * This fucntion waits till the device is ready to accept a new MDIO | |
789 | * request and then writes the val to the MDIO Write Data register. | |
790 | */ | |
791 | static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg, | |
792 | u16 val) | |
793 | { | |
794 | struct net_local *lp = bus->priv; | |
795 | u32 ctrl_reg; | |
796 | ||
797 | dev_dbg(&lp->ndev->dev, | |
798 | "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n", | |
799 | phy_id, reg, val); | |
800 | ||
801 | if (xemaclite_mdio_wait(lp)) | |
802 | return -ETIMEDOUT; | |
803 | ||
804 | /* Write the PHY address, register number and clear the OP bit in the | |
805 | * MDIO Address register and then write the value into the MDIO Write | |
806 | * Data register. Finally, set the Status bit in the MDIO Control | |
807 | * register to start a MDIO write transaction. | |
808 | */ | |
809 | ctrl_reg = in_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET); | |
810 | out_be32(lp->base_addr + XEL_MDIOADDR_OFFSET, | |
811 | ~XEL_MDIOADDR_OP_MASK & | |
812 | ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg)); | |
813 | out_be32(lp->base_addr + XEL_MDIOWR_OFFSET, val); | |
814 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
815 | ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); | |
816 | ||
817 | return 0; | |
818 | } | |
819 | ||
820 | /** | |
821 | * xemaclite_mdio_reset - Reset the mdio bus. | |
822 | * @bus: Pointer to the MII bus | |
823 | * | |
824 | * This function is required(?) as per Documentation/networking/phy.txt. | |
825 | * There is no reset in this device; this function always returns 0. | |
826 | */ | |
827 | static int xemaclite_mdio_reset(struct mii_bus *bus) | |
828 | { | |
829 | return 0; | |
830 | } | |
831 | ||
832 | /** | |
833 | * xemaclite_mdio_setup - Register mii_bus for the Emaclite device | |
834 | * @lp: Pointer to the Emaclite device private data | |
835 | * @ofdev: Pointer to OF device structure | |
836 | * | |
837 | * This function enables MDIO bus in the Emaclite device and registers a | |
838 | * mii_bus. | |
839 | * | |
840 | * Return: 0 upon success or a negative error upon failure | |
841 | */ | |
842 | static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev) | |
843 | { | |
844 | struct mii_bus *bus; | |
845 | int rc; | |
846 | struct resource res; | |
847 | struct device_node *np = of_get_parent(lp->phy_node); | |
848 | ||
849 | /* Don't register the MDIO bus if the phy_node or its parent node | |
850 | * can't be found. | |
851 | */ | |
852 | if (!np) | |
853 | return -ENODEV; | |
854 | ||
855 | /* Enable the MDIO bus by asserting the enable bit in MDIO Control | |
856 | * register. | |
857 | */ | |
858 | out_be32(lp->base_addr + XEL_MDIOCTRL_OFFSET, | |
859 | XEL_MDIOCTRL_MDIOEN_MASK); | |
860 | ||
861 | bus = mdiobus_alloc(); | |
862 | if (!bus) | |
863 | return -ENOMEM; | |
864 | ||
865 | of_address_to_resource(np, 0, &res); | |
866 | snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx", | |
867 | (unsigned long long)res.start); | |
868 | bus->priv = lp; | |
869 | bus->name = "Xilinx Emaclite MDIO"; | |
870 | bus->read = xemaclite_mdio_read; | |
871 | bus->write = xemaclite_mdio_write; | |
872 | bus->reset = xemaclite_mdio_reset; | |
873 | bus->parent = dev; | |
874 | bus->irq = lp->mdio_irqs; /* preallocated IRQ table */ | |
875 | ||
876 | lp->mii_bus = bus; | |
877 | ||
878 | rc = of_mdiobus_register(bus, np); | |
879 | if (rc) | |
880 | goto err_register; | |
881 | ||
882 | return 0; | |
883 | ||
884 | err_register: | |
885 | mdiobus_free(bus); | |
886 | return rc; | |
887 | } | |
888 | ||
889 | /** | |
890 | * xemaclite_adjust_link - Link state callback for the Emaclite device | |
891 | * @ndev: pointer to net_device struct | |
892 | * | |
893 | * There's nothing in the Emaclite device to be configured when the link | |
894 | * state changes. We just print the status. | |
895 | */ | |
896 | void xemaclite_adjust_link(struct net_device *ndev) | |
897 | { | |
898 | struct net_local *lp = netdev_priv(ndev); | |
899 | struct phy_device *phy = lp->phy_dev; | |
900 | int link_state; | |
901 | ||
902 | /* hash together the state values to decide if something has changed */ | |
903 | link_state = phy->speed | (phy->duplex << 1) | phy->link; | |
904 | ||
905 | if (lp->last_link != link_state) { | |
906 | lp->last_link = link_state; | |
907 | phy_print_status(phy); | |
908 | } | |
909 | } | |
910 | ||
bb81b2dd JL |
911 | /** |
912 | * xemaclite_open - Open the network device | |
913 | * @dev: Pointer to the network device | |
914 | * | |
915 | * This function sets the MAC address, requests an IRQ and enables interrupts | |
916 | * for the Emaclite device and starts the Tx queue. | |
5cdaaa12 | 917 | * It also connects to the phy device, if MDIO is included in Emaclite device. |
bb81b2dd JL |
918 | */ |
919 | static int xemaclite_open(struct net_device *dev) | |
920 | { | |
921 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
922 | int retval; | |
923 | ||
924 | /* Just to be safe, stop the device first */ | |
925 | xemaclite_disable_interrupts(lp); | |
926 | ||
5cdaaa12 JL |
927 | if (lp->phy_node) { |
928 | u32 bmcr; | |
929 | ||
930 | lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node, | |
931 | xemaclite_adjust_link, 0, | |
932 | PHY_INTERFACE_MODE_MII); | |
933 | if (!lp->phy_dev) { | |
934 | dev_err(&lp->ndev->dev, "of_phy_connect() failed\n"); | |
935 | return -ENODEV; | |
936 | } | |
937 | ||
938 | /* EmacLite doesn't support giga-bit speeds */ | |
939 | lp->phy_dev->supported &= (PHY_BASIC_FEATURES); | |
940 | lp->phy_dev->advertising = lp->phy_dev->supported; | |
941 | ||
942 | /* Don't advertise 1000BASE-T Full/Half duplex speeds */ | |
943 | phy_write(lp->phy_dev, MII_CTRL1000, 0); | |
944 | ||
945 | /* Advertise only 10 and 100mbps full/half duplex speeds */ | |
946 | phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL); | |
947 | ||
948 | /* Restart auto negotiation */ | |
949 | bmcr = phy_read(lp->phy_dev, MII_BMCR); | |
950 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
951 | phy_write(lp->phy_dev, MII_BMCR, bmcr); | |
952 | ||
953 | phy_start(lp->phy_dev); | |
954 | } | |
955 | ||
bb81b2dd | 956 | /* Set the MAC address each time opened */ |
5cdaaa12 | 957 | xemaclite_update_address(lp, dev->dev_addr); |
bb81b2dd JL |
958 | |
959 | /* Grab the IRQ */ | |
a0607fd3 | 960 | retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev); |
bb81b2dd JL |
961 | if (retval) { |
962 | dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n", | |
963 | dev->irq); | |
5cdaaa12 JL |
964 | if (lp->phy_dev) |
965 | phy_disconnect(lp->phy_dev); | |
966 | lp->phy_dev = NULL; | |
967 | ||
bb81b2dd JL |
968 | return retval; |
969 | } | |
970 | ||
971 | /* Enable Interrupts */ | |
972 | xemaclite_enable_interrupts(lp); | |
973 | ||
974 | /* We're ready to go */ | |
975 | netif_start_queue(dev); | |
976 | ||
977 | return 0; | |
978 | } | |
979 | ||
980 | /** | |
981 | * xemaclite_close - Close the network device | |
982 | * @dev: Pointer to the network device | |
983 | * | |
984 | * This function stops the Tx queue, disables interrupts and frees the IRQ for | |
985 | * the Emaclite device. | |
5cdaaa12 | 986 | * It also disconnects the phy device associated with the Emaclite device. |
bb81b2dd JL |
987 | */ |
988 | static int xemaclite_close(struct net_device *dev) | |
989 | { | |
990 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
991 | ||
992 | netif_stop_queue(dev); | |
993 | xemaclite_disable_interrupts(lp); | |
994 | free_irq(dev->irq, dev); | |
995 | ||
5cdaaa12 JL |
996 | if (lp->phy_dev) |
997 | phy_disconnect(lp->phy_dev); | |
998 | lp->phy_dev = NULL; | |
999 | ||
bb81b2dd JL |
1000 | return 0; |
1001 | } | |
1002 | ||
1003 | /** | |
1004 | * xemaclite_get_stats - Get the stats for the net_device | |
1005 | * @dev: Pointer to the network device | |
1006 | * | |
1007 | * This function returns the address of the 'net_device_stats' structure for the | |
1008 | * given network device. This structure holds usage statistics for the network | |
1009 | * device. | |
1010 | * | |
1011 | * Return: Pointer to the net_device_stats structure. | |
1012 | */ | |
1013 | static struct net_device_stats *xemaclite_get_stats(struct net_device *dev) | |
1014 | { | |
1015 | return &dev->stats; | |
1016 | } | |
1017 | ||
1018 | /** | |
1019 | * xemaclite_send - Transmit a frame | |
1020 | * @orig_skb: Pointer to the socket buffer to be transmitted | |
1021 | * @dev: Pointer to the network device | |
1022 | * | |
1023 | * This function checks if the Tx buffer of the Emaclite device is free to send | |
1024 | * data. If so, it fills the Tx buffer with data from socket buffer data, | |
1025 | * updates the stats and frees the socket buffer. The Tx completion is signaled | |
1026 | * by an interrupt. If the Tx buffer isn't free, then the socket buffer is | |
1027 | * deferred and the Tx queue is stopped so that the deferred socket buffer can | |
1028 | * be transmitted when the Emaclite device is free to transmit data. | |
1029 | * | |
1030 | * Return: 0, always. | |
1031 | */ | |
1032 | static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev) | |
1033 | { | |
1034 | struct net_local *lp = (struct net_local *) netdev_priv(dev); | |
1035 | struct sk_buff *new_skb; | |
1036 | unsigned int len; | |
1037 | unsigned long flags; | |
1038 | ||
1039 | len = orig_skb->len; | |
1040 | ||
1041 | new_skb = orig_skb; | |
1042 | ||
1043 | spin_lock_irqsave(&lp->reset_lock, flags); | |
1044 | if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) { | |
1045 | /* If the Emaclite Tx buffer is busy, stop the Tx queue and | |
1046 | * defer the skb for transmission at a later point when the | |
1047 | * current transmission is complete */ | |
1048 | netif_stop_queue(dev); | |
1049 | lp->deferred_skb = new_skb; | |
1050 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
1051 | return 0; | |
1052 | } | |
1053 | spin_unlock_irqrestore(&lp->reset_lock, flags); | |
1054 | ||
1055 | dev->stats.tx_bytes += len; | |
1056 | dev_kfree_skb(new_skb); | |
1057 | dev->trans_start = jiffies; | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | ||
bb81b2dd JL |
1062 | /** |
1063 | * xemaclite_remove_ndev - Free the network device | |
1064 | * @ndev: Pointer to the network device to be freed | |
1065 | * | |
1066 | * This function un maps the IO region of the Emaclite device and frees the net | |
1067 | * device. | |
1068 | */ | |
1069 | static void xemaclite_remove_ndev(struct net_device *ndev) | |
1070 | { | |
1071 | if (ndev) { | |
1072 | struct net_local *lp = (struct net_local *) netdev_priv(ndev); | |
1073 | ||
1074 | if (lp->base_addr) | |
1075 | iounmap((void __iomem __force *) (lp->base_addr)); | |
1076 | free_netdev(ndev); | |
1077 | } | |
1078 | } | |
1079 | ||
1080 | /** | |
1081 | * get_bool - Get a parameter from the OF device | |
1082 | * @ofdev: Pointer to OF device structure | |
1083 | * @s: Property to be retrieved | |
1084 | * | |
1085 | * This function looks for a property in the device node and returns the value | |
1086 | * of the property if its found or 0 if the property is not found. | |
1087 | * | |
1088 | * Return: Value of the parameter if the parameter is found, or 0 otherwise | |
1089 | */ | |
1090 | static bool get_bool(struct of_device *ofdev, const char *s) | |
1091 | { | |
1092 | u32 *p = (u32 *)of_get_property(ofdev->node, s, NULL); | |
1093 | ||
1094 | if (p) { | |
1095 | return (bool)*p; | |
1096 | } else { | |
1097 | dev_warn(&ofdev->dev, "Parameter %s not found," | |
1098 | "defaulting to false\n", s); | |
1099 | return 0; | |
1100 | } | |
1101 | } | |
1102 | ||
1103 | static struct net_device_ops xemaclite_netdev_ops; | |
1104 | ||
1105 | /** | |
1106 | * xemaclite_of_probe - Probe method for the Emaclite device. | |
1107 | * @ofdev: Pointer to OF device structure | |
1108 | * @match: Pointer to the structure used for matching a device | |
1109 | * | |
1110 | * This function probes for the Emaclite device in the device tree. | |
1111 | * It initializes the driver data structure and the hardware, sets the MAC | |
1112 | * address and registers the network device. | |
5cdaaa12 JL |
1113 | * It also registers a mii_bus for the Emaclite device, if MDIO is included |
1114 | * in the device. | |
bb81b2dd JL |
1115 | * |
1116 | * Return: 0, if the driver is bound to the Emaclite device, or | |
1117 | * a negative error if there is failure. | |
1118 | */ | |
1119 | static int __devinit xemaclite_of_probe(struct of_device *ofdev, | |
1120 | const struct of_device_id *match) | |
1121 | { | |
1122 | struct resource r_irq; /* Interrupt resources */ | |
1123 | struct resource r_mem; /* IO mem resources */ | |
1124 | struct net_device *ndev = NULL; | |
1125 | struct net_local *lp = NULL; | |
1126 | struct device *dev = &ofdev->dev; | |
1127 | const void *mac_address; | |
1128 | ||
1129 | int rc = 0; | |
1130 | ||
1131 | dev_info(dev, "Device Tree Probing\n"); | |
1132 | ||
1133 | /* Get iospace for the device */ | |
1134 | rc = of_address_to_resource(ofdev->node, 0, &r_mem); | |
1135 | if (rc) { | |
1136 | dev_err(dev, "invalid address\n"); | |
1137 | return rc; | |
1138 | } | |
1139 | ||
1140 | /* Get IRQ for the device */ | |
1141 | rc = of_irq_to_resource(ofdev->node, 0, &r_irq); | |
1142 | if (rc == NO_IRQ) { | |
1143 | dev_err(dev, "no IRQ found\n"); | |
1144 | return rc; | |
1145 | } | |
1146 | ||
1147 | /* Create an ethernet device instance */ | |
1148 | ndev = alloc_etherdev(sizeof(struct net_local)); | |
1149 | if (!ndev) { | |
1150 | dev_err(dev, "Could not allocate network device\n"); | |
1151 | return -ENOMEM; | |
1152 | } | |
1153 | ||
1154 | dev_set_drvdata(dev, ndev); | |
5cdaaa12 | 1155 | SET_NETDEV_DEV(ndev, &ofdev->dev); |
bb81b2dd JL |
1156 | |
1157 | ndev->irq = r_irq.start; | |
1158 | ndev->mem_start = r_mem.start; | |
1159 | ndev->mem_end = r_mem.end; | |
1160 | ||
1161 | lp = netdev_priv(ndev); | |
1162 | lp->ndev = ndev; | |
1163 | ||
1164 | if (!request_mem_region(ndev->mem_start, | |
1165 | ndev->mem_end - ndev->mem_start + 1, | |
1166 | DRIVER_NAME)) { | |
1167 | dev_err(dev, "Couldn't lock memory region at %p\n", | |
1168 | (void *)ndev->mem_start); | |
1169 | rc = -EBUSY; | |
1170 | goto error2; | |
1171 | } | |
1172 | ||
1173 | /* Get the virtual base address for the device */ | |
1174 | lp->base_addr = ioremap(r_mem.start, r_mem.end - r_mem.start + 1); | |
1175 | if (NULL == lp->base_addr) { | |
1176 | dev_err(dev, "EmacLite: Could not allocate iomem\n"); | |
1177 | rc = -EIO; | |
1178 | goto error1; | |
1179 | } | |
1180 | ||
1181 | spin_lock_init(&lp->reset_lock); | |
1182 | lp->next_tx_buf_to_use = 0x0; | |
1183 | lp->next_rx_buf_to_use = 0x0; | |
1184 | lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong"); | |
1185 | lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong"); | |
1186 | mac_address = of_get_mac_address(ofdev->node); | |
1187 | ||
1188 | if (mac_address) | |
1189 | /* Set the MAC address. */ | |
1190 | memcpy(ndev->dev_addr, mac_address, 6); | |
1191 | else | |
1192 | dev_warn(dev, "No MAC address found\n"); | |
1193 | ||
1194 | /* Clear the Tx CSR's in case this is a restart */ | |
1195 | out_be32(lp->base_addr + XEL_TSR_OFFSET, 0); | |
1196 | out_be32(lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET, 0); | |
1197 | ||
1198 | /* Set the MAC address in the EmacLite device */ | |
5cdaaa12 JL |
1199 | xemaclite_update_address(lp, ndev->dev_addr); |
1200 | ||
1201 | lp->phy_node = of_parse_phandle(ofdev->node, "phy-handle", 0); | |
1202 | rc = xemaclite_mdio_setup(lp, &ofdev->dev); | |
1203 | if (rc) | |
1204 | dev_warn(&ofdev->dev, "error registering MDIO bus\n"); | |
bb81b2dd | 1205 | |
5491f3a5 | 1206 | dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr); |
bb81b2dd JL |
1207 | |
1208 | ndev->netdev_ops = &xemaclite_netdev_ops; | |
1209 | ndev->flags &= ~IFF_MULTICAST; | |
1210 | ndev->watchdog_timeo = TX_TIMEOUT; | |
1211 | ||
1212 | /* Finally, register the device */ | |
1213 | rc = register_netdev(ndev); | |
1214 | if (rc) { | |
1215 | dev_err(dev, | |
1216 | "Cannot register network device, aborting\n"); | |
1217 | goto error1; | |
1218 | } | |
1219 | ||
1220 | dev_info(dev, | |
1221 | "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n", | |
1222 | (unsigned int __force)ndev->mem_start, | |
1223 | (unsigned int __force)lp->base_addr, ndev->irq); | |
1224 | return 0; | |
1225 | ||
1226 | error1: | |
1227 | release_mem_region(ndev->mem_start, r_mem.end - r_mem.start + 1); | |
1228 | ||
1229 | error2: | |
1230 | xemaclite_remove_ndev(ndev); | |
1231 | return rc; | |
1232 | } | |
1233 | ||
1234 | /** | |
1235 | * xemaclite_of_remove - Unbind the driver from the Emaclite device. | |
1236 | * @of_dev: Pointer to OF device structure | |
1237 | * | |
1238 | * This function is called if a device is physically removed from the system or | |
1239 | * if the driver module is being unloaded. It frees any resources allocated to | |
1240 | * the device. | |
1241 | * | |
1242 | * Return: 0, always. | |
1243 | */ | |
1244 | static int __devexit xemaclite_of_remove(struct of_device *of_dev) | |
1245 | { | |
1246 | struct device *dev = &of_dev->dev; | |
1247 | struct net_device *ndev = dev_get_drvdata(dev); | |
1248 | ||
5cdaaa12 JL |
1249 | struct net_local *lp = (struct net_local *) netdev_priv(ndev); |
1250 | ||
1251 | /* Un-register the mii_bus, if configured */ | |
1252 | if (lp->has_mdio) { | |
1253 | mdiobus_unregister(lp->mii_bus); | |
1254 | kfree(lp->mii_bus->irq); | |
1255 | mdiobus_free(lp->mii_bus); | |
1256 | lp->mii_bus = NULL; | |
1257 | } | |
1258 | ||
bb81b2dd JL |
1259 | unregister_netdev(ndev); |
1260 | ||
5cdaaa12 JL |
1261 | if (lp->phy_node) |
1262 | of_node_put(lp->phy_node); | |
1263 | lp->phy_node = NULL; | |
1264 | ||
bb81b2dd JL |
1265 | release_mem_region(ndev->mem_start, ndev->mem_end-ndev->mem_start + 1); |
1266 | ||
1267 | xemaclite_remove_ndev(ndev); | |
bb81b2dd JL |
1268 | dev_set_drvdata(dev, NULL); |
1269 | ||
1270 | return 0; | |
1271 | } | |
1272 | ||
1273 | static struct net_device_ops xemaclite_netdev_ops = { | |
1274 | .ndo_open = xemaclite_open, | |
1275 | .ndo_stop = xemaclite_close, | |
1276 | .ndo_start_xmit = xemaclite_send, | |
5cdaaa12 | 1277 | .ndo_set_mac_address = xemaclite_set_mac_address, |
bb81b2dd JL |
1278 | .ndo_tx_timeout = xemaclite_tx_timeout, |
1279 | .ndo_get_stats = xemaclite_get_stats, | |
1280 | }; | |
1281 | ||
1282 | /* Match table for OF platform binding */ | |
1283 | static struct of_device_id xemaclite_of_match[] __devinitdata = { | |
1284 | { .compatible = "xlnx,opb-ethernetlite-1.01.a", }, | |
1285 | { .compatible = "xlnx,opb-ethernetlite-1.01.b", }, | |
1286 | { .compatible = "xlnx,xps-ethernetlite-1.00.a", }, | |
1287 | { .compatible = "xlnx,xps-ethernetlite-2.00.a", }, | |
1288 | { .compatible = "xlnx,xps-ethernetlite-2.01.a", }, | |
5cdaaa12 | 1289 | { .compatible = "xlnx,xps-ethernetlite-3.00.a", }, |
bb81b2dd JL |
1290 | { /* end of list */ }, |
1291 | }; | |
1292 | MODULE_DEVICE_TABLE(of, xemaclite_of_match); | |
1293 | ||
1294 | static struct of_platform_driver xemaclite_of_driver = { | |
1295 | .name = DRIVER_NAME, | |
1296 | .match_table = xemaclite_of_match, | |
1297 | .probe = xemaclite_of_probe, | |
1298 | .remove = __devexit_p(xemaclite_of_remove), | |
1299 | }; | |
1300 | ||
1301 | /** | |
1302 | * xgpiopss_init - Initial driver registration call | |
1303 | * | |
1304 | * Return: 0 upon success, or a negative error upon failure. | |
1305 | */ | |
1306 | static int __init xemaclite_init(void) | |
1307 | { | |
1308 | /* No kernel boot options used, we just need to register the driver */ | |
1309 | return of_register_platform_driver(&xemaclite_of_driver); | |
1310 | } | |
1311 | ||
1312 | /** | |
1313 | * xemaclite_cleanup - Driver un-registration call | |
1314 | */ | |
1315 | static void __exit xemaclite_cleanup(void) | |
1316 | { | |
1317 | of_unregister_platform_driver(&xemaclite_of_driver); | |
1318 | } | |
1319 | ||
1320 | module_init(xemaclite_init); | |
1321 | module_exit(xemaclite_cleanup); | |
1322 | ||
1323 | MODULE_AUTHOR("Xilinx, Inc."); | |
1324 | MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver"); | |
1325 | MODULE_LICENSE("GPL"); |