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45def22c DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | |
62232e45 | 14 | #include <linux/vmalloc.h> |
45def22c DW |
15 | #include <linux/uaccess.h> |
16 | #include <linux/fcntl.h> | |
e6dfb2de | 17 | #include <linux/async.h> |
62232e45 | 18 | #include <linux/ndctl.h> |
4d88a97a | 19 | #include <linux/sched.h> |
45def22c DW |
20 | #include <linux/slab.h> |
21 | #include <linux/fs.h> | |
22 | #include <linux/io.h> | |
62232e45 | 23 | #include <linux/mm.h> |
4d88a97a | 24 | #include <linux/nd.h> |
45def22c | 25 | #include "nd-core.h" |
4d88a97a | 26 | #include "nd.h" |
45def22c | 27 | |
62232e45 | 28 | int nvdimm_major; |
45def22c DW |
29 | static int nvdimm_bus_major; |
30 | static struct class *nd_class; | |
31 | ||
4d88a97a DW |
32 | static int to_nd_device_type(struct device *dev) |
33 | { | |
34 | if (is_nvdimm(dev)) | |
35 | return ND_DEVICE_DIMM; | |
36 | ||
37 | return 0; | |
38 | } | |
39 | ||
40 | static int nvdimm_bus_uevent(struct device *dev, struct kobj_uevent_env *env) | |
41 | { | |
42 | return add_uevent_var(env, "MODALIAS=" ND_DEVICE_MODALIAS_FMT, | |
43 | to_nd_device_type(dev)); | |
44 | } | |
45 | ||
46 | static int nvdimm_bus_match(struct device *dev, struct device_driver *drv) | |
47 | { | |
48 | struct nd_device_driver *nd_drv = to_nd_device_driver(drv); | |
49 | ||
50 | return test_bit(to_nd_device_type(dev), &nd_drv->type); | |
51 | } | |
52 | ||
53 | static int nvdimm_bus_probe(struct device *dev) | |
54 | { | |
55 | struct nd_device_driver *nd_drv = to_nd_device_driver(dev->driver); | |
56 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); | |
57 | int rc; | |
58 | ||
59 | rc = nd_drv->probe(dev); | |
60 | dev_dbg(&nvdimm_bus->dev, "%s.probe(%s) = %d\n", dev->driver->name, | |
61 | dev_name(dev), rc); | |
62 | return rc; | |
63 | } | |
64 | ||
65 | static int nvdimm_bus_remove(struct device *dev) | |
66 | { | |
67 | struct nd_device_driver *nd_drv = to_nd_device_driver(dev->driver); | |
68 | struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev); | |
69 | int rc; | |
70 | ||
71 | rc = nd_drv->remove(dev); | |
72 | dev_dbg(&nvdimm_bus->dev, "%s.remove(%s) = %d\n", dev->driver->name, | |
73 | dev_name(dev), rc); | |
74 | return rc; | |
75 | } | |
76 | ||
77 | static struct bus_type nvdimm_bus_type = { | |
e6dfb2de | 78 | .name = "nd", |
4d88a97a DW |
79 | .uevent = nvdimm_bus_uevent, |
80 | .match = nvdimm_bus_match, | |
81 | .probe = nvdimm_bus_probe, | |
82 | .remove = nvdimm_bus_remove, | |
83 | }; | |
84 | ||
85 | static ASYNC_DOMAIN_EXCLUSIVE(nd_async_domain); | |
86 | ||
87 | void nd_synchronize(void) | |
88 | { | |
89 | async_synchronize_full_domain(&nd_async_domain); | |
90 | } | |
91 | EXPORT_SYMBOL_GPL(nd_synchronize); | |
92 | ||
93 | static void nd_async_device_register(void *d, async_cookie_t cookie) | |
94 | { | |
95 | struct device *dev = d; | |
96 | ||
97 | if (device_add(dev) != 0) { | |
98 | dev_err(dev, "%s: failed\n", __func__); | |
99 | put_device(dev); | |
100 | } | |
101 | put_device(dev); | |
102 | } | |
103 | ||
104 | static void nd_async_device_unregister(void *d, async_cookie_t cookie) | |
105 | { | |
106 | struct device *dev = d; | |
107 | ||
108 | device_unregister(dev); | |
109 | put_device(dev); | |
110 | } | |
111 | ||
112 | void nd_device_register(struct device *dev) | |
113 | { | |
114 | dev->bus = &nvdimm_bus_type; | |
115 | device_initialize(dev); | |
116 | get_device(dev); | |
117 | async_schedule_domain(nd_async_device_register, dev, | |
118 | &nd_async_domain); | |
119 | } | |
120 | EXPORT_SYMBOL(nd_device_register); | |
121 | ||
122 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode) | |
123 | { | |
124 | switch (mode) { | |
125 | case ND_ASYNC: | |
126 | get_device(dev); | |
127 | async_schedule_domain(nd_async_device_unregister, dev, | |
128 | &nd_async_domain); | |
129 | break; | |
130 | case ND_SYNC: | |
131 | nd_synchronize(); | |
132 | device_unregister(dev); | |
133 | break; | |
134 | } | |
135 | } | |
136 | EXPORT_SYMBOL(nd_device_unregister); | |
137 | ||
138 | /** | |
139 | * __nd_driver_register() - register a region or a namespace driver | |
140 | * @nd_drv: driver to register | |
141 | * @owner: automatically set by nd_driver_register() macro | |
142 | * @mod_name: automatically set by nd_driver_register() macro | |
143 | */ | |
144 | int __nd_driver_register(struct nd_device_driver *nd_drv, struct module *owner, | |
145 | const char *mod_name) | |
146 | { | |
147 | struct device_driver *drv = &nd_drv->drv; | |
148 | ||
149 | if (!nd_drv->type) { | |
150 | pr_debug("driver type bitmask not set (%pf)\n", | |
151 | __builtin_return_address(0)); | |
152 | return -EINVAL; | |
153 | } | |
154 | ||
155 | if (!nd_drv->probe || !nd_drv->remove) { | |
156 | pr_debug("->probe() and ->remove() must be specified\n"); | |
157 | return -EINVAL; | |
158 | } | |
159 | ||
160 | drv->bus = &nvdimm_bus_type; | |
161 | drv->owner = owner; | |
162 | drv->mod_name = mod_name; | |
163 | ||
164 | return driver_register(drv); | |
165 | } | |
166 | EXPORT_SYMBOL(__nd_driver_register); | |
167 | ||
168 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, | |
169 | char *buf) | |
170 | { | |
171 | return sprintf(buf, ND_DEVICE_MODALIAS_FMT "\n", | |
172 | to_nd_device_type(dev)); | |
173 | } | |
174 | static DEVICE_ATTR_RO(modalias); | |
175 | ||
176 | static ssize_t devtype_show(struct device *dev, struct device_attribute *attr, | |
177 | char *buf) | |
178 | { | |
179 | return sprintf(buf, "%s\n", dev->type->name); | |
180 | } | |
181 | static DEVICE_ATTR_RO(devtype); | |
182 | ||
183 | static struct attribute *nd_device_attributes[] = { | |
184 | &dev_attr_modalias.attr, | |
185 | &dev_attr_devtype.attr, | |
186 | NULL, | |
187 | }; | |
188 | ||
189 | /** | |
190 | * nd_device_attribute_group - generic attributes for all devices on an nd bus | |
191 | */ | |
192 | struct attribute_group nd_device_attribute_group = { | |
193 | .attrs = nd_device_attributes, | |
e6dfb2de | 194 | }; |
4d88a97a | 195 | EXPORT_SYMBOL_GPL(nd_device_attribute_group); |
e6dfb2de | 196 | |
45def22c DW |
197 | int nvdimm_bus_create_ndctl(struct nvdimm_bus *nvdimm_bus) |
198 | { | |
199 | dev_t devt = MKDEV(nvdimm_bus_major, nvdimm_bus->id); | |
200 | struct device *dev; | |
201 | ||
202 | dev = device_create(nd_class, &nvdimm_bus->dev, devt, nvdimm_bus, | |
203 | "ndctl%d", nvdimm_bus->id); | |
204 | ||
205 | if (IS_ERR(dev)) { | |
206 | dev_dbg(&nvdimm_bus->dev, "failed to register ndctl%d: %ld\n", | |
207 | nvdimm_bus->id, PTR_ERR(dev)); | |
208 | return PTR_ERR(dev); | |
209 | } | |
210 | return 0; | |
211 | } | |
212 | ||
213 | void nvdimm_bus_destroy_ndctl(struct nvdimm_bus *nvdimm_bus) | |
214 | { | |
215 | device_destroy(nd_class, MKDEV(nvdimm_bus_major, nvdimm_bus->id)); | |
216 | } | |
217 | ||
62232e45 DW |
218 | static const struct nd_cmd_desc __nd_cmd_dimm_descs[] = { |
219 | [ND_CMD_IMPLEMENTED] = { }, | |
220 | [ND_CMD_SMART] = { | |
221 | .out_num = 2, | |
222 | .out_sizes = { 4, 8, }, | |
223 | }, | |
224 | [ND_CMD_SMART_THRESHOLD] = { | |
225 | .out_num = 2, | |
226 | .out_sizes = { 4, 8, }, | |
227 | }, | |
228 | [ND_CMD_DIMM_FLAGS] = { | |
229 | .out_num = 2, | |
230 | .out_sizes = { 4, 4 }, | |
231 | }, | |
232 | [ND_CMD_GET_CONFIG_SIZE] = { | |
233 | .out_num = 3, | |
234 | .out_sizes = { 4, 4, 4, }, | |
235 | }, | |
236 | [ND_CMD_GET_CONFIG_DATA] = { | |
237 | .in_num = 2, | |
238 | .in_sizes = { 4, 4, }, | |
239 | .out_num = 2, | |
240 | .out_sizes = { 4, UINT_MAX, }, | |
241 | }, | |
242 | [ND_CMD_SET_CONFIG_DATA] = { | |
243 | .in_num = 3, | |
244 | .in_sizes = { 4, 4, UINT_MAX, }, | |
245 | .out_num = 1, | |
246 | .out_sizes = { 4, }, | |
247 | }, | |
248 | [ND_CMD_VENDOR] = { | |
249 | .in_num = 3, | |
250 | .in_sizes = { 4, 4, UINT_MAX, }, | |
251 | .out_num = 3, | |
252 | .out_sizes = { 4, 4, UINT_MAX, }, | |
253 | }, | |
254 | }; | |
255 | ||
256 | const struct nd_cmd_desc *nd_cmd_dimm_desc(int cmd) | |
257 | { | |
258 | if (cmd < ARRAY_SIZE(__nd_cmd_dimm_descs)) | |
259 | return &__nd_cmd_dimm_descs[cmd]; | |
260 | return NULL; | |
261 | } | |
262 | EXPORT_SYMBOL_GPL(nd_cmd_dimm_desc); | |
263 | ||
264 | static const struct nd_cmd_desc __nd_cmd_bus_descs[] = { | |
265 | [ND_CMD_IMPLEMENTED] = { }, | |
266 | [ND_CMD_ARS_CAP] = { | |
267 | .in_num = 2, | |
268 | .in_sizes = { 8, 8, }, | |
269 | .out_num = 2, | |
270 | .out_sizes = { 4, 4, }, | |
271 | }, | |
272 | [ND_CMD_ARS_START] = { | |
273 | .in_num = 4, | |
274 | .in_sizes = { 8, 8, 2, 6, }, | |
275 | .out_num = 1, | |
276 | .out_sizes = { 4, }, | |
277 | }, | |
278 | [ND_CMD_ARS_STATUS] = { | |
279 | .out_num = 2, | |
280 | .out_sizes = { 4, UINT_MAX, }, | |
281 | }, | |
282 | }; | |
283 | ||
284 | const struct nd_cmd_desc *nd_cmd_bus_desc(int cmd) | |
285 | { | |
286 | if (cmd < ARRAY_SIZE(__nd_cmd_bus_descs)) | |
287 | return &__nd_cmd_bus_descs[cmd]; | |
288 | return NULL; | |
289 | } | |
290 | EXPORT_SYMBOL_GPL(nd_cmd_bus_desc); | |
291 | ||
292 | u32 nd_cmd_in_size(struct nvdimm *nvdimm, int cmd, | |
293 | const struct nd_cmd_desc *desc, int idx, void *buf) | |
294 | { | |
295 | if (idx >= desc->in_num) | |
296 | return UINT_MAX; | |
297 | ||
298 | if (desc->in_sizes[idx] < UINT_MAX) | |
299 | return desc->in_sizes[idx]; | |
300 | ||
301 | if (nvdimm && cmd == ND_CMD_SET_CONFIG_DATA && idx == 2) { | |
302 | struct nd_cmd_set_config_hdr *hdr = buf; | |
303 | ||
304 | return hdr->in_length; | |
305 | } else if (nvdimm && cmd == ND_CMD_VENDOR && idx == 2) { | |
306 | struct nd_cmd_vendor_hdr *hdr = buf; | |
307 | ||
308 | return hdr->in_length; | |
309 | } | |
310 | ||
311 | return UINT_MAX; | |
312 | } | |
313 | EXPORT_SYMBOL_GPL(nd_cmd_in_size); | |
314 | ||
315 | u32 nd_cmd_out_size(struct nvdimm *nvdimm, int cmd, | |
316 | const struct nd_cmd_desc *desc, int idx, const u32 *in_field, | |
317 | const u32 *out_field) | |
318 | { | |
319 | if (idx >= desc->out_num) | |
320 | return UINT_MAX; | |
321 | ||
322 | if (desc->out_sizes[idx] < UINT_MAX) | |
323 | return desc->out_sizes[idx]; | |
324 | ||
325 | if (nvdimm && cmd == ND_CMD_GET_CONFIG_DATA && idx == 1) | |
326 | return in_field[1]; | |
327 | else if (nvdimm && cmd == ND_CMD_VENDOR && idx == 2) | |
328 | return out_field[1]; | |
329 | else if (!nvdimm && cmd == ND_CMD_ARS_STATUS && idx == 1) | |
330 | return ND_CMD_ARS_STATUS_MAX; | |
331 | ||
332 | return UINT_MAX; | |
333 | } | |
334 | EXPORT_SYMBOL_GPL(nd_cmd_out_size); | |
335 | ||
336 | static int __nd_ioctl(struct nvdimm_bus *nvdimm_bus, struct nvdimm *nvdimm, | |
337 | int read_only, unsigned int ioctl_cmd, unsigned long arg) | |
338 | { | |
339 | struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc; | |
340 | size_t buf_len = 0, in_len = 0, out_len = 0; | |
341 | static char out_env[ND_CMD_MAX_ENVELOPE]; | |
342 | static char in_env[ND_CMD_MAX_ENVELOPE]; | |
343 | const struct nd_cmd_desc *desc = NULL; | |
344 | unsigned int cmd = _IOC_NR(ioctl_cmd); | |
345 | void __user *p = (void __user *) arg; | |
346 | struct device *dev = &nvdimm_bus->dev; | |
347 | const char *cmd_name, *dimm_name; | |
348 | unsigned long dsm_mask; | |
349 | void *buf; | |
350 | int rc, i; | |
351 | ||
352 | if (nvdimm) { | |
353 | desc = nd_cmd_dimm_desc(cmd); | |
354 | cmd_name = nvdimm_cmd_name(cmd); | |
355 | dsm_mask = nvdimm->dsm_mask ? *(nvdimm->dsm_mask) : 0; | |
356 | dimm_name = dev_name(&nvdimm->dev); | |
357 | } else { | |
358 | desc = nd_cmd_bus_desc(cmd); | |
359 | cmd_name = nvdimm_bus_cmd_name(cmd); | |
360 | dsm_mask = nd_desc->dsm_mask; | |
361 | dimm_name = "bus"; | |
362 | } | |
363 | ||
364 | if (!desc || (desc->out_num + desc->in_num == 0) || | |
365 | !test_bit(cmd, &dsm_mask)) | |
366 | return -ENOTTY; | |
367 | ||
368 | /* fail write commands (when read-only) */ | |
369 | if (read_only) | |
370 | switch (ioctl_cmd) { | |
371 | case ND_IOCTL_VENDOR: | |
372 | case ND_IOCTL_SET_CONFIG_DATA: | |
373 | case ND_IOCTL_ARS_START: | |
374 | dev_dbg(&nvdimm_bus->dev, "'%s' command while read-only.\n", | |
375 | nvdimm ? nvdimm_cmd_name(cmd) | |
376 | : nvdimm_bus_cmd_name(cmd)); | |
377 | return -EPERM; | |
378 | default: | |
379 | break; | |
380 | } | |
381 | ||
382 | /* process an input envelope */ | |
383 | for (i = 0; i < desc->in_num; i++) { | |
384 | u32 in_size, copy; | |
385 | ||
386 | in_size = nd_cmd_in_size(nvdimm, cmd, desc, i, in_env); | |
387 | if (in_size == UINT_MAX) { | |
388 | dev_err(dev, "%s:%s unknown input size cmd: %s field: %d\n", | |
389 | __func__, dimm_name, cmd_name, i); | |
390 | return -ENXIO; | |
391 | } | |
392 | if (!access_ok(VERIFY_READ, p + in_len, in_size)) | |
393 | return -EFAULT; | |
394 | if (in_len < sizeof(in_env)) | |
395 | copy = min_t(u32, sizeof(in_env) - in_len, in_size); | |
396 | else | |
397 | copy = 0; | |
398 | if (copy && copy_from_user(&in_env[in_len], p + in_len, copy)) | |
399 | return -EFAULT; | |
400 | in_len += in_size; | |
401 | } | |
402 | ||
403 | /* process an output envelope */ | |
404 | for (i = 0; i < desc->out_num; i++) { | |
405 | u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, | |
406 | (u32 *) in_env, (u32 *) out_env); | |
407 | u32 copy; | |
408 | ||
409 | if (out_size == UINT_MAX) { | |
410 | dev_dbg(dev, "%s:%s unknown output size cmd: %s field: %d\n", | |
411 | __func__, dimm_name, cmd_name, i); | |
412 | return -EFAULT; | |
413 | } | |
414 | if (!access_ok(VERIFY_WRITE, p + in_len + out_len, out_size)) | |
415 | return -EFAULT; | |
416 | if (out_len < sizeof(out_env)) | |
417 | copy = min_t(u32, sizeof(out_env) - out_len, out_size); | |
418 | else | |
419 | copy = 0; | |
420 | if (copy && copy_from_user(&out_env[out_len], | |
421 | p + in_len + out_len, copy)) | |
422 | return -EFAULT; | |
423 | out_len += out_size; | |
424 | } | |
425 | ||
426 | buf_len = out_len + in_len; | |
427 | if (!access_ok(VERIFY_WRITE, p, sizeof(buf_len))) | |
428 | return -EFAULT; | |
429 | ||
430 | if (buf_len > ND_IOCTL_MAX_BUFLEN) { | |
431 | dev_dbg(dev, "%s:%s cmd: %s buf_len: %zu > %d\n", __func__, | |
432 | dimm_name, cmd_name, buf_len, | |
433 | ND_IOCTL_MAX_BUFLEN); | |
434 | return -EINVAL; | |
435 | } | |
436 | ||
437 | buf = vmalloc(buf_len); | |
438 | if (!buf) | |
439 | return -ENOMEM; | |
440 | ||
441 | if (copy_from_user(buf, p, buf_len)) { | |
442 | rc = -EFAULT; | |
443 | goto out; | |
444 | } | |
445 | ||
446 | rc = nd_desc->ndctl(nd_desc, nvdimm, cmd, buf, buf_len); | |
447 | if (rc < 0) | |
448 | goto out; | |
449 | if (copy_to_user(p, buf, buf_len)) | |
450 | rc = -EFAULT; | |
451 | out: | |
452 | vfree(buf); | |
453 | return rc; | |
454 | } | |
455 | ||
45def22c DW |
456 | static long nd_ioctl(struct file *file, unsigned int cmd, unsigned long arg) |
457 | { | |
62232e45 DW |
458 | long id = (long) file->private_data; |
459 | int rc = -ENXIO, read_only; | |
460 | struct nvdimm_bus *nvdimm_bus; | |
461 | ||
462 | read_only = (O_RDWR != (file->f_flags & O_ACCMODE)); | |
463 | mutex_lock(&nvdimm_bus_list_mutex); | |
464 | list_for_each_entry(nvdimm_bus, &nvdimm_bus_list, list) { | |
465 | if (nvdimm_bus->id == id) { | |
466 | rc = __nd_ioctl(nvdimm_bus, NULL, read_only, cmd, arg); | |
467 | break; | |
468 | } | |
469 | } | |
470 | mutex_unlock(&nvdimm_bus_list_mutex); | |
471 | ||
472 | return rc; | |
473 | } | |
474 | ||
475 | static int match_dimm(struct device *dev, void *data) | |
476 | { | |
477 | long id = (long) data; | |
478 | ||
479 | if (is_nvdimm(dev)) { | |
480 | struct nvdimm *nvdimm = to_nvdimm(dev); | |
481 | ||
482 | return nvdimm->id == id; | |
483 | } | |
484 | ||
485 | return 0; | |
486 | } | |
487 | ||
488 | static long nvdimm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
489 | { | |
490 | int rc = -ENXIO, read_only; | |
491 | struct nvdimm_bus *nvdimm_bus; | |
492 | ||
493 | read_only = (O_RDWR != (file->f_flags & O_ACCMODE)); | |
494 | mutex_lock(&nvdimm_bus_list_mutex); | |
495 | list_for_each_entry(nvdimm_bus, &nvdimm_bus_list, list) { | |
496 | struct device *dev = device_find_child(&nvdimm_bus->dev, | |
497 | file->private_data, match_dimm); | |
498 | struct nvdimm *nvdimm; | |
499 | ||
500 | if (!dev) | |
501 | continue; | |
502 | ||
503 | nvdimm = to_nvdimm(dev); | |
504 | rc = __nd_ioctl(nvdimm_bus, nvdimm, read_only, cmd, arg); | |
505 | put_device(dev); | |
506 | break; | |
507 | } | |
508 | mutex_unlock(&nvdimm_bus_list_mutex); | |
509 | ||
510 | return rc; | |
511 | } | |
512 | ||
513 | static int nd_open(struct inode *inode, struct file *file) | |
514 | { | |
515 | long minor = iminor(inode); | |
516 | ||
517 | file->private_data = (void *) minor; | |
518 | return 0; | |
45def22c DW |
519 | } |
520 | ||
521 | static const struct file_operations nvdimm_bus_fops = { | |
522 | .owner = THIS_MODULE, | |
62232e45 | 523 | .open = nd_open, |
45def22c DW |
524 | .unlocked_ioctl = nd_ioctl, |
525 | .compat_ioctl = nd_ioctl, | |
526 | .llseek = noop_llseek, | |
527 | }; | |
528 | ||
62232e45 DW |
529 | static const struct file_operations nvdimm_fops = { |
530 | .owner = THIS_MODULE, | |
531 | .open = nd_open, | |
532 | .unlocked_ioctl = nvdimm_ioctl, | |
533 | .compat_ioctl = nvdimm_ioctl, | |
534 | .llseek = noop_llseek, | |
535 | }; | |
536 | ||
45def22c DW |
537 | int __init nvdimm_bus_init(void) |
538 | { | |
539 | int rc; | |
540 | ||
e6dfb2de DW |
541 | rc = bus_register(&nvdimm_bus_type); |
542 | if (rc) | |
543 | return rc; | |
544 | ||
45def22c DW |
545 | rc = register_chrdev(0, "ndctl", &nvdimm_bus_fops); |
546 | if (rc < 0) | |
62232e45 | 547 | goto err_bus_chrdev; |
45def22c DW |
548 | nvdimm_bus_major = rc; |
549 | ||
62232e45 DW |
550 | rc = register_chrdev(0, "dimmctl", &nvdimm_fops); |
551 | if (rc < 0) | |
552 | goto err_dimm_chrdev; | |
553 | nvdimm_major = rc; | |
554 | ||
45def22c DW |
555 | nd_class = class_create(THIS_MODULE, "nd"); |
556 | if (IS_ERR(nd_class)) | |
557 | goto err_class; | |
558 | ||
559 | return 0; | |
560 | ||
561 | err_class: | |
62232e45 DW |
562 | unregister_chrdev(nvdimm_major, "dimmctl"); |
563 | err_dimm_chrdev: | |
45def22c | 564 | unregister_chrdev(nvdimm_bus_major, "ndctl"); |
62232e45 | 565 | err_bus_chrdev: |
e6dfb2de | 566 | bus_unregister(&nvdimm_bus_type); |
45def22c DW |
567 | |
568 | return rc; | |
569 | } | |
570 | ||
4d88a97a | 571 | void nvdimm_bus_exit(void) |
45def22c DW |
572 | { |
573 | class_destroy(nd_class); | |
574 | unregister_chrdev(nvdimm_bus_major, "ndctl"); | |
62232e45 | 575 | unregister_chrdev(nvdimm_major, "dimmctl"); |
e6dfb2de | 576 | bus_unregister(&nvdimm_bus_type); |
45def22c | 577 | } |