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4d88a97a DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #ifndef __ND_H__ | |
14 | #define __ND_H__ | |
1f7df6f8 | 15 | #include <linux/libnvdimm.h> |
f0dc089c | 16 | #include <linux/blkdev.h> |
4d88a97a DW |
17 | #include <linux/device.h> |
18 | #include <linux/mutex.h> | |
19 | #include <linux/ndctl.h> | |
bf9bccc1 | 20 | #include <linux/types.h> |
4a826c83 | 21 | #include "label.h" |
4d88a97a | 22 | |
8c2f7e86 | 23 | enum { |
5212e11f VV |
24 | /* |
25 | * Limits the maximum number of block apertures a dimm can | |
26 | * support and is an input to the geometry/on-disk-format of a | |
27 | * BTT instance | |
28 | */ | |
29 | ND_MAX_LANES = 256, | |
8c2f7e86 | 30 | SECTOR_SHIFT = 9, |
fcae6957 | 31 | INT_LBASIZE_ALIGNMENT = 64, |
8c2f7e86 DW |
32 | }; |
33 | ||
4d88a97a DW |
34 | struct nvdimm_drvdata { |
35 | struct device *dev; | |
4a826c83 | 36 | int nsindex_size; |
4d88a97a DW |
37 | struct nd_cmd_get_config_size nsarea; |
38 | void *data; | |
4a826c83 DW |
39 | int ns_current, ns_next; |
40 | struct resource dpa; | |
bf9bccc1 | 41 | struct kref kref; |
4d88a97a DW |
42 | }; |
43 | ||
3d88002e DW |
44 | struct nd_region_namespaces { |
45 | int count; | |
46 | int active; | |
47 | }; | |
48 | ||
4a826c83 DW |
49 | static inline struct nd_namespace_index *to_namespace_index( |
50 | struct nvdimm_drvdata *ndd, int i) | |
51 | { | |
52 | if (i < 0) | |
53 | return NULL; | |
54 | ||
55 | return ndd->data + sizeof_namespace_index(ndd) * i; | |
56 | } | |
57 | ||
58 | static inline struct nd_namespace_index *to_current_namespace_index( | |
59 | struct nvdimm_drvdata *ndd) | |
60 | { | |
61 | return to_namespace_index(ndd, ndd->ns_current); | |
62 | } | |
63 | ||
64 | static inline struct nd_namespace_index *to_next_namespace_index( | |
65 | struct nvdimm_drvdata *ndd) | |
66 | { | |
67 | return to_namespace_index(ndd, ndd->ns_next); | |
68 | } | |
69 | ||
70 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ | |
71 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ | |
72 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ | |
73 | (unsigned long long) (res ? resource_size(res) : 0), \ | |
74 | (unsigned long long) (res ? res->start : 0), ##arg) | |
75 | ||
bf9bccc1 DW |
76 | #define for_each_label(l, label, labels) \ |
77 | for (l = 0; (label = labels ? labels[l] : NULL); l++) | |
78 | ||
79 | #define for_each_dpa_resource(ndd, res) \ | |
80 | for (res = (ndd)->dpa.child; res; res = res->sibling) | |
81 | ||
4a826c83 DW |
82 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
83 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ | |
84 | res; res = next, next = next ? next->sibling : NULL) | |
85 | ||
5212e11f VV |
86 | struct nd_percpu_lane { |
87 | int count; | |
88 | spinlock_t lock; | |
89 | }; | |
90 | ||
1f7df6f8 DW |
91 | struct nd_region { |
92 | struct device dev; | |
1b40e09a | 93 | struct ida ns_ida; |
8c2f7e86 | 94 | struct ida btt_ida; |
bf9bccc1 | 95 | struct device *ns_seed; |
8c2f7e86 | 96 | struct device *btt_seed; |
1f7df6f8 DW |
97 | u16 ndr_mappings; |
98 | u64 ndr_size; | |
99 | u64 ndr_start; | |
41d7a6d6 | 100 | int id, num_lanes, ro, numa_node; |
1f7df6f8 | 101 | void *provider_data; |
eaf96153 | 102 | struct nd_interleave_set *nd_set; |
5212e11f | 103 | struct nd_percpu_lane __percpu *lane; |
1f7df6f8 DW |
104 | struct nd_mapping mapping[0]; |
105 | }; | |
106 | ||
047fc8a1 RZ |
107 | struct nd_blk_region { |
108 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
109 | void (*disable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
110 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, | |
111 | void *iobuf, u64 len, int rw); | |
112 | void *blk_provider_data; | |
113 | struct nd_region nd_region; | |
114 | }; | |
115 | ||
4a826c83 DW |
116 | /* |
117 | * Lookup next in the repeating sequence of 01, 10, and 11. | |
118 | */ | |
119 | static inline unsigned nd_inc_seq(unsigned seq) | |
120 | { | |
121 | static const unsigned next[] = { 0, 2, 3, 1 }; | |
122 | ||
123 | return next[seq & 3]; | |
124 | } | |
f524bf27 | 125 | |
5212e11f | 126 | struct btt; |
8c2f7e86 DW |
127 | struct nd_btt { |
128 | struct device dev; | |
129 | struct nd_namespace_common *ndns; | |
5212e11f | 130 | struct btt *btt; |
8c2f7e86 DW |
131 | unsigned long lbasize; |
132 | u8 *uuid; | |
133 | int id; | |
134 | }; | |
135 | ||
4d88a97a DW |
136 | enum nd_async_mode { |
137 | ND_SYNC, | |
138 | ND_ASYNC, | |
139 | }; | |
140 | ||
41cd8b70 | 141 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
bf9bccc1 | 142 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
4d88a97a DW |
143 | void nd_device_register(struct device *dev); |
144 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); | |
bf9bccc1 DW |
145 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
146 | size_t len); | |
1b40e09a DW |
147 | ssize_t nd_sector_size_show(unsigned long current_lbasize, |
148 | const unsigned long *supported, char *buf); | |
149 | ssize_t nd_sector_size_store(struct device *dev, const char *buf, | |
150 | unsigned long *current_lbasize, const unsigned long *supported); | |
4d88a97a | 151 | int __init nvdimm_init(void); |
3d88002e | 152 | int __init nd_region_init(void); |
4d88a97a | 153 | void nvdimm_exit(void); |
3d88002e | 154 | void nd_region_exit(void); |
bf9bccc1 DW |
155 | struct nvdimm; |
156 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); | |
4d88a97a DW |
157 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
158 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); | |
f524bf27 DW |
159 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
160 | void *buf, size_t len); | |
8c2f7e86 DW |
161 | struct nd_btt *to_nd_btt(struct device *dev); |
162 | struct btt_sb; | |
163 | u64 nd_btt_sb_checksum(struct btt_sb *btt_sb); | |
164 | #if IS_ENABLED(CONFIG_BTT) | |
165 | int nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata); | |
166 | bool is_nd_btt(struct device *dev); | |
167 | struct device *nd_btt_create(struct nd_region *nd_region); | |
168 | #else | |
169 | static inline nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata) | |
170 | { | |
171 | return -ENODEV; | |
172 | } | |
173 | ||
174 | static inline bool is_nd_btt(struct device *dev) | |
175 | { | |
176 | return false; | |
177 | } | |
178 | ||
179 | static inline struct device *nd_btt_create(struct nd_region *nd_region) | |
180 | { | |
181 | return NULL; | |
182 | } | |
183 | ||
184 | #endif | |
3d88002e DW |
185 | struct nd_region *to_nd_region(struct device *dev); |
186 | int nd_region_to_nstype(struct nd_region *nd_region); | |
187 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); | |
bf9bccc1 | 188 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region); |
3d88002e DW |
189 | void nvdimm_bus_lock(struct device *dev); |
190 | void nvdimm_bus_unlock(struct device *dev); | |
191 | bool is_nvdimm_bus_locked(struct device *dev); | |
58138820 | 192 | int nvdimm_revalidate_disk(struct gendisk *disk); |
bf9bccc1 DW |
193 | void nvdimm_drvdata_release(struct kref *kref); |
194 | void put_ndd(struct nvdimm_drvdata *ndd); | |
4a826c83 DW |
195 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
196 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); | |
197 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
198 | struct nd_label_id *label_id, resource_size_t start, | |
199 | resource_size_t n); | |
8c2f7e86 DW |
200 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
201 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); | |
5212e11f VV |
202 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
203 | int nvdimm_namespace_detach_btt(struct nd_namespace_common *ndns); | |
204 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, | |
205 | char *name); | |
047fc8a1 | 206 | int nd_blk_region_init(struct nd_region *nd_region); |
f0dc089c DW |
207 | void __nd_iostat_start(struct bio *bio, unsigned long *start); |
208 | static inline bool nd_iostat_start(struct bio *bio, unsigned long *start) | |
209 | { | |
210 | struct gendisk *disk = bio->bi_bdev->bd_disk; | |
211 | ||
212 | if (!blk_queue_io_stat(disk->queue)) | |
213 | return false; | |
214 | ||
215 | __nd_iostat_start(bio, start); | |
216 | return true; | |
217 | } | |
218 | void nd_iostat_end(struct bio *bio, unsigned long start); | |
047fc8a1 | 219 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
4d88a97a | 220 | #endif /* __ND_H__ */ |