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4d88a97a DW |
1 | /* |
2 | * Copyright(c) 2013-2015 Intel Corporation. All rights reserved. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify | |
5 | * it under the terms of version 2 of the GNU General Public License as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | #ifndef __ND_H__ | |
14 | #define __ND_H__ | |
1f7df6f8 | 15 | #include <linux/libnvdimm.h> |
f0dc089c | 16 | #include <linux/blkdev.h> |
4d88a97a DW |
17 | #include <linux/device.h> |
18 | #include <linux/mutex.h> | |
19 | #include <linux/ndctl.h> | |
bf9bccc1 | 20 | #include <linux/types.h> |
4a826c83 | 21 | #include "label.h" |
4d88a97a | 22 | |
8c2f7e86 | 23 | enum { |
5212e11f VV |
24 | /* |
25 | * Limits the maximum number of block apertures a dimm can | |
26 | * support and is an input to the geometry/on-disk-format of a | |
27 | * BTT instance | |
28 | */ | |
29 | ND_MAX_LANES = 256, | |
8c2f7e86 | 30 | SECTOR_SHIFT = 9, |
fcae6957 | 31 | INT_LBASIZE_ALIGNMENT = 64, |
e1455744 DW |
32 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) |
33 | ND_PFN_ALIGN = PAGES_PER_SECTION * PAGE_SIZE, | |
34 | ND_PFN_MASK = ND_PFN_ALIGN - 1, | |
35 | #else | |
36 | ND_PFN_ALIGN = 0, | |
37 | ND_PFN_MASK = 0, | |
38 | #endif | |
8c2f7e86 DW |
39 | }; |
40 | ||
4d88a97a DW |
41 | struct nvdimm_drvdata { |
42 | struct device *dev; | |
4a826c83 | 43 | int nsindex_size; |
4d88a97a DW |
44 | struct nd_cmd_get_config_size nsarea; |
45 | void *data; | |
4a826c83 DW |
46 | int ns_current, ns_next; |
47 | struct resource dpa; | |
bf9bccc1 | 48 | struct kref kref; |
4d88a97a DW |
49 | }; |
50 | ||
3d88002e DW |
51 | struct nd_region_namespaces { |
52 | int count; | |
53 | int active; | |
54 | }; | |
55 | ||
4a826c83 DW |
56 | static inline struct nd_namespace_index *to_namespace_index( |
57 | struct nvdimm_drvdata *ndd, int i) | |
58 | { | |
59 | if (i < 0) | |
60 | return NULL; | |
61 | ||
62 | return ndd->data + sizeof_namespace_index(ndd) * i; | |
63 | } | |
64 | ||
65 | static inline struct nd_namespace_index *to_current_namespace_index( | |
66 | struct nvdimm_drvdata *ndd) | |
67 | { | |
68 | return to_namespace_index(ndd, ndd->ns_current); | |
69 | } | |
70 | ||
71 | static inline struct nd_namespace_index *to_next_namespace_index( | |
72 | struct nvdimm_drvdata *ndd) | |
73 | { | |
74 | return to_namespace_index(ndd, ndd->ns_next); | |
75 | } | |
76 | ||
77 | #define nd_dbg_dpa(r, d, res, fmt, arg...) \ | |
78 | dev_dbg((r) ? &(r)->dev : (d)->dev, "%s: %.13s: %#llx @ %#llx " fmt, \ | |
79 | (r) ? dev_name((d)->dev) : "", res ? res->name : "null", \ | |
80 | (unsigned long long) (res ? resource_size(res) : 0), \ | |
81 | (unsigned long long) (res ? res->start : 0), ##arg) | |
82 | ||
bf9bccc1 DW |
83 | #define for_each_label(l, label, labels) \ |
84 | for (l = 0; (label = labels ? labels[l] : NULL); l++) | |
85 | ||
86 | #define for_each_dpa_resource(ndd, res) \ | |
87 | for (res = (ndd)->dpa.child; res; res = res->sibling) | |
88 | ||
4a826c83 DW |
89 | #define for_each_dpa_resource_safe(ndd, res, next) \ |
90 | for (res = (ndd)->dpa.child, next = res ? res->sibling : NULL; \ | |
91 | res; res = next, next = next ? next->sibling : NULL) | |
92 | ||
5212e11f VV |
93 | struct nd_percpu_lane { |
94 | int count; | |
95 | spinlock_t lock; | |
96 | }; | |
97 | ||
1f7df6f8 DW |
98 | struct nd_region { |
99 | struct device dev; | |
1b40e09a | 100 | struct ida ns_ida; |
8c2f7e86 | 101 | struct ida btt_ida; |
e1455744 | 102 | struct ida pfn_ida; |
bf9bccc1 | 103 | struct device *ns_seed; |
8c2f7e86 | 104 | struct device *btt_seed; |
e1455744 | 105 | struct device *pfn_seed; |
1f7df6f8 DW |
106 | u16 ndr_mappings; |
107 | u64 ndr_size; | |
108 | u64 ndr_start; | |
41d7a6d6 | 109 | int id, num_lanes, ro, numa_node; |
1f7df6f8 | 110 | void *provider_data; |
eaf96153 | 111 | struct nd_interleave_set *nd_set; |
5212e11f | 112 | struct nd_percpu_lane __percpu *lane; |
1f7df6f8 DW |
113 | struct nd_mapping mapping[0]; |
114 | }; | |
115 | ||
047fc8a1 RZ |
116 | struct nd_blk_region { |
117 | int (*enable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
118 | void (*disable)(struct nvdimm_bus *nvdimm_bus, struct device *dev); | |
119 | int (*do_io)(struct nd_blk_region *ndbr, resource_size_t dpa, | |
120 | void *iobuf, u64 len, int rw); | |
121 | void *blk_provider_data; | |
122 | struct nd_region nd_region; | |
123 | }; | |
124 | ||
4a826c83 DW |
125 | /* |
126 | * Lookup next in the repeating sequence of 01, 10, and 11. | |
127 | */ | |
128 | static inline unsigned nd_inc_seq(unsigned seq) | |
129 | { | |
130 | static const unsigned next[] = { 0, 2, 3, 1 }; | |
131 | ||
132 | return next[seq & 3]; | |
133 | } | |
f524bf27 | 134 | |
5212e11f | 135 | struct btt; |
8c2f7e86 DW |
136 | struct nd_btt { |
137 | struct device dev; | |
138 | struct nd_namespace_common *ndns; | |
5212e11f | 139 | struct btt *btt; |
8c2f7e86 DW |
140 | unsigned long lbasize; |
141 | u8 *uuid; | |
142 | int id; | |
143 | }; | |
144 | ||
e1455744 DW |
145 | enum nd_pfn_mode { |
146 | PFN_MODE_NONE, | |
147 | PFN_MODE_RAM, | |
148 | PFN_MODE_PMEM, | |
149 | }; | |
150 | ||
151 | struct nd_pfn { | |
152 | int id; | |
153 | u8 *uuid; | |
154 | struct device dev; | |
155 | unsigned long npfns; | |
156 | enum nd_pfn_mode mode; | |
157 | struct nd_pfn_sb *pfn_sb; | |
158 | struct nd_namespace_common *ndns; | |
159 | }; | |
160 | ||
4d88a97a DW |
161 | enum nd_async_mode { |
162 | ND_SYNC, | |
163 | ND_ASYNC, | |
164 | }; | |
165 | ||
41cd8b70 | 166 | int nd_integrity_init(struct gendisk *disk, unsigned long meta_size); |
bf9bccc1 | 167 | void wait_nvdimm_bus_probe_idle(struct device *dev); |
4d88a97a DW |
168 | void nd_device_register(struct device *dev); |
169 | void nd_device_unregister(struct device *dev, enum nd_async_mode mode); | |
bf9bccc1 DW |
170 | int nd_uuid_store(struct device *dev, u8 **uuid_out, const char *buf, |
171 | size_t len); | |
1b40e09a DW |
172 | ssize_t nd_sector_size_show(unsigned long current_lbasize, |
173 | const unsigned long *supported, char *buf); | |
174 | ssize_t nd_sector_size_store(struct device *dev, const char *buf, | |
175 | unsigned long *current_lbasize, const unsigned long *supported); | |
4d88a97a | 176 | int __init nvdimm_init(void); |
3d88002e | 177 | int __init nd_region_init(void); |
4d88a97a | 178 | void nvdimm_exit(void); |
3d88002e | 179 | void nd_region_exit(void); |
bf9bccc1 DW |
180 | struct nvdimm; |
181 | struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping); | |
4d88a97a DW |
182 | int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd); |
183 | int nvdimm_init_config_data(struct nvdimm_drvdata *ndd); | |
f524bf27 DW |
184 | int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset, |
185 | void *buf, size_t len); | |
8c2f7e86 | 186 | struct nd_btt *to_nd_btt(struct device *dev); |
e1455744 DW |
187 | |
188 | struct nd_gen_sb { | |
189 | char reserved[SZ_4K - 8]; | |
190 | __le64 checksum; | |
191 | }; | |
192 | ||
193 | u64 nd_sb_checksum(struct nd_gen_sb *sb); | |
8c2f7e86 DW |
194 | #if IS_ENABLED(CONFIG_BTT) |
195 | int nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata); | |
196 | bool is_nd_btt(struct device *dev); | |
197 | struct device *nd_btt_create(struct nd_region *nd_region); | |
198 | #else | |
f6ef5a2a | 199 | static inline int nd_btt_probe(struct nd_namespace_common *ndns, void *drvdata) |
8c2f7e86 DW |
200 | { |
201 | return -ENODEV; | |
202 | } | |
203 | ||
204 | static inline bool is_nd_btt(struct device *dev) | |
205 | { | |
206 | return false; | |
207 | } | |
208 | ||
209 | static inline struct device *nd_btt_create(struct nd_region *nd_region) | |
210 | { | |
211 | return NULL; | |
212 | } | |
e1455744 | 213 | #endif |
8c2f7e86 | 214 | |
e1455744 DW |
215 | struct nd_pfn *to_nd_pfn(struct device *dev); |
216 | #if IS_ENABLED(CONFIG_NVDIMM_PFN) | |
217 | int nd_pfn_probe(struct nd_namespace_common *ndns, void *drvdata); | |
218 | bool is_nd_pfn(struct device *dev); | |
219 | struct device *nd_pfn_create(struct nd_region *nd_region); | |
220 | #else | |
221 | static inline int nd_pfn_probe(struct nd_namespace_common *ndns, void *drvdata) | |
222 | { | |
223 | return -ENODEV; | |
224 | } | |
225 | ||
226 | static inline bool is_nd_pfn(struct device *dev) | |
227 | { | |
228 | return false; | |
229 | } | |
230 | ||
231 | static inline struct device *nd_pfn_create(struct nd_region *nd_region) | |
232 | { | |
233 | return NULL; | |
234 | } | |
8c2f7e86 | 235 | #endif |
e1455744 | 236 | |
3d88002e DW |
237 | struct nd_region *to_nd_region(struct device *dev); |
238 | int nd_region_to_nstype(struct nd_region *nd_region); | |
239 | int nd_region_register_namespaces(struct nd_region *nd_region, int *err); | |
bf9bccc1 | 240 | u64 nd_region_interleave_set_cookie(struct nd_region *nd_region); |
3d88002e DW |
241 | void nvdimm_bus_lock(struct device *dev); |
242 | void nvdimm_bus_unlock(struct device *dev); | |
243 | bool is_nvdimm_bus_locked(struct device *dev); | |
58138820 | 244 | int nvdimm_revalidate_disk(struct gendisk *disk); |
bf9bccc1 DW |
245 | void nvdimm_drvdata_release(struct kref *kref); |
246 | void put_ndd(struct nvdimm_drvdata *ndd); | |
4a826c83 DW |
247 | int nd_label_reserve_dpa(struct nvdimm_drvdata *ndd); |
248 | void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res); | |
249 | struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd, | |
250 | struct nd_label_id *label_id, resource_size_t start, | |
251 | resource_size_t n); | |
8c2f7e86 DW |
252 | resource_size_t nvdimm_namespace_capacity(struct nd_namespace_common *ndns); |
253 | struct nd_namespace_common *nvdimm_namespace_common_probe(struct device *dev); | |
5212e11f VV |
254 | int nvdimm_namespace_attach_btt(struct nd_namespace_common *ndns); |
255 | int nvdimm_namespace_detach_btt(struct nd_namespace_common *ndns); | |
256 | const char *nvdimm_namespace_disk_name(struct nd_namespace_common *ndns, | |
257 | char *name); | |
047fc8a1 | 258 | int nd_blk_region_init(struct nd_region *nd_region); |
f0dc089c DW |
259 | void __nd_iostat_start(struct bio *bio, unsigned long *start); |
260 | static inline bool nd_iostat_start(struct bio *bio, unsigned long *start) | |
261 | { | |
262 | struct gendisk *disk = bio->bi_bdev->bd_disk; | |
263 | ||
264 | if (!blk_queue_io_stat(disk->queue)) | |
265 | return false; | |
266 | ||
267 | __nd_iostat_start(bio, start); | |
268 | return true; | |
269 | } | |
270 | void nd_iostat_end(struct bio *bio, unsigned long start); | |
047fc8a1 | 271 | resource_size_t nd_namespace_blk_validate(struct nd_namespace_blk *nsblk); |
6ec68954 | 272 | const u8 *nd_dev_to_uuid(struct device *dev); |
4d88a97a | 273 | #endif /* __ND_H__ */ |