libnvdimm, blk: move i/o infrastructure to nd_namespace_blk
[deliverable/linux.git] / drivers / nvdimm / pmem.c
CommitLineData
9e853f23
RZ
1/*
2 * Persistent Memory Driver
3 *
9f53f9fa 4 * Copyright (c) 2014-2015, Intel Corporation.
9e853f23
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5 * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>.
6 * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 */
17
18#include <asm/cacheflush.h>
19#include <linux/blkdev.h>
20#include <linux/hdreg.h>
21#include <linux/init.h>
22#include <linux/platform_device.h>
23#include <linux/module.h>
24#include <linux/moduleparam.h>
b95f5f43 25#include <linux/badblocks.h>
9476df7d 26#include <linux/memremap.h>
32ab0a3f 27#include <linux/vmalloc.h>
34c0fd54 28#include <linux/pfn_t.h>
9e853f23 29#include <linux/slab.h>
61031952 30#include <linux/pmem.h>
9f53f9fa 31#include <linux/nd.h>
32ab0a3f 32#include "pfn.h"
9f53f9fa 33#include "nd.h"
9e853f23
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34
35struct pmem_device {
36 struct request_queue *pmem_queue;
37 struct gendisk *pmem_disk;
38
39 /* One contiguous memory region per device */
40 phys_addr_t phys_addr;
32ab0a3f
DW
41 /* when non-zero this device is hosting a 'pfn' instance */
42 phys_addr_t data_offset;
c4544205 43 u64 pfn_flags;
61031952 44 void __pmem *virt_addr;
cfe30b87 45 /* immutable base size of the namespace */
9e853f23 46 size_t size;
cfe30b87
DW
47 /* trim size when namespace capacity has been section aligned */
48 u32 pfn_pad;
b95f5f43 49 struct badblocks bb;
9e853f23
RZ
50};
51
e10624f8
DW
52static bool is_bad_pmem(struct badblocks *bb, sector_t sector, unsigned int len)
53{
54 if (bb->count) {
55 sector_t first_bad;
56 int num_bad;
57
58 return !!badblocks_check(bb, sector, len / 512, &first_bad,
59 &num_bad);
60 }
61
62 return false;
63}
64
59e64739
DW
65static void pmem_clear_poison(struct pmem_device *pmem, phys_addr_t offset,
66 unsigned int len)
67{
68 struct device *dev = disk_to_dev(pmem->pmem_disk);
69 sector_t sector;
70 long cleared;
71
72 sector = (offset - pmem->data_offset) / 512;
73 cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len);
74
75 if (cleared > 0 && cleared / 512) {
76 dev_dbg(dev, "%s: %llx clear %ld sector%s\n",
77 __func__, (unsigned long long) sector,
78 cleared / 512, cleared / 512 > 1 ? "s" : "");
79 badblocks_clear(&pmem->bb, sector, cleared / 512);
80 }
81 invalidate_pmem(pmem->virt_addr + offset, len);
82}
83
e10624f8 84static int pmem_do_bvec(struct pmem_device *pmem, struct page *page,
9e853f23
RZ
85 unsigned int len, unsigned int off, int rw,
86 sector_t sector)
87{
b5ebc8ec 88 int rc = 0;
59e64739 89 bool bad_pmem = false;
9e853f23 90 void *mem = kmap_atomic(page);
32ab0a3f 91 phys_addr_t pmem_off = sector * 512 + pmem->data_offset;
61031952 92 void __pmem *pmem_addr = pmem->virt_addr + pmem_off;
9e853f23 93
59e64739
DW
94 if (unlikely(is_bad_pmem(&pmem->bb, sector, len)))
95 bad_pmem = true;
96
9e853f23 97 if (rw == READ) {
59e64739 98 if (unlikely(bad_pmem))
b5ebc8ec
DW
99 rc = -EIO;
100 else {
fc0c2028 101 rc = memcpy_from_pmem(mem + off, pmem_addr, len);
b5ebc8ec
DW
102 flush_dcache_page(page);
103 }
9e853f23 104 } else {
0a370d26
DW
105 /*
106 * Note that we write the data both before and after
107 * clearing poison. The write before clear poison
108 * handles situations where the latest written data is
109 * preserved and the clear poison operation simply marks
110 * the address range as valid without changing the data.
111 * In this case application software can assume that an
112 * interrupted write will either return the new good
113 * data or an error.
114 *
115 * However, if pmem_clear_poison() leaves the data in an
116 * indeterminate state we need to perform the write
117 * after clear poison.
118 */
9e853f23 119 flush_dcache_page(page);
61031952 120 memcpy_to_pmem(pmem_addr, mem + off, len);
59e64739
DW
121 if (unlikely(bad_pmem)) {
122 pmem_clear_poison(pmem, pmem_off, len);
123 memcpy_to_pmem(pmem_addr, mem + off, len);
124 }
9e853f23
RZ
125 }
126
127 kunmap_atomic(mem);
b5ebc8ec 128 return rc;
9e853f23
RZ
129}
130
dece1635 131static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio)
9e853f23 132{
e10624f8 133 int rc = 0;
f0dc089c
DW
134 bool do_acct;
135 unsigned long start;
9e853f23 136 struct bio_vec bvec;
9e853f23 137 struct bvec_iter iter;
bd842b8c 138 struct pmem_device *pmem = q->queuedata;
9e853f23 139
f0dc089c 140 do_acct = nd_iostat_start(bio, &start);
e10624f8
DW
141 bio_for_each_segment(bvec, bio, iter) {
142 rc = pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len,
143 bvec.bv_offset, bio_data_dir(bio),
144 iter.bi_sector);
145 if (rc) {
146 bio->bi_error = rc;
147 break;
148 }
149 }
f0dc089c
DW
150 if (do_acct)
151 nd_iostat_end(bio, start);
61031952
RZ
152
153 if (bio_data_dir(bio))
154 wmb_pmem();
155
4246a0b6 156 bio_endio(bio);
dece1635 157 return BLK_QC_T_NONE;
9e853f23
RZ
158}
159
160static int pmem_rw_page(struct block_device *bdev, sector_t sector,
161 struct page *page, int rw)
162{
bd842b8c 163 struct pmem_device *pmem = bdev->bd_queue->queuedata;
e10624f8 164 int rc;
9e853f23 165
09cbfeaf 166 rc = pmem_do_bvec(pmem, page, PAGE_SIZE, 0, rw, sector);
ba8fe0f8
RZ
167 if (rw & WRITE)
168 wmb_pmem();
9e853f23 169
e10624f8
DW
170 /*
171 * The ->rw_page interface is subtle and tricky. The core
172 * retries on any error, so we can only invoke page_endio() in
173 * the successful completion case. Otherwise, we'll see crashes
174 * caused by double completion.
175 */
176 if (rc == 0)
177 page_endio(page, rw & WRITE, 0);
178
179 return rc;
9e853f23
RZ
180}
181
182static long pmem_direct_access(struct block_device *bdev, sector_t sector,
34c0fd54 183 void __pmem **kaddr, pfn_t *pfn)
9e853f23 184{
bd842b8c 185 struct pmem_device *pmem = bdev->bd_queue->queuedata;
32ab0a3f 186 resource_size_t offset = sector * 512 + pmem->data_offset;
589e75d1 187
e2e05394 188 *kaddr = pmem->virt_addr + offset;
34c0fd54 189 *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags);
9e853f23 190
cfe30b87 191 return pmem->size - pmem->pfn_pad - offset;
9e853f23
RZ
192}
193
194static const struct block_device_operations pmem_fops = {
195 .owner = THIS_MODULE,
196 .rw_page = pmem_rw_page,
197 .direct_access = pmem_direct_access,
58138820 198 .revalidate_disk = nvdimm_revalidate_disk,
9e853f23
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199};
200
9f53f9fa
DW
201static struct pmem_device *pmem_alloc(struct device *dev,
202 struct resource *res, int id)
9e853f23
RZ
203{
204 struct pmem_device *pmem;
468ded03 205 struct request_queue *q;
9e853f23 206
708ab62b 207 pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL);
9e853f23 208 if (!pmem)
8c2f7e86 209 return ERR_PTR(-ENOMEM);
9e853f23
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210
211 pmem->phys_addr = res->start;
212 pmem->size = resource_size(res);
96601adb 213 if (!arch_has_wmb_pmem())
61031952 214 dev_warn(dev, "unable to guarantee persistence of writes\n");
9e853f23 215
708ab62b
CH
216 if (!devm_request_mem_region(dev, pmem->phys_addr, pmem->size,
217 dev_name(dev))) {
9f53f9fa
DW
218 dev_warn(dev, "could not reserve region [0x%pa:0x%zx]\n",
219 &pmem->phys_addr, pmem->size);
8c2f7e86 220 return ERR_PTR(-EBUSY);
9e853f23
RZ
221 }
222
468ded03
DW
223 q = blk_alloc_queue_node(GFP_KERNEL, dev_to_node(dev));
224 if (!q)
225 return ERR_PTR(-ENOMEM);
226
34c0fd54
DW
227 pmem->pfn_flags = PFN_DEV;
228 if (pmem_should_map_pages(dev)) {
4b94ffdc 229 pmem->virt_addr = (void __pmem *) devm_memremap_pages(dev, res,
5c2c2587 230 &q->q_usage_counter, NULL);
34c0fd54
DW
231 pmem->pfn_flags |= PFN_MAP;
232 } else
a639315d
DW
233 pmem->virt_addr = (void __pmem *) devm_memremap(dev,
234 pmem->phys_addr, pmem->size,
235 ARCH_MEMREMAP_PMEM);
b36f4761 236
468ded03
DW
237 if (IS_ERR(pmem->virt_addr)) {
238 blk_cleanup_queue(q);
b36f4761 239 return (void __force *) pmem->virt_addr;
468ded03 240 }
8c2f7e86 241
468ded03 242 pmem->pmem_queue = q;
8c2f7e86
DW
243 return pmem;
244}
245
246static void pmem_detach_disk(struct pmem_device *pmem)
247{
32ab0a3f
DW
248 if (!pmem->pmem_disk)
249 return;
250
8c2f7e86
DW
251 del_gendisk(pmem->pmem_disk);
252 put_disk(pmem->pmem_disk);
253 blk_cleanup_queue(pmem->pmem_queue);
254}
255
32ab0a3f
DW
256static int pmem_attach_disk(struct device *dev,
257 struct nd_namespace_common *ndns, struct pmem_device *pmem)
8c2f7e86 258{
a3901802 259 struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev);
538ea4aa 260 int nid = dev_to_node(dev);
a3901802 261 struct resource bb_res;
8c2f7e86 262 struct gendisk *disk;
9e853f23 263
9e853f23 264 blk_queue_make_request(pmem->pmem_queue, pmem_make_request);
6b47496a 265 blk_queue_physical_block_size(pmem->pmem_queue, PAGE_SIZE);
43d3fa3a 266 blk_queue_max_hw_sectors(pmem->pmem_queue, UINT_MAX);
9e853f23 267 blk_queue_bounce_limit(pmem->pmem_queue, BLK_BOUNCE_ANY);
0f51c4fa 268 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, pmem->pmem_queue);
bd842b8c 269 pmem->pmem_queue->queuedata = pmem;
9e853f23 270
538ea4aa 271 disk = alloc_disk_node(0, nid);
8c2f7e86
DW
272 if (!disk) {
273 blk_cleanup_queue(pmem->pmem_queue);
274 return -ENOMEM;
275 }
9e853f23 276
9e853f23 277 disk->fops = &pmem_fops;
9e853f23
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278 disk->queue = pmem->pmem_queue;
279 disk->flags = GENHD_FL_EXT_DEVT;
5212e11f 280 nvdimm_namespace_disk_name(ndns, disk->disk_name);
32ab0a3f 281 disk->driverfs_dev = dev;
cfe30b87
DW
282 set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset)
283 / 512);
9e853f23 284 pmem->pmem_disk = disk;
710d69cc 285 devm_exit_badblocks(dev, &pmem->bb);
b95f5f43
DW
286 if (devm_init_badblocks(dev, &pmem->bb))
287 return -ENOMEM;
a3901802
DW
288 bb_res.start = nsio->res.start + pmem->data_offset;
289 bb_res.end = nsio->res.end;
290 if (is_nd_pfn(dev)) {
291 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
292 struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
293
294 bb_res.start += __le32_to_cpu(pfn_sb->start_pad);
295 bb_res.end -= __le32_to_cpu(pfn_sb->end_trunc);
296 }
297 nvdimm_badblocks_populate(to_nd_region(dev->parent), &pmem->bb,
298 &bb_res);
57f7f317 299 disk->bb = &pmem->bb;
9e853f23 300 add_disk(disk);
58138820 301 revalidate_disk(disk);
9e853f23 302
8c2f7e86
DW
303 return 0;
304}
9e853f23 305
8c2f7e86
DW
306static int pmem_rw_bytes(struct nd_namespace_common *ndns,
307 resource_size_t offset, void *buf, size_t size, int rw)
308{
309 struct pmem_device *pmem = dev_get_drvdata(ndns->claim);
310
311 if (unlikely(offset + size > pmem->size)) {
312 dev_WARN_ONCE(&ndns->dev, 1, "request out of range\n");
313 return -EFAULT;
314 }
315
710d69cc
DW
316 if (rw == READ) {
317 unsigned int sz_align = ALIGN(size + (offset & (512 - 1)), 512);
318
319 if (unlikely(is_bad_pmem(&pmem->bb, offset / 512, sz_align)))
320 return -EIO;
fc0c2028 321 return memcpy_from_pmem(buf, pmem->virt_addr + offset, size);
710d69cc 322 } else {
61031952
RZ
323 memcpy_to_pmem(pmem->virt_addr + offset, buf, size);
324 wmb_pmem();
325 }
8c2f7e86
DW
326
327 return 0;
328}
329
32ab0a3f
DW
330static int nd_pfn_init(struct nd_pfn *nd_pfn)
331{
32ab0a3f
DW
332 struct pmem_device *pmem = dev_get_drvdata(&nd_pfn->dev);
333 struct nd_namespace_common *ndns = nd_pfn->ndns;
cfe30b87
DW
334 u32 start_pad = 0, end_trunc = 0;
335 resource_size_t start, size;
336 struct nd_namespace_io *nsio;
32ab0a3f 337 struct nd_region *nd_region;
bd032943 338 struct nd_pfn_sb *pfn_sb;
32ab0a3f
DW
339 unsigned long npfns;
340 phys_addr_t offset;
341 u64 checksum;
342 int rc;
343
bd032943 344 pfn_sb = devm_kzalloc(&nd_pfn->dev, sizeof(*pfn_sb), GFP_KERNEL);
32ab0a3f
DW
345 if (!pfn_sb)
346 return -ENOMEM;
347
348 nd_pfn->pfn_sb = pfn_sb;
349 rc = nd_pfn_validate(nd_pfn);
3fa96268
DW
350 if (rc == -ENODEV)
351 /* no info block, do init */;
352 else
32ab0a3f
DW
353 return rc;
354
32ab0a3f
DW
355 nd_region = to_nd_region(nd_pfn->dev.parent);
356 if (nd_region->ro) {
357 dev_info(&nd_pfn->dev,
358 "%s is read-only, unable to init metadata\n",
359 dev_name(&nd_region->dev));
bd032943 360 return -ENXIO;
32ab0a3f
DW
361 }
362
363 memset(pfn_sb, 0, sizeof(*pfn_sb));
cfe30b87
DW
364
365 /*
366 * Check if pmem collides with 'System RAM' when section aligned and
367 * trim it accordingly
368 */
369 nsio = to_nd_namespace_io(&ndns->dev);
370 start = PHYS_SECTION_ALIGN_DOWN(nsio->res.start);
371 size = resource_size(&nsio->res);
372 if (region_intersects(start, size, IORESOURCE_SYSTEM_RAM,
373 IORES_DESC_NONE) == REGION_MIXED) {
374
375 start = nsio->res.start;
376 start_pad = PHYS_SECTION_ALIGN_UP(start) - start;
377 }
378
379 start = nsio->res.start;
380 size = PHYS_SECTION_ALIGN_UP(start + size) - start;
381 if (region_intersects(start, size, IORESOURCE_SYSTEM_RAM,
382 IORES_DESC_NONE) == REGION_MIXED) {
383 size = resource_size(&nsio->res);
384 end_trunc = start + size - PHYS_SECTION_ALIGN_DOWN(start + size);
385 }
386
387 if (start_pad + end_trunc)
388 dev_info(&nd_pfn->dev, "%s section collision, truncate %d bytes\n",
389 dev_name(&ndns->dev), start_pad + end_trunc);
390
32ab0a3f
DW
391 /*
392 * Note, we use 64 here for the standard size of struct page,
393 * debugging options may cause it to be larger in which case the
394 * implementation will limit the pfns advertised through
395 * ->direct_access() to those that are included in the memmap.
396 */
cfe30b87
DW
397 start += start_pad;
398 npfns = (pmem->size - start_pad - end_trunc - SZ_8K) / SZ_4K;
32ab0a3f 399 if (nd_pfn->mode == PFN_MODE_PMEM)
cfe30b87
DW
400 offset = ALIGN(start + SZ_8K + 64 * npfns, nd_pfn->align)
401 - start;
32ab0a3f 402 else if (nd_pfn->mode == PFN_MODE_RAM)
cfe30b87 403 offset = ALIGN(start + SZ_8K, nd_pfn->align) - start;
32ab0a3f 404 else
bd032943 405 return -ENXIO;
32ab0a3f 406
cfe30b87
DW
407 if (offset + start_pad + end_trunc >= pmem->size) {
408 dev_err(&nd_pfn->dev, "%s unable to satisfy requested alignment\n",
409 dev_name(&ndns->dev));
bd032943 410 return -ENXIO;
cfe30b87
DW
411 }
412
413 npfns = (pmem->size - offset - start_pad - end_trunc) / SZ_4K;
32ab0a3f
DW
414 pfn_sb->mode = cpu_to_le32(nd_pfn->mode);
415 pfn_sb->dataoff = cpu_to_le64(offset);
416 pfn_sb->npfns = cpu_to_le64(npfns);
417 memcpy(pfn_sb->signature, PFN_SIG, PFN_SIG_LEN);
418 memcpy(pfn_sb->uuid, nd_pfn->uuid, 16);
a34d5e8a 419 memcpy(pfn_sb->parent_uuid, nd_dev_to_uuid(&ndns->dev), 16);
32ab0a3f 420 pfn_sb->version_major = cpu_to_le16(1);
cfe30b87
DW
421 pfn_sb->version_minor = cpu_to_le16(1);
422 pfn_sb->start_pad = cpu_to_le32(start_pad);
423 pfn_sb->end_trunc = cpu_to_le32(end_trunc);
32ab0a3f
DW
424 checksum = nd_sb_checksum((struct nd_gen_sb *) pfn_sb);
425 pfn_sb->checksum = cpu_to_le64(checksum);
426
bd032943 427 return nvdimm_write_bytes(ndns, SZ_4K, pfn_sb, sizeof(*pfn_sb));
32ab0a3f
DW
428}
429
bd032943 430static void nvdimm_namespace_detach_pfn(struct nd_pfn *nd_pfn)
32ab0a3f 431{
32ab0a3f
DW
432 struct pmem_device *pmem;
433
434 /* free pmem disk */
435 pmem = dev_get_drvdata(&nd_pfn->dev);
436 pmem_detach_disk(pmem);
32ab0a3f
DW
437}
438
d9cbe09d
DW
439/*
440 * We hotplug memory at section granularity, pad the reserved area from
441 * the previous section base to the namespace base address.
442 */
443static unsigned long init_altmap_base(resource_size_t base)
444{
45f68802 445 unsigned long base_pfn = PHYS_PFN(base);
d9cbe09d
DW
446
447 return PFN_SECTION_ALIGN_DOWN(base_pfn);
448}
449
450static unsigned long init_altmap_reserve(resource_size_t base)
451{
45f68802
DW
452 unsigned long reserve = PHYS_PFN(SZ_8K);
453 unsigned long base_pfn = PHYS_PFN(base);
d9cbe09d
DW
454
455 reserve += base_pfn - PFN_SECTION_ALIGN_DOWN(base_pfn);
456 return reserve;
457}
458
cfe30b87 459static int __nvdimm_namespace_attach_pfn(struct nd_pfn *nd_pfn)
9e853f23 460{
32ab0a3f 461 int rc;
cfe30b87
DW
462 struct resource res;
463 struct request_queue *q;
464 struct pmem_device *pmem;
465 struct vmem_altmap *altmap;
466 struct device *dev = &nd_pfn->dev;
467 struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
468 struct nd_namespace_common *ndns = nd_pfn->ndns;
469 u32 start_pad = __le32_to_cpu(pfn_sb->start_pad);
470 u32 end_trunc = __le32_to_cpu(pfn_sb->end_trunc);
471 struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev);
472 resource_size_t base = nsio->res.start + start_pad;
d2c0f041 473 struct vmem_altmap __altmap = {
cfe30b87
DW
474 .base_pfn = init_altmap_base(base),
475 .reserve = init_altmap_reserve(base),
d2c0f041 476 };
32ab0a3f 477
cfe30b87
DW
478 pmem = dev_get_drvdata(dev);
479 pmem->data_offset = le64_to_cpu(pfn_sb->dataoff);
480 pmem->pfn_pad = start_pad + end_trunc;
32ab0a3f
DW
481 nd_pfn->mode = le32_to_cpu(nd_pfn->pfn_sb->mode);
482 if (nd_pfn->mode == PFN_MODE_RAM) {
cfe30b87 483 if (pmem->data_offset < SZ_8K)
32ab0a3f
DW
484 return -EINVAL;
485 nd_pfn->npfns = le64_to_cpu(pfn_sb->npfns);
486 altmap = NULL;
d2c0f041 487 } else if (nd_pfn->mode == PFN_MODE_PMEM) {
cfe30b87 488 nd_pfn->npfns = (pmem->size - pmem->pfn_pad - pmem->data_offset)
d2c0f041
DW
489 / PAGE_SIZE;
490 if (le64_to_cpu(nd_pfn->pfn_sb->npfns) > nd_pfn->npfns)
491 dev_info(&nd_pfn->dev,
492 "number of pfns truncated from %lld to %ld\n",
493 le64_to_cpu(nd_pfn->pfn_sb->npfns),
494 nd_pfn->npfns);
495 altmap = & __altmap;
45f68802 496 altmap->free = PHYS_PFN(pmem->data_offset - SZ_8K);
d2c0f041 497 altmap->alloc = 0;
32ab0a3f
DW
498 } else {
499 rc = -ENXIO;
500 goto err;
501 }
502
503 /* establish pfn range for lookup, and switch to direct map */
5c2c2587 504 q = pmem->pmem_queue;
cfe30b87
DW
505 memcpy(&res, &nsio->res, sizeof(res));
506 res.start += start_pad;
507 res.end -= end_trunc;
a639315d 508 devm_memunmap(dev, (void __force *) pmem->virt_addr);
cfe30b87 509 pmem->virt_addr = (void __pmem *) devm_memremap_pages(dev, &res,
5c2c2587 510 &q->q_usage_counter, altmap);
34c0fd54 511 pmem->pfn_flags |= PFN_MAP;
32ab0a3f
DW
512 if (IS_ERR(pmem->virt_addr)) {
513 rc = PTR_ERR(pmem->virt_addr);
514 goto err;
515 }
516
517 /* attach pmem disk in "pfn-mode" */
32ab0a3f
DW
518 rc = pmem_attach_disk(dev, ndns, pmem);
519 if (rc)
520 goto err;
521
522 return rc;
523 err:
298f2bc5 524 nvdimm_namespace_detach_pfn(nd_pfn);
32ab0a3f 525 return rc;
cfe30b87
DW
526
527}
528
529static int nvdimm_namespace_attach_pfn(struct nd_namespace_common *ndns)
530{
531 struct nd_pfn *nd_pfn = to_nd_pfn(ndns->claim);
532 int rc;
533
534 if (!nd_pfn->uuid || !nd_pfn->ndns)
535 return -ENODEV;
536
537 rc = nd_pfn_init(nd_pfn);
538 if (rc)
539 return rc;
540 /* we need a valid pfn_sb before we can init a vmem_altmap */
541 return __nvdimm_namespace_attach_pfn(nd_pfn);
9e853f23
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542}
543
9f53f9fa 544static int nd_pmem_probe(struct device *dev)
9e853f23 545{
9f53f9fa 546 struct nd_region *nd_region = to_nd_region(dev->parent);
8c2f7e86
DW
547 struct nd_namespace_common *ndns;
548 struct nd_namespace_io *nsio;
9e853f23 549 struct pmem_device *pmem;
9e853f23 550
8c2f7e86
DW
551 ndns = nvdimm_namespace_common_probe(dev);
552 if (IS_ERR(ndns))
553 return PTR_ERR(ndns);
bf9bccc1 554
8c2f7e86 555 nsio = to_nd_namespace_io(&ndns->dev);
9f53f9fa 556 pmem = pmem_alloc(dev, &nsio->res, nd_region->id);
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557 if (IS_ERR(pmem))
558 return PTR_ERR(pmem);
559
9f53f9fa 560 dev_set_drvdata(dev, pmem);
8c2f7e86 561 ndns->rw_bytes = pmem_rw_bytes;
710d69cc
DW
562 if (devm_init_badblocks(dev, &pmem->bb))
563 return -ENOMEM;
a3901802 564 nvdimm_badblocks_populate(nd_region, &pmem->bb, &nsio->res);
708ab62b 565
468ded03
DW
566 if (is_nd_btt(dev)) {
567 /* btt allocates its own request_queue */
568 blk_cleanup_queue(pmem->pmem_queue);
569 pmem->pmem_queue = NULL;
708ab62b 570 return nvdimm_namespace_attach_btt(ndns);
468ded03 571 }
708ab62b 572
32ab0a3f
DW
573 if (is_nd_pfn(dev))
574 return nvdimm_namespace_attach_pfn(ndns);
575
e32bc729 576 if (nd_btt_probe(dev, ndns, pmem) == 0
bd032943 577 || nd_pfn_probe(dev, ndns, pmem) == 0) {
468ded03
DW
578 /*
579 * We'll come back as either btt-pmem, or pfn-pmem, so
580 * drop the queue allocation for now.
581 */
582 blk_cleanup_queue(pmem->pmem_queue);
32ab0a3f
DW
583 return -ENXIO;
584 }
585
586 return pmem_attach_disk(dev, ndns, pmem);
9e853f23
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587}
588
9f53f9fa 589static int nd_pmem_remove(struct device *dev)
9e853f23 590{
9f53f9fa 591 struct pmem_device *pmem = dev_get_drvdata(dev);
9e853f23 592
8c2f7e86 593 if (is_nd_btt(dev))
298f2bc5 594 nvdimm_namespace_detach_btt(to_nd_btt(dev));
32ab0a3f 595 else if (is_nd_pfn(dev))
298f2bc5 596 nvdimm_namespace_detach_pfn(to_nd_pfn(dev));
8c2f7e86
DW
597 else
598 pmem_detach_disk(pmem);
8c2f7e86 599
9e853f23
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600 return 0;
601}
602
71999466
DW
603static void nd_pmem_notify(struct device *dev, enum nvdimm_event event)
604{
a3901802 605 struct nd_region *nd_region = to_nd_region(dev->parent);
298f2bc5
DW
606 struct pmem_device *pmem = dev_get_drvdata(dev);
607 resource_size_t offset = 0, end_trunc = 0;
608 struct nd_namespace_common *ndns;
609 struct nd_namespace_io *nsio;
610 struct resource res;
71999466
DW
611
612 if (event != NVDIMM_REVALIDATE_POISON)
613 return;
614
298f2bc5
DW
615 if (is_nd_btt(dev)) {
616 struct nd_btt *nd_btt = to_nd_btt(dev);
617
618 ndns = nd_btt->ndns;
619 } else if (is_nd_pfn(dev)) {
a3901802
DW
620 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
621 struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb;
622
298f2bc5
DW
623 ndns = nd_pfn->ndns;
624 offset = pmem->data_offset + __le32_to_cpu(pfn_sb->start_pad);
625 end_trunc = __le32_to_cpu(pfn_sb->end_trunc);
626 } else
627 ndns = to_ndns(dev);
a3901802 628
298f2bc5
DW
629 nsio = to_nd_namespace_io(&ndns->dev);
630 res.start = nsio->res.start + offset;
631 res.end = nsio->res.end - end_trunc;
a3901802 632 nvdimm_badblocks_populate(nd_region, &pmem->bb, &res);
71999466
DW
633}
634
9f53f9fa
DW
635MODULE_ALIAS("pmem");
636MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO);
bf9bccc1 637MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM);
9f53f9fa
DW
638static struct nd_device_driver nd_pmem_driver = {
639 .probe = nd_pmem_probe,
640 .remove = nd_pmem_remove,
71999466 641 .notify = nd_pmem_notify,
9f53f9fa
DW
642 .drv = {
643 .name = "nd_pmem",
9e853f23 644 },
bf9bccc1 645 .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM,
9e853f23
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646};
647
648static int __init pmem_init(void)
649{
55155291 650 return nd_driver_register(&nd_pmem_driver);
9e853f23
RZ
651}
652module_init(pmem_init);
653
654static void pmem_exit(void)
655{
9f53f9fa 656 driver_unregister(&nd_pmem_driver.drv);
9e853f23
RZ
657}
658module_exit(pmem_exit);
659
660MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>");
661MODULE_LICENSE("GPL v2");
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