Commit | Line | Data |
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9e853f23 RZ |
1 | /* |
2 | * Persistent Memory Driver | |
3 | * | |
9f53f9fa | 4 | * Copyright (c) 2014-2015, Intel Corporation. |
9e853f23 RZ |
5 | * Copyright (c) 2015, Christoph Hellwig <hch@lst.de>. |
6 | * Copyright (c) 2015, Boaz Harrosh <boaz@plexistor.com>. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms and conditions of the GNU General Public License, | |
10 | * version 2, as published by the Free Software Foundation. | |
11 | * | |
12 | * This program is distributed in the hope it will be useful, but WITHOUT | |
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
15 | * more details. | |
16 | */ | |
17 | ||
18 | #include <asm/cacheflush.h> | |
19 | #include <linux/blkdev.h> | |
20 | #include <linux/hdreg.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/platform_device.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/moduleparam.h> | |
b95f5f43 | 25 | #include <linux/badblocks.h> |
9476df7d | 26 | #include <linux/memremap.h> |
32ab0a3f | 27 | #include <linux/vmalloc.h> |
34c0fd54 | 28 | #include <linux/pfn_t.h> |
9e853f23 | 29 | #include <linux/slab.h> |
61031952 | 30 | #include <linux/pmem.h> |
9f53f9fa | 31 | #include <linux/nd.h> |
32ab0a3f | 32 | #include "pfn.h" |
9f53f9fa | 33 | #include "nd.h" |
9e853f23 RZ |
34 | |
35 | struct pmem_device { | |
36 | struct request_queue *pmem_queue; | |
37 | struct gendisk *pmem_disk; | |
32ab0a3f | 38 | struct nd_namespace_common *ndns; |
9e853f23 RZ |
39 | |
40 | /* One contiguous memory region per device */ | |
41 | phys_addr_t phys_addr; | |
32ab0a3f DW |
42 | /* when non-zero this device is hosting a 'pfn' instance */ |
43 | phys_addr_t data_offset; | |
c4544205 | 44 | u64 pfn_flags; |
61031952 | 45 | void __pmem *virt_addr; |
cfe30b87 | 46 | /* immutable base size of the namespace */ |
9e853f23 | 47 | size_t size; |
cfe30b87 DW |
48 | /* trim size when namespace capacity has been section aligned */ |
49 | u32 pfn_pad; | |
b95f5f43 | 50 | struct badblocks bb; |
9e853f23 RZ |
51 | }; |
52 | ||
e10624f8 DW |
53 | static bool is_bad_pmem(struct badblocks *bb, sector_t sector, unsigned int len) |
54 | { | |
55 | if (bb->count) { | |
56 | sector_t first_bad; | |
57 | int num_bad; | |
58 | ||
59 | return !!badblocks_check(bb, sector, len / 512, &first_bad, | |
60 | &num_bad); | |
61 | } | |
62 | ||
63 | return false; | |
64 | } | |
65 | ||
59e64739 DW |
66 | static void pmem_clear_poison(struct pmem_device *pmem, phys_addr_t offset, |
67 | unsigned int len) | |
68 | { | |
69 | struct device *dev = disk_to_dev(pmem->pmem_disk); | |
70 | sector_t sector; | |
71 | long cleared; | |
72 | ||
73 | sector = (offset - pmem->data_offset) / 512; | |
74 | cleared = nvdimm_clear_poison(dev, pmem->phys_addr + offset, len); | |
75 | ||
76 | if (cleared > 0 && cleared / 512) { | |
77 | dev_dbg(dev, "%s: %llx clear %ld sector%s\n", | |
78 | __func__, (unsigned long long) sector, | |
79 | cleared / 512, cleared / 512 > 1 ? "s" : ""); | |
80 | badblocks_clear(&pmem->bb, sector, cleared / 512); | |
81 | } | |
82 | invalidate_pmem(pmem->virt_addr + offset, len); | |
83 | } | |
84 | ||
e10624f8 | 85 | static int pmem_do_bvec(struct pmem_device *pmem, struct page *page, |
9e853f23 RZ |
86 | unsigned int len, unsigned int off, int rw, |
87 | sector_t sector) | |
88 | { | |
b5ebc8ec | 89 | int rc = 0; |
59e64739 | 90 | bool bad_pmem = false; |
9e853f23 | 91 | void *mem = kmap_atomic(page); |
32ab0a3f | 92 | phys_addr_t pmem_off = sector * 512 + pmem->data_offset; |
61031952 | 93 | void __pmem *pmem_addr = pmem->virt_addr + pmem_off; |
9e853f23 | 94 | |
59e64739 DW |
95 | if (unlikely(is_bad_pmem(&pmem->bb, sector, len))) |
96 | bad_pmem = true; | |
97 | ||
9e853f23 | 98 | if (rw == READ) { |
59e64739 | 99 | if (unlikely(bad_pmem)) |
b5ebc8ec DW |
100 | rc = -EIO; |
101 | else { | |
fc0c2028 | 102 | rc = memcpy_from_pmem(mem + off, pmem_addr, len); |
b5ebc8ec DW |
103 | flush_dcache_page(page); |
104 | } | |
9e853f23 | 105 | } else { |
0a370d26 DW |
106 | /* |
107 | * Note that we write the data both before and after | |
108 | * clearing poison. The write before clear poison | |
109 | * handles situations where the latest written data is | |
110 | * preserved and the clear poison operation simply marks | |
111 | * the address range as valid without changing the data. | |
112 | * In this case application software can assume that an | |
113 | * interrupted write will either return the new good | |
114 | * data or an error. | |
115 | * | |
116 | * However, if pmem_clear_poison() leaves the data in an | |
117 | * indeterminate state we need to perform the write | |
118 | * after clear poison. | |
119 | */ | |
9e853f23 | 120 | flush_dcache_page(page); |
61031952 | 121 | memcpy_to_pmem(pmem_addr, mem + off, len); |
59e64739 DW |
122 | if (unlikely(bad_pmem)) { |
123 | pmem_clear_poison(pmem, pmem_off, len); | |
124 | memcpy_to_pmem(pmem_addr, mem + off, len); | |
125 | } | |
9e853f23 RZ |
126 | } |
127 | ||
128 | kunmap_atomic(mem); | |
b5ebc8ec | 129 | return rc; |
9e853f23 RZ |
130 | } |
131 | ||
dece1635 | 132 | static blk_qc_t pmem_make_request(struct request_queue *q, struct bio *bio) |
9e853f23 | 133 | { |
e10624f8 | 134 | int rc = 0; |
f0dc089c DW |
135 | bool do_acct; |
136 | unsigned long start; | |
9e853f23 | 137 | struct bio_vec bvec; |
9e853f23 | 138 | struct bvec_iter iter; |
edc870e5 DW |
139 | struct block_device *bdev = bio->bi_bdev; |
140 | struct pmem_device *pmem = bdev->bd_disk->private_data; | |
9e853f23 | 141 | |
f0dc089c | 142 | do_acct = nd_iostat_start(bio, &start); |
e10624f8 DW |
143 | bio_for_each_segment(bvec, bio, iter) { |
144 | rc = pmem_do_bvec(pmem, bvec.bv_page, bvec.bv_len, | |
145 | bvec.bv_offset, bio_data_dir(bio), | |
146 | iter.bi_sector); | |
147 | if (rc) { | |
148 | bio->bi_error = rc; | |
149 | break; | |
150 | } | |
151 | } | |
f0dc089c DW |
152 | if (do_acct) |
153 | nd_iostat_end(bio, start); | |
61031952 RZ |
154 | |
155 | if (bio_data_dir(bio)) | |
156 | wmb_pmem(); | |
157 | ||
4246a0b6 | 158 | bio_endio(bio); |
dece1635 | 159 | return BLK_QC_T_NONE; |
9e853f23 RZ |
160 | } |
161 | ||
162 | static int pmem_rw_page(struct block_device *bdev, sector_t sector, | |
163 | struct page *page, int rw) | |
164 | { | |
165 | struct pmem_device *pmem = bdev->bd_disk->private_data; | |
e10624f8 | 166 | int rc; |
9e853f23 | 167 | |
09cbfeaf | 168 | rc = pmem_do_bvec(pmem, page, PAGE_SIZE, 0, rw, sector); |
ba8fe0f8 RZ |
169 | if (rw & WRITE) |
170 | wmb_pmem(); | |
9e853f23 | 171 | |
e10624f8 DW |
172 | /* |
173 | * The ->rw_page interface is subtle and tricky. The core | |
174 | * retries on any error, so we can only invoke page_endio() in | |
175 | * the successful completion case. Otherwise, we'll see crashes | |
176 | * caused by double completion. | |
177 | */ | |
178 | if (rc == 0) | |
179 | page_endio(page, rw & WRITE, 0); | |
180 | ||
181 | return rc; | |
9e853f23 RZ |
182 | } |
183 | ||
184 | static long pmem_direct_access(struct block_device *bdev, sector_t sector, | |
34c0fd54 | 185 | void __pmem **kaddr, pfn_t *pfn) |
9e853f23 RZ |
186 | { |
187 | struct pmem_device *pmem = bdev->bd_disk->private_data; | |
32ab0a3f | 188 | resource_size_t offset = sector * 512 + pmem->data_offset; |
589e75d1 | 189 | |
e2e05394 | 190 | *kaddr = pmem->virt_addr + offset; |
34c0fd54 | 191 | *pfn = phys_to_pfn_t(pmem->phys_addr + offset, pmem->pfn_flags); |
9e853f23 | 192 | |
cfe30b87 | 193 | return pmem->size - pmem->pfn_pad - offset; |
9e853f23 RZ |
194 | } |
195 | ||
196 | static const struct block_device_operations pmem_fops = { | |
197 | .owner = THIS_MODULE, | |
198 | .rw_page = pmem_rw_page, | |
199 | .direct_access = pmem_direct_access, | |
58138820 | 200 | .revalidate_disk = nvdimm_revalidate_disk, |
9e853f23 RZ |
201 | }; |
202 | ||
9f53f9fa DW |
203 | static struct pmem_device *pmem_alloc(struct device *dev, |
204 | struct resource *res, int id) | |
9e853f23 RZ |
205 | { |
206 | struct pmem_device *pmem; | |
468ded03 | 207 | struct request_queue *q; |
9e853f23 | 208 | |
708ab62b | 209 | pmem = devm_kzalloc(dev, sizeof(*pmem), GFP_KERNEL); |
9e853f23 | 210 | if (!pmem) |
8c2f7e86 | 211 | return ERR_PTR(-ENOMEM); |
9e853f23 RZ |
212 | |
213 | pmem->phys_addr = res->start; | |
214 | pmem->size = resource_size(res); | |
96601adb | 215 | if (!arch_has_wmb_pmem()) |
61031952 | 216 | dev_warn(dev, "unable to guarantee persistence of writes\n"); |
9e853f23 | 217 | |
708ab62b CH |
218 | if (!devm_request_mem_region(dev, pmem->phys_addr, pmem->size, |
219 | dev_name(dev))) { | |
9f53f9fa DW |
220 | dev_warn(dev, "could not reserve region [0x%pa:0x%zx]\n", |
221 | &pmem->phys_addr, pmem->size); | |
8c2f7e86 | 222 | return ERR_PTR(-EBUSY); |
9e853f23 RZ |
223 | } |
224 | ||
468ded03 DW |
225 | q = blk_alloc_queue_node(GFP_KERNEL, dev_to_node(dev)); |
226 | if (!q) | |
227 | return ERR_PTR(-ENOMEM); | |
228 | ||
34c0fd54 DW |
229 | pmem->pfn_flags = PFN_DEV; |
230 | if (pmem_should_map_pages(dev)) { | |
4b94ffdc | 231 | pmem->virt_addr = (void __pmem *) devm_memremap_pages(dev, res, |
5c2c2587 | 232 | &q->q_usage_counter, NULL); |
34c0fd54 DW |
233 | pmem->pfn_flags |= PFN_MAP; |
234 | } else | |
a639315d DW |
235 | pmem->virt_addr = (void __pmem *) devm_memremap(dev, |
236 | pmem->phys_addr, pmem->size, | |
237 | ARCH_MEMREMAP_PMEM); | |
b36f4761 | 238 | |
468ded03 DW |
239 | if (IS_ERR(pmem->virt_addr)) { |
240 | blk_cleanup_queue(q); | |
b36f4761 | 241 | return (void __force *) pmem->virt_addr; |
468ded03 | 242 | } |
8c2f7e86 | 243 | |
468ded03 | 244 | pmem->pmem_queue = q; |
8c2f7e86 DW |
245 | return pmem; |
246 | } | |
247 | ||
248 | static void pmem_detach_disk(struct pmem_device *pmem) | |
249 | { | |
32ab0a3f DW |
250 | if (!pmem->pmem_disk) |
251 | return; | |
252 | ||
8c2f7e86 DW |
253 | del_gendisk(pmem->pmem_disk); |
254 | put_disk(pmem->pmem_disk); | |
255 | blk_cleanup_queue(pmem->pmem_queue); | |
256 | } | |
257 | ||
32ab0a3f DW |
258 | static int pmem_attach_disk(struct device *dev, |
259 | struct nd_namespace_common *ndns, struct pmem_device *pmem) | |
8c2f7e86 | 260 | { |
a3901802 | 261 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); |
538ea4aa | 262 | int nid = dev_to_node(dev); |
a3901802 | 263 | struct resource bb_res; |
8c2f7e86 | 264 | struct gendisk *disk; |
9e853f23 | 265 | |
9e853f23 | 266 | blk_queue_make_request(pmem->pmem_queue, pmem_make_request); |
6b47496a | 267 | blk_queue_physical_block_size(pmem->pmem_queue, PAGE_SIZE); |
43d3fa3a | 268 | blk_queue_max_hw_sectors(pmem->pmem_queue, UINT_MAX); |
9e853f23 | 269 | blk_queue_bounce_limit(pmem->pmem_queue, BLK_BOUNCE_ANY); |
0f51c4fa | 270 | queue_flag_set_unlocked(QUEUE_FLAG_NONROT, pmem->pmem_queue); |
9e853f23 | 271 | |
538ea4aa | 272 | disk = alloc_disk_node(0, nid); |
8c2f7e86 DW |
273 | if (!disk) { |
274 | blk_cleanup_queue(pmem->pmem_queue); | |
275 | return -ENOMEM; | |
276 | } | |
9e853f23 | 277 | |
9e853f23 RZ |
278 | disk->fops = &pmem_fops; |
279 | disk->private_data = pmem; | |
280 | disk->queue = pmem->pmem_queue; | |
281 | disk->flags = GENHD_FL_EXT_DEVT; | |
5212e11f | 282 | nvdimm_namespace_disk_name(ndns, disk->disk_name); |
32ab0a3f | 283 | disk->driverfs_dev = dev; |
cfe30b87 DW |
284 | set_capacity(disk, (pmem->size - pmem->pfn_pad - pmem->data_offset) |
285 | / 512); | |
9e853f23 | 286 | pmem->pmem_disk = disk; |
710d69cc | 287 | devm_exit_badblocks(dev, &pmem->bb); |
b95f5f43 DW |
288 | if (devm_init_badblocks(dev, &pmem->bb)) |
289 | return -ENOMEM; | |
a3901802 DW |
290 | bb_res.start = nsio->res.start + pmem->data_offset; |
291 | bb_res.end = nsio->res.end; | |
292 | if (is_nd_pfn(dev)) { | |
293 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); | |
294 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; | |
295 | ||
296 | bb_res.start += __le32_to_cpu(pfn_sb->start_pad); | |
297 | bb_res.end -= __le32_to_cpu(pfn_sb->end_trunc); | |
298 | } | |
299 | nvdimm_badblocks_populate(to_nd_region(dev->parent), &pmem->bb, | |
300 | &bb_res); | |
57f7f317 | 301 | disk->bb = &pmem->bb; |
9e853f23 | 302 | add_disk(disk); |
58138820 | 303 | revalidate_disk(disk); |
9e853f23 | 304 | |
8c2f7e86 DW |
305 | return 0; |
306 | } | |
9e853f23 | 307 | |
8c2f7e86 DW |
308 | static int pmem_rw_bytes(struct nd_namespace_common *ndns, |
309 | resource_size_t offset, void *buf, size_t size, int rw) | |
310 | { | |
311 | struct pmem_device *pmem = dev_get_drvdata(ndns->claim); | |
312 | ||
313 | if (unlikely(offset + size > pmem->size)) { | |
314 | dev_WARN_ONCE(&ndns->dev, 1, "request out of range\n"); | |
315 | return -EFAULT; | |
316 | } | |
317 | ||
710d69cc DW |
318 | if (rw == READ) { |
319 | unsigned int sz_align = ALIGN(size + (offset & (512 - 1)), 512); | |
320 | ||
321 | if (unlikely(is_bad_pmem(&pmem->bb, offset / 512, sz_align))) | |
322 | return -EIO; | |
fc0c2028 | 323 | return memcpy_from_pmem(buf, pmem->virt_addr + offset, size); |
710d69cc | 324 | } else { |
61031952 RZ |
325 | memcpy_to_pmem(pmem->virt_addr + offset, buf, size); |
326 | wmb_pmem(); | |
327 | } | |
8c2f7e86 DW |
328 | |
329 | return 0; | |
330 | } | |
331 | ||
32ab0a3f DW |
332 | static int nd_pfn_init(struct nd_pfn *nd_pfn) |
333 | { | |
334 | struct nd_pfn_sb *pfn_sb = kzalloc(sizeof(*pfn_sb), GFP_KERNEL); | |
335 | struct pmem_device *pmem = dev_get_drvdata(&nd_pfn->dev); | |
336 | struct nd_namespace_common *ndns = nd_pfn->ndns; | |
cfe30b87 DW |
337 | u32 start_pad = 0, end_trunc = 0; |
338 | resource_size_t start, size; | |
339 | struct nd_namespace_io *nsio; | |
32ab0a3f DW |
340 | struct nd_region *nd_region; |
341 | unsigned long npfns; | |
342 | phys_addr_t offset; | |
343 | u64 checksum; | |
344 | int rc; | |
345 | ||
346 | if (!pfn_sb) | |
347 | return -ENOMEM; | |
348 | ||
349 | nd_pfn->pfn_sb = pfn_sb; | |
350 | rc = nd_pfn_validate(nd_pfn); | |
3fa96268 DW |
351 | if (rc == -ENODEV) |
352 | /* no info block, do init */; | |
353 | else | |
32ab0a3f DW |
354 | return rc; |
355 | ||
32ab0a3f DW |
356 | nd_region = to_nd_region(nd_pfn->dev.parent); |
357 | if (nd_region->ro) { | |
358 | dev_info(&nd_pfn->dev, | |
359 | "%s is read-only, unable to init metadata\n", | |
360 | dev_name(&nd_region->dev)); | |
361 | goto err; | |
362 | } | |
363 | ||
364 | memset(pfn_sb, 0, sizeof(*pfn_sb)); | |
cfe30b87 DW |
365 | |
366 | /* | |
367 | * Check if pmem collides with 'System RAM' when section aligned and | |
368 | * trim it accordingly | |
369 | */ | |
370 | nsio = to_nd_namespace_io(&ndns->dev); | |
371 | start = PHYS_SECTION_ALIGN_DOWN(nsio->res.start); | |
372 | size = resource_size(&nsio->res); | |
373 | if (region_intersects(start, size, IORESOURCE_SYSTEM_RAM, | |
374 | IORES_DESC_NONE) == REGION_MIXED) { | |
375 | ||
376 | start = nsio->res.start; | |
377 | start_pad = PHYS_SECTION_ALIGN_UP(start) - start; | |
378 | } | |
379 | ||
380 | start = nsio->res.start; | |
381 | size = PHYS_SECTION_ALIGN_UP(start + size) - start; | |
382 | if (region_intersects(start, size, IORESOURCE_SYSTEM_RAM, | |
383 | IORES_DESC_NONE) == REGION_MIXED) { | |
384 | size = resource_size(&nsio->res); | |
385 | end_trunc = start + size - PHYS_SECTION_ALIGN_DOWN(start + size); | |
386 | } | |
387 | ||
388 | if (start_pad + end_trunc) | |
389 | dev_info(&nd_pfn->dev, "%s section collision, truncate %d bytes\n", | |
390 | dev_name(&ndns->dev), start_pad + end_trunc); | |
391 | ||
32ab0a3f DW |
392 | /* |
393 | * Note, we use 64 here for the standard size of struct page, | |
394 | * debugging options may cause it to be larger in which case the | |
395 | * implementation will limit the pfns advertised through | |
396 | * ->direct_access() to those that are included in the memmap. | |
397 | */ | |
cfe30b87 DW |
398 | start += start_pad; |
399 | npfns = (pmem->size - start_pad - end_trunc - SZ_8K) / SZ_4K; | |
32ab0a3f | 400 | if (nd_pfn->mode == PFN_MODE_PMEM) |
cfe30b87 DW |
401 | offset = ALIGN(start + SZ_8K + 64 * npfns, nd_pfn->align) |
402 | - start; | |
32ab0a3f | 403 | else if (nd_pfn->mode == PFN_MODE_RAM) |
cfe30b87 | 404 | offset = ALIGN(start + SZ_8K, nd_pfn->align) - start; |
32ab0a3f DW |
405 | else |
406 | goto err; | |
407 | ||
cfe30b87 DW |
408 | if (offset + start_pad + end_trunc >= pmem->size) { |
409 | dev_err(&nd_pfn->dev, "%s unable to satisfy requested alignment\n", | |
410 | dev_name(&ndns->dev)); | |
411 | goto err; | |
412 | } | |
413 | ||
414 | npfns = (pmem->size - offset - start_pad - end_trunc) / SZ_4K; | |
32ab0a3f DW |
415 | pfn_sb->mode = cpu_to_le32(nd_pfn->mode); |
416 | pfn_sb->dataoff = cpu_to_le64(offset); | |
417 | pfn_sb->npfns = cpu_to_le64(npfns); | |
418 | memcpy(pfn_sb->signature, PFN_SIG, PFN_SIG_LEN); | |
419 | memcpy(pfn_sb->uuid, nd_pfn->uuid, 16); | |
a34d5e8a | 420 | memcpy(pfn_sb->parent_uuid, nd_dev_to_uuid(&ndns->dev), 16); |
32ab0a3f | 421 | pfn_sb->version_major = cpu_to_le16(1); |
cfe30b87 DW |
422 | pfn_sb->version_minor = cpu_to_le16(1); |
423 | pfn_sb->start_pad = cpu_to_le32(start_pad); | |
424 | pfn_sb->end_trunc = cpu_to_le32(end_trunc); | |
32ab0a3f DW |
425 | checksum = nd_sb_checksum((struct nd_gen_sb *) pfn_sb); |
426 | pfn_sb->checksum = cpu_to_le64(checksum); | |
427 | ||
428 | rc = nvdimm_write_bytes(ndns, SZ_4K, pfn_sb, sizeof(*pfn_sb)); | |
429 | if (rc) | |
430 | goto err; | |
431 | ||
432 | return 0; | |
433 | err: | |
434 | nd_pfn->pfn_sb = NULL; | |
435 | kfree(pfn_sb); | |
436 | return -ENXIO; | |
437 | } | |
438 | ||
439 | static int nvdimm_namespace_detach_pfn(struct nd_namespace_common *ndns) | |
440 | { | |
441 | struct nd_pfn *nd_pfn = to_nd_pfn(ndns->claim); | |
442 | struct pmem_device *pmem; | |
443 | ||
444 | /* free pmem disk */ | |
445 | pmem = dev_get_drvdata(&nd_pfn->dev); | |
446 | pmem_detach_disk(pmem); | |
447 | ||
448 | /* release nd_pfn resources */ | |
449 | kfree(nd_pfn->pfn_sb); | |
450 | nd_pfn->pfn_sb = NULL; | |
451 | ||
452 | return 0; | |
453 | } | |
454 | ||
d9cbe09d DW |
455 | /* |
456 | * We hotplug memory at section granularity, pad the reserved area from | |
457 | * the previous section base to the namespace base address. | |
458 | */ | |
459 | static unsigned long init_altmap_base(resource_size_t base) | |
460 | { | |
45f68802 | 461 | unsigned long base_pfn = PHYS_PFN(base); |
d9cbe09d DW |
462 | |
463 | return PFN_SECTION_ALIGN_DOWN(base_pfn); | |
464 | } | |
465 | ||
466 | static unsigned long init_altmap_reserve(resource_size_t base) | |
467 | { | |
45f68802 DW |
468 | unsigned long reserve = PHYS_PFN(SZ_8K); |
469 | unsigned long base_pfn = PHYS_PFN(base); | |
d9cbe09d DW |
470 | |
471 | reserve += base_pfn - PFN_SECTION_ALIGN_DOWN(base_pfn); | |
472 | return reserve; | |
473 | } | |
474 | ||
cfe30b87 | 475 | static int __nvdimm_namespace_attach_pfn(struct nd_pfn *nd_pfn) |
9e853f23 | 476 | { |
32ab0a3f | 477 | int rc; |
cfe30b87 DW |
478 | struct resource res; |
479 | struct request_queue *q; | |
480 | struct pmem_device *pmem; | |
481 | struct vmem_altmap *altmap; | |
482 | struct device *dev = &nd_pfn->dev; | |
483 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; | |
484 | struct nd_namespace_common *ndns = nd_pfn->ndns; | |
485 | u32 start_pad = __le32_to_cpu(pfn_sb->start_pad); | |
486 | u32 end_trunc = __le32_to_cpu(pfn_sb->end_trunc); | |
487 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); | |
488 | resource_size_t base = nsio->res.start + start_pad; | |
d2c0f041 | 489 | struct vmem_altmap __altmap = { |
cfe30b87 DW |
490 | .base_pfn = init_altmap_base(base), |
491 | .reserve = init_altmap_reserve(base), | |
d2c0f041 | 492 | }; |
32ab0a3f | 493 | |
cfe30b87 DW |
494 | pmem = dev_get_drvdata(dev); |
495 | pmem->data_offset = le64_to_cpu(pfn_sb->dataoff); | |
496 | pmem->pfn_pad = start_pad + end_trunc; | |
32ab0a3f DW |
497 | nd_pfn->mode = le32_to_cpu(nd_pfn->pfn_sb->mode); |
498 | if (nd_pfn->mode == PFN_MODE_RAM) { | |
cfe30b87 | 499 | if (pmem->data_offset < SZ_8K) |
32ab0a3f DW |
500 | return -EINVAL; |
501 | nd_pfn->npfns = le64_to_cpu(pfn_sb->npfns); | |
502 | altmap = NULL; | |
d2c0f041 | 503 | } else if (nd_pfn->mode == PFN_MODE_PMEM) { |
cfe30b87 | 504 | nd_pfn->npfns = (pmem->size - pmem->pfn_pad - pmem->data_offset) |
d2c0f041 DW |
505 | / PAGE_SIZE; |
506 | if (le64_to_cpu(nd_pfn->pfn_sb->npfns) > nd_pfn->npfns) | |
507 | dev_info(&nd_pfn->dev, | |
508 | "number of pfns truncated from %lld to %ld\n", | |
509 | le64_to_cpu(nd_pfn->pfn_sb->npfns), | |
510 | nd_pfn->npfns); | |
511 | altmap = & __altmap; | |
45f68802 | 512 | altmap->free = PHYS_PFN(pmem->data_offset - SZ_8K); |
d2c0f041 | 513 | altmap->alloc = 0; |
32ab0a3f DW |
514 | } else { |
515 | rc = -ENXIO; | |
516 | goto err; | |
517 | } | |
518 | ||
519 | /* establish pfn range for lookup, and switch to direct map */ | |
5c2c2587 | 520 | q = pmem->pmem_queue; |
cfe30b87 DW |
521 | memcpy(&res, &nsio->res, sizeof(res)); |
522 | res.start += start_pad; | |
523 | res.end -= end_trunc; | |
a639315d | 524 | devm_memunmap(dev, (void __force *) pmem->virt_addr); |
cfe30b87 | 525 | pmem->virt_addr = (void __pmem *) devm_memremap_pages(dev, &res, |
5c2c2587 | 526 | &q->q_usage_counter, altmap); |
34c0fd54 | 527 | pmem->pfn_flags |= PFN_MAP; |
32ab0a3f DW |
528 | if (IS_ERR(pmem->virt_addr)) { |
529 | rc = PTR_ERR(pmem->virt_addr); | |
530 | goto err; | |
531 | } | |
532 | ||
533 | /* attach pmem disk in "pfn-mode" */ | |
32ab0a3f DW |
534 | rc = pmem_attach_disk(dev, ndns, pmem); |
535 | if (rc) | |
536 | goto err; | |
537 | ||
538 | return rc; | |
539 | err: | |
540 | nvdimm_namespace_detach_pfn(ndns); | |
541 | return rc; | |
cfe30b87 DW |
542 | |
543 | } | |
544 | ||
545 | static int nvdimm_namespace_attach_pfn(struct nd_namespace_common *ndns) | |
546 | { | |
547 | struct nd_pfn *nd_pfn = to_nd_pfn(ndns->claim); | |
548 | int rc; | |
549 | ||
550 | if (!nd_pfn->uuid || !nd_pfn->ndns) | |
551 | return -ENODEV; | |
552 | ||
553 | rc = nd_pfn_init(nd_pfn); | |
554 | if (rc) | |
555 | return rc; | |
556 | /* we need a valid pfn_sb before we can init a vmem_altmap */ | |
557 | return __nvdimm_namespace_attach_pfn(nd_pfn); | |
9e853f23 RZ |
558 | } |
559 | ||
9f53f9fa | 560 | static int nd_pmem_probe(struct device *dev) |
9e853f23 | 561 | { |
9f53f9fa | 562 | struct nd_region *nd_region = to_nd_region(dev->parent); |
8c2f7e86 DW |
563 | struct nd_namespace_common *ndns; |
564 | struct nd_namespace_io *nsio; | |
9e853f23 | 565 | struct pmem_device *pmem; |
9e853f23 | 566 | |
8c2f7e86 DW |
567 | ndns = nvdimm_namespace_common_probe(dev); |
568 | if (IS_ERR(ndns)) | |
569 | return PTR_ERR(ndns); | |
bf9bccc1 | 570 | |
8c2f7e86 | 571 | nsio = to_nd_namespace_io(&ndns->dev); |
9f53f9fa | 572 | pmem = pmem_alloc(dev, &nsio->res, nd_region->id); |
9e853f23 RZ |
573 | if (IS_ERR(pmem)) |
574 | return PTR_ERR(pmem); | |
575 | ||
32ab0a3f | 576 | pmem->ndns = ndns; |
9f53f9fa | 577 | dev_set_drvdata(dev, pmem); |
8c2f7e86 | 578 | ndns->rw_bytes = pmem_rw_bytes; |
710d69cc DW |
579 | if (devm_init_badblocks(dev, &pmem->bb)) |
580 | return -ENOMEM; | |
a3901802 | 581 | nvdimm_badblocks_populate(nd_region, &pmem->bb, &nsio->res); |
708ab62b | 582 | |
468ded03 DW |
583 | if (is_nd_btt(dev)) { |
584 | /* btt allocates its own request_queue */ | |
585 | blk_cleanup_queue(pmem->pmem_queue); | |
586 | pmem->pmem_queue = NULL; | |
708ab62b | 587 | return nvdimm_namespace_attach_btt(ndns); |
468ded03 | 588 | } |
708ab62b | 589 | |
32ab0a3f DW |
590 | if (is_nd_pfn(dev)) |
591 | return nvdimm_namespace_attach_pfn(ndns); | |
592 | ||
468ded03 DW |
593 | if (nd_btt_probe(ndns, pmem) == 0 || nd_pfn_probe(ndns, pmem) == 0) { |
594 | /* | |
595 | * We'll come back as either btt-pmem, or pfn-pmem, so | |
596 | * drop the queue allocation for now. | |
597 | */ | |
598 | blk_cleanup_queue(pmem->pmem_queue); | |
32ab0a3f DW |
599 | return -ENXIO; |
600 | } | |
601 | ||
602 | return pmem_attach_disk(dev, ndns, pmem); | |
9e853f23 RZ |
603 | } |
604 | ||
9f53f9fa | 605 | static int nd_pmem_remove(struct device *dev) |
9e853f23 | 606 | { |
9f53f9fa | 607 | struct pmem_device *pmem = dev_get_drvdata(dev); |
9e853f23 | 608 | |
8c2f7e86 | 609 | if (is_nd_btt(dev)) |
32ab0a3f DW |
610 | nvdimm_namespace_detach_btt(pmem->ndns); |
611 | else if (is_nd_pfn(dev)) | |
612 | nvdimm_namespace_detach_pfn(pmem->ndns); | |
8c2f7e86 DW |
613 | else |
614 | pmem_detach_disk(pmem); | |
8c2f7e86 | 615 | |
9e853f23 RZ |
616 | return 0; |
617 | } | |
618 | ||
71999466 DW |
619 | static void nd_pmem_notify(struct device *dev, enum nvdimm_event event) |
620 | { | |
621 | struct pmem_device *pmem = dev_get_drvdata(dev); | |
622 | struct nd_namespace_common *ndns = pmem->ndns; | |
a3901802 DW |
623 | struct nd_region *nd_region = to_nd_region(dev->parent); |
624 | struct nd_namespace_io *nsio = to_nd_namespace_io(&ndns->dev); | |
625 | struct resource res = { | |
626 | .start = nsio->res.start + pmem->data_offset, | |
627 | .end = nsio->res.end, | |
628 | }; | |
71999466 DW |
629 | |
630 | if (event != NVDIMM_REVALIDATE_POISON) | |
631 | return; | |
632 | ||
a3901802 DW |
633 | if (is_nd_pfn(dev)) { |
634 | struct nd_pfn *nd_pfn = to_nd_pfn(dev); | |
635 | struct nd_pfn_sb *pfn_sb = nd_pfn->pfn_sb; | |
636 | ||
637 | res.start += __le32_to_cpu(pfn_sb->start_pad); | |
638 | res.end -= __le32_to_cpu(pfn_sb->end_trunc); | |
639 | } | |
640 | ||
641 | nvdimm_badblocks_populate(nd_region, &pmem->bb, &res); | |
71999466 DW |
642 | } |
643 | ||
9f53f9fa DW |
644 | MODULE_ALIAS("pmem"); |
645 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_IO); | |
bf9bccc1 | 646 | MODULE_ALIAS_ND_DEVICE(ND_DEVICE_NAMESPACE_PMEM); |
9f53f9fa DW |
647 | static struct nd_device_driver nd_pmem_driver = { |
648 | .probe = nd_pmem_probe, | |
649 | .remove = nd_pmem_remove, | |
71999466 | 650 | .notify = nd_pmem_notify, |
9f53f9fa DW |
651 | .drv = { |
652 | .name = "nd_pmem", | |
9e853f23 | 653 | }, |
bf9bccc1 | 654 | .type = ND_DRIVER_NAMESPACE_IO | ND_DRIVER_NAMESPACE_PMEM, |
9e853f23 RZ |
655 | }; |
656 | ||
657 | static int __init pmem_init(void) | |
658 | { | |
55155291 | 659 | return nd_driver_register(&nd_pmem_driver); |
9e853f23 RZ |
660 | } |
661 | module_init(pmem_init); | |
662 | ||
663 | static void pmem_exit(void) | |
664 | { | |
9f53f9fa | 665 | driver_unregister(&nd_pmem_driver.drv); |
9e853f23 RZ |
666 | } |
667 | module_exit(pmem_exit); | |
668 | ||
669 | MODULE_AUTHOR("Ross Zwisler <ross.zwisler@linux.intel.com>"); | |
670 | MODULE_LICENSE("GPL v2"); |