Commit | Line | Data |
---|---|---|
f11bb3e2 CH |
1 | /* |
2 | * Copyright (c) 2011-2014, Intel Corporation. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | */ | |
13 | ||
14 | #ifndef _NVME_H | |
15 | #define _NVME_H | |
16 | ||
17 | #include <linux/nvme.h> | |
18 | #include <linux/pci.h> | |
19 | #include <linux/kref.h> | |
20 | #include <linux/blk-mq.h> | |
21 | ||
297465c8 CH |
22 | enum { |
23 | /* | |
24 | * Driver internal status code for commands that were cancelled due | |
25 | * to timeouts or controller shutdown. The value is negative so | |
26 | * that it a) doesn't overlap with the unsigned hardware error codes, | |
27 | * and b) can easily be tested for. | |
28 | */ | |
29 | NVME_SC_CANCELLED = -EINTR, | |
30 | }; | |
31 | ||
f11bb3e2 CH |
32 | extern unsigned char nvme_io_timeout; |
33 | #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) | |
34 | ||
21d34711 CH |
35 | extern unsigned char admin_timeout; |
36 | #define ADMIN_TIMEOUT (admin_timeout * HZ) | |
37 | ||
5fd4ce1b CH |
38 | extern unsigned char shutdown_timeout; |
39 | #define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) | |
40 | ||
ca064085 MB |
41 | enum { |
42 | NVME_NS_LBA = 0, | |
43 | NVME_NS_LIGHTNVM = 1, | |
44 | }; | |
45 | ||
f11bb3e2 | 46 | /* |
106198ed CH |
47 | * List of workarounds for devices that required behavior not specified in |
48 | * the standard. | |
f11bb3e2 | 49 | */ |
106198ed CH |
50 | enum nvme_quirks { |
51 | /* | |
52 | * Prefers I/O aligned to a stripe size specified in a vendor | |
53 | * specific Identify field. | |
54 | */ | |
55 | NVME_QUIRK_STRIPE_SIZE = (1 << 0), | |
540c801c KB |
56 | |
57 | /* | |
58 | * The controller doesn't handle Identify value others than 0 or 1 | |
59 | * correctly. | |
60 | */ | |
61 | NVME_QUIRK_IDENTIFY_CNS = (1 << 1), | |
08095e70 KB |
62 | |
63 | /* | |
64 | * The controller deterministically returns O's on reads to discarded | |
65 | * logical blocks. | |
66 | */ | |
67 | NVME_QUIRK_DISCARD_ZEROES = (1 << 2), | |
106198ed CH |
68 | }; |
69 | ||
bb8d261e CH |
70 | enum nvme_ctrl_state { |
71 | NVME_CTRL_NEW, | |
72 | NVME_CTRL_LIVE, | |
73 | NVME_CTRL_RESETTING, | |
74 | NVME_CTRL_DELETING, | |
0ff9d4e1 | 75 | NVME_CTRL_DEAD, |
bb8d261e CH |
76 | }; |
77 | ||
1c63dc66 | 78 | struct nvme_ctrl { |
bb8d261e CH |
79 | enum nvme_ctrl_state state; |
80 | spinlock_t lock; | |
1c63dc66 | 81 | const struct nvme_ctrl_ops *ops; |
f11bb3e2 | 82 | struct request_queue *admin_q; |
f11bb3e2 | 83 | struct device *dev; |
1673f1f0 | 84 | struct kref kref; |
f11bb3e2 | 85 | int instance; |
5bae7f73 | 86 | struct blk_mq_tag_set *tagset; |
f11bb3e2 | 87 | struct list_head namespaces; |
69d3b8ac | 88 | struct mutex namespaces_mutex; |
5bae7f73 | 89 | struct device *device; /* char device */ |
f3ca80fc | 90 | struct list_head node; |
075790eb | 91 | struct ida ns_ida; |
1c63dc66 | 92 | |
f11bb3e2 CH |
93 | char name[12]; |
94 | char serial[20]; | |
95 | char model[40]; | |
96 | char firmware_rev[8]; | |
76e3914a | 97 | u16 cntlid; |
5fd4ce1b CH |
98 | |
99 | u32 ctrl_config; | |
100 | ||
101 | u32 page_size; | |
f11bb3e2 CH |
102 | u32 max_hw_sectors; |
103 | u32 stripe_size; | |
f11bb3e2 | 104 | u16 oncs; |
118472ab | 105 | u16 vid; |
6bf25d16 | 106 | atomic_t abort_limit; |
f11bb3e2 CH |
107 | u8 event_limit; |
108 | u8 vwc; | |
f3ca80fc CH |
109 | u32 vs; |
110 | bool subsystem; | |
106198ed | 111 | unsigned long quirks; |
5955be21 | 112 | struct work_struct scan_work; |
f866fc42 | 113 | struct work_struct async_event_work; |
f11bb3e2 CH |
114 | }; |
115 | ||
116 | /* | |
117 | * An NVM Express namespace is equivalent to a SCSI LUN | |
118 | */ | |
119 | struct nvme_ns { | |
120 | struct list_head list; | |
121 | ||
1c63dc66 | 122 | struct nvme_ctrl *ctrl; |
f11bb3e2 CH |
123 | struct request_queue *queue; |
124 | struct gendisk *disk; | |
125 | struct kref kref; | |
075790eb | 126 | int instance; |
f11bb3e2 | 127 | |
2b9b6e86 KB |
128 | u8 eui[8]; |
129 | u8 uuid[16]; | |
130 | ||
f11bb3e2 CH |
131 | unsigned ns_id; |
132 | int lba_shift; | |
133 | u16 ms; | |
134 | bool ext; | |
135 | u8 pi_type; | |
ca064085 | 136 | int type; |
646017a6 KB |
137 | unsigned long flags; |
138 | ||
139 | #define NVME_NS_REMOVING 0 | |
69d9a99c | 140 | #define NVME_NS_DEAD 1 |
646017a6 | 141 | |
f11bb3e2 CH |
142 | u64 mode_select_num_blocks; |
143 | u32 mode_select_block_len; | |
144 | }; | |
145 | ||
1c63dc66 | 146 | struct nvme_ctrl_ops { |
e439bb12 | 147 | struct module *module; |
1c63dc66 | 148 | int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val); |
5fd4ce1b | 149 | int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val); |
7fd8930f | 150 | int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val); |
f3ca80fc | 151 | int (*reset_ctrl)(struct nvme_ctrl *ctrl); |
1673f1f0 | 152 | void (*free_ctrl)(struct nvme_ctrl *ctrl); |
5955be21 | 153 | void (*post_scan)(struct nvme_ctrl *ctrl); |
f866fc42 | 154 | void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx); |
f11bb3e2 CH |
155 | }; |
156 | ||
1c63dc66 CH |
157 | static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl) |
158 | { | |
159 | u32 val = 0; | |
160 | ||
161 | if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val)) | |
162 | return false; | |
163 | return val & NVME_CSTS_RDY; | |
164 | } | |
165 | ||
f3ca80fc CH |
166 | static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl) |
167 | { | |
168 | if (!ctrl->subsystem) | |
169 | return -ENOTTY; | |
170 | return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65); | |
171 | } | |
172 | ||
f11bb3e2 CH |
173 | static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector) |
174 | { | |
175 | return (sector >> (ns->lba_shift - 9)); | |
176 | } | |
177 | ||
58b45602 ML |
178 | static inline unsigned nvme_map_len(struct request *rq) |
179 | { | |
c2df40df | 180 | if (req_op(rq) == REQ_OP_DISCARD) |
58b45602 ML |
181 | return sizeof(struct nvme_dsm_range); |
182 | else | |
183 | return blk_rq_bytes(rq); | |
184 | } | |
185 | ||
6904242d ML |
186 | static inline void nvme_cleanup_cmd(struct request *req) |
187 | { | |
c2df40df | 188 | if (req_op(req) == REQ_OP_DISCARD) |
6904242d ML |
189 | kfree(req->completion_data); |
190 | } | |
191 | ||
15a190f7 CH |
192 | static inline int nvme_error_status(u16 status) |
193 | { | |
194 | switch (status & 0x7ff) { | |
195 | case NVME_SC_SUCCESS: | |
196 | return 0; | |
197 | case NVME_SC_CAP_EXCEEDED: | |
198 | return -ENOSPC; | |
199 | default: | |
200 | return -EIO; | |
201 | } | |
202 | } | |
203 | ||
7688faa6 CH |
204 | static inline bool nvme_req_needs_retry(struct request *req, u16 status) |
205 | { | |
206 | return !(status & NVME_SC_DNR || blk_noretry_request(req)) && | |
207 | (jiffies - req->start_time) < req->timeout; | |
208 | } | |
209 | ||
c55a2fd4 | 210 | void nvme_cancel_request(struct request *req, void *data, bool reserved); |
bb8d261e CH |
211 | bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl, |
212 | enum nvme_ctrl_state new_state); | |
5fd4ce1b CH |
213 | int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap); |
214 | int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap); | |
215 | int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl); | |
f3ca80fc CH |
216 | int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev, |
217 | const struct nvme_ctrl_ops *ops, unsigned long quirks); | |
53029b04 | 218 | void nvme_uninit_ctrl(struct nvme_ctrl *ctrl); |
1673f1f0 | 219 | void nvme_put_ctrl(struct nvme_ctrl *ctrl); |
7fd8930f | 220 | int nvme_init_identify(struct nvme_ctrl *ctrl); |
5bae7f73 | 221 | |
5955be21 | 222 | void nvme_queue_scan(struct nvme_ctrl *ctrl); |
5bae7f73 | 223 | void nvme_remove_namespaces(struct nvme_ctrl *ctrl); |
1673f1f0 | 224 | |
f866fc42 CH |
225 | #define NVME_NR_AERS 1 |
226 | void nvme_complete_async_event(struct nvme_ctrl *ctrl, | |
227 | struct nvme_completion *cqe); | |
228 | void nvme_queue_async_events(struct nvme_ctrl *ctrl); | |
229 | ||
25646264 KB |
230 | void nvme_stop_queues(struct nvme_ctrl *ctrl); |
231 | void nvme_start_queues(struct nvme_ctrl *ctrl); | |
69d9a99c | 232 | void nvme_kill_queues(struct nvme_ctrl *ctrl); |
363c9aac | 233 | |
4160982e CH |
234 | struct request *nvme_alloc_request(struct request_queue *q, |
235 | struct nvme_command *cmd, unsigned int flags); | |
7688faa6 | 236 | void nvme_requeue_req(struct request *req); |
8093f7ca ML |
237 | int nvme_setup_cmd(struct nvme_ns *ns, struct request *req, |
238 | struct nvme_command *cmd); | |
f11bb3e2 CH |
239 | int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, |
240 | void *buf, unsigned bufflen); | |
241 | int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd, | |
1cb3cce5 CH |
242 | struct nvme_completion *cqe, void *buffer, unsigned bufflen, |
243 | unsigned timeout); | |
4160982e CH |
244 | int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
245 | void __user *ubuffer, unsigned bufflen, u32 *result, | |
246 | unsigned timeout); | |
0b7f1f26 KB |
247 | int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd, |
248 | void __user *ubuffer, unsigned bufflen, | |
249 | void __user *meta_buffer, unsigned meta_len, u32 meta_seed, | |
f11bb3e2 | 250 | u32 *result, unsigned timeout); |
1c63dc66 CH |
251 | int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id); |
252 | int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid, | |
f11bb3e2 | 253 | struct nvme_id_ns **id); |
1c63dc66 CH |
254 | int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log); |
255 | int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid, | |
f11bb3e2 | 256 | dma_addr_t dma_addr, u32 *result); |
1c63dc66 | 257 | int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11, |
f11bb3e2 | 258 | dma_addr_t dma_addr, u32 *result); |
9a0be7ab | 259 | int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count); |
f11bb3e2 CH |
260 | |
261 | struct sg_io_hdr; | |
262 | ||
263 | int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr); | |
264 | int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg); | |
265 | int nvme_sg_get_version_num(int __user *ip); | |
266 | ||
c4699e70 | 267 | #ifdef CONFIG_NVM |
ca064085 MB |
268 | int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id); |
269 | int nvme_nvm_register(struct request_queue *q, char *disk_name); | |
270 | void nvme_nvm_unregister(struct request_queue *q, char *disk_name); | |
c4699e70 KB |
271 | #else |
272 | static inline int nvme_nvm_register(struct request_queue *q, char *disk_name) | |
273 | { | |
274 | return 0; | |
275 | } | |
276 | ||
277 | static inline void nvme_nvm_unregister(struct request_queue *q, char *disk_name) {}; | |
278 | ||
279 | static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id) | |
280 | { | |
281 | return 0; | |
282 | } | |
283 | #endif /* CONFIG_NVM */ | |
ca064085 | 284 | |
5bae7f73 CH |
285 | int __init nvme_core_init(void); |
286 | void nvme_core_exit(void); | |
287 | ||
f11bb3e2 | 288 | #endif /* _NVME_H */ |