Commit | Line | Data |
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6b884a8d | 1 | |
5019f0b1 | 2 | #include <linux/device.h> |
6b884a8d GL |
3 | #include <linux/io.h> |
4 | #include <linux/ioport.h> | |
dbbdee94 | 5 | #include <linux/module.h> |
6b884a8d | 6 | #include <linux/of_address.h> |
dbbdee94 GL |
7 | #include <linux/pci_regs.h> |
8 | #include <linux/string.h> | |
6b884a8d | 9 | |
dbbdee94 GL |
10 | /* Max address size we deal with */ |
11 | #define OF_MAX_ADDR_CELLS 4 | |
5d61b165 SW |
12 | #define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS) |
13 | #define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0) | |
dbbdee94 GL |
14 | |
15 | static struct of_bus *of_match_bus(struct device_node *np); | |
0131d897 SAS |
16 | static int __of_address_to_resource(struct device_node *dev, |
17 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 18 | const char *name, struct resource *r); |
dbbdee94 GL |
19 | |
20 | /* Debug utility */ | |
21 | #ifdef DEBUG | |
0131d897 | 22 | static void of_dump_addr(const char *s, const __be32 *addr, int na) |
dbbdee94 GL |
23 | { |
24 | printk(KERN_DEBUG "%s", s); | |
25 | while (na--) | |
154063a9 | 26 | printk(" %08x", be32_to_cpu(*(addr++))); |
dbbdee94 GL |
27 | printk("\n"); |
28 | } | |
29 | #else | |
0131d897 | 30 | static void of_dump_addr(const char *s, const __be32 *addr, int na) { } |
dbbdee94 GL |
31 | #endif |
32 | ||
33 | /* Callbacks for bus specific translators */ | |
34 | struct of_bus { | |
35 | const char *name; | |
36 | const char *addresses; | |
37 | int (*match)(struct device_node *parent); | |
38 | void (*count_cells)(struct device_node *child, | |
39 | int *addrc, int *sizec); | |
47b1e689 | 40 | u64 (*map)(__be32 *addr, const __be32 *range, |
dbbdee94 | 41 | int na, int ns, int pna); |
47b1e689 | 42 | int (*translate)(__be32 *addr, u64 offset, int na); |
0131d897 | 43 | unsigned int (*get_flags)(const __be32 *addr); |
dbbdee94 GL |
44 | }; |
45 | ||
46 | /* | |
47 | * Default translator (generic bus) | |
48 | */ | |
49 | ||
50 | static void of_bus_default_count_cells(struct device_node *dev, | |
51 | int *addrc, int *sizec) | |
52 | { | |
53 | if (addrc) | |
54 | *addrc = of_n_addr_cells(dev); | |
55 | if (sizec) | |
56 | *sizec = of_n_size_cells(dev); | |
57 | } | |
58 | ||
47b1e689 | 59 | static u64 of_bus_default_map(__be32 *addr, const __be32 *range, |
dbbdee94 GL |
60 | int na, int ns, int pna) |
61 | { | |
62 | u64 cp, s, da; | |
63 | ||
64 | cp = of_read_number(range, na); | |
65 | s = of_read_number(range + na + pna, ns); | |
66 | da = of_read_number(addr, na); | |
67 | ||
68 | pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n", | |
69 | (unsigned long long)cp, (unsigned long long)s, | |
70 | (unsigned long long)da); | |
71 | ||
e38c0a1f TR |
72 | /* |
73 | * If the number of address cells is larger than 2 we assume the | |
74 | * mapping doesn't specify a physical address. Rather, the address | |
75 | * specifies an identifier that must match exactly. | |
76 | */ | |
77 | if (na > 2 && memcmp(range, addr, na * 4) != 0) | |
78 | return OF_BAD_ADDR; | |
79 | ||
dbbdee94 GL |
80 | if (da < cp || da >= (cp + s)) |
81 | return OF_BAD_ADDR; | |
82 | return da - cp; | |
83 | } | |
84 | ||
47b1e689 | 85 | static int of_bus_default_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
86 | { |
87 | u64 a = of_read_number(addr, na); | |
88 | memset(addr, 0, na * 4); | |
89 | a += offset; | |
90 | if (na > 1) | |
154063a9 GL |
91 | addr[na - 2] = cpu_to_be32(a >> 32); |
92 | addr[na - 1] = cpu_to_be32(a & 0xffffffffu); | |
dbbdee94 GL |
93 | |
94 | return 0; | |
95 | } | |
96 | ||
0131d897 | 97 | static unsigned int of_bus_default_get_flags(const __be32 *addr) |
dbbdee94 GL |
98 | { |
99 | return IORESOURCE_MEM; | |
100 | } | |
101 | ||
102 | #ifdef CONFIG_PCI | |
103 | /* | |
104 | * PCI bus specific translator | |
105 | */ | |
106 | ||
107 | static int of_bus_pci_match(struct device_node *np) | |
108 | { | |
109 | /* "vci" is for the /chaos bridge on 1st-gen PCI powermacs */ | |
110 | return !strcmp(np->type, "pci") || !strcmp(np->type, "vci"); | |
111 | } | |
112 | ||
113 | static void of_bus_pci_count_cells(struct device_node *np, | |
114 | int *addrc, int *sizec) | |
115 | { | |
116 | if (addrc) | |
117 | *addrc = 3; | |
118 | if (sizec) | |
119 | *sizec = 2; | |
120 | } | |
121 | ||
0131d897 | 122 | static unsigned int of_bus_pci_get_flags(const __be32 *addr) |
dbbdee94 GL |
123 | { |
124 | unsigned int flags = 0; | |
0131d897 | 125 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
126 | |
127 | switch((w >> 24) & 0x03) { | |
128 | case 0x01: | |
129 | flags |= IORESOURCE_IO; | |
130 | break; | |
131 | case 0x02: /* 32 bits */ | |
132 | case 0x03: /* 64 bits */ | |
133 | flags |= IORESOURCE_MEM; | |
134 | break; | |
135 | } | |
136 | if (w & 0x40000000) | |
137 | flags |= IORESOURCE_PREFETCH; | |
138 | return flags; | |
139 | } | |
140 | ||
47b1e689 | 141 | static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 142 | int pna) |
dbbdee94 GL |
143 | { |
144 | u64 cp, s, da; | |
145 | unsigned int af, rf; | |
146 | ||
147 | af = of_bus_pci_get_flags(addr); | |
148 | rf = of_bus_pci_get_flags(range); | |
149 | ||
150 | /* Check address type match */ | |
151 | if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO)) | |
152 | return OF_BAD_ADDR; | |
153 | ||
154 | /* Read address values, skipping high cell */ | |
155 | cp = of_read_number(range + 1, na - 1); | |
156 | s = of_read_number(range + na + pna, ns); | |
157 | da = of_read_number(addr + 1, na - 1); | |
158 | ||
159 | pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n", | |
160 | (unsigned long long)cp, (unsigned long long)s, | |
161 | (unsigned long long)da); | |
162 | ||
163 | if (da < cp || da >= (cp + s)) | |
164 | return OF_BAD_ADDR; | |
165 | return da - cp; | |
166 | } | |
167 | ||
47b1e689 | 168 | static int of_bus_pci_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
169 | { |
170 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
171 | } | |
172 | ||
0131d897 | 173 | const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size, |
dbbdee94 GL |
174 | unsigned int *flags) |
175 | { | |
a9fadeef | 176 | const __be32 *prop; |
dbbdee94 GL |
177 | unsigned int psize; |
178 | struct device_node *parent; | |
179 | struct of_bus *bus; | |
180 | int onesize, i, na, ns; | |
181 | ||
182 | /* Get parent & match bus type */ | |
183 | parent = of_get_parent(dev); | |
184 | if (parent == NULL) | |
185 | return NULL; | |
186 | bus = of_match_bus(parent); | |
187 | if (strcmp(bus->name, "pci")) { | |
188 | of_node_put(parent); | |
189 | return NULL; | |
190 | } | |
191 | bus->count_cells(dev, &na, &ns); | |
192 | of_node_put(parent); | |
5d61b165 | 193 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
194 | return NULL; |
195 | ||
196 | /* Get "reg" or "assigned-addresses" property */ | |
197 | prop = of_get_property(dev, bus->addresses, &psize); | |
198 | if (prop == NULL) | |
199 | return NULL; | |
200 | psize /= 4; | |
201 | ||
202 | onesize = na + ns; | |
154063a9 GL |
203 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) { |
204 | u32 val = be32_to_cpu(prop[0]); | |
205 | if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) { | |
dbbdee94 GL |
206 | if (size) |
207 | *size = of_read_number(prop + na, ns); | |
208 | if (flags) | |
209 | *flags = bus->get_flags(prop); | |
210 | return prop; | |
211 | } | |
154063a9 | 212 | } |
dbbdee94 GL |
213 | return NULL; |
214 | } | |
215 | EXPORT_SYMBOL(of_get_pci_address); | |
216 | ||
217 | int of_pci_address_to_resource(struct device_node *dev, int bar, | |
218 | struct resource *r) | |
219 | { | |
0131d897 | 220 | const __be32 *addrp; |
dbbdee94 GL |
221 | u64 size; |
222 | unsigned int flags; | |
223 | ||
224 | addrp = of_get_pci_address(dev, bar, &size, &flags); | |
225 | if (addrp == NULL) | |
226 | return -EINVAL; | |
35f3da32 | 227 | return __of_address_to_resource(dev, addrp, size, flags, NULL, r); |
dbbdee94 GL |
228 | } |
229 | EXPORT_SYMBOL_GPL(of_pci_address_to_resource); | |
230 | #endif /* CONFIG_PCI */ | |
231 | ||
232 | /* | |
233 | * ISA bus specific translator | |
234 | */ | |
235 | ||
236 | static int of_bus_isa_match(struct device_node *np) | |
237 | { | |
238 | return !strcmp(np->name, "isa"); | |
239 | } | |
240 | ||
241 | static void of_bus_isa_count_cells(struct device_node *child, | |
242 | int *addrc, int *sizec) | |
243 | { | |
244 | if (addrc) | |
245 | *addrc = 2; | |
246 | if (sizec) | |
247 | *sizec = 1; | |
248 | } | |
249 | ||
47b1e689 | 250 | static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns, |
0131d897 | 251 | int pna) |
dbbdee94 GL |
252 | { |
253 | u64 cp, s, da; | |
254 | ||
255 | /* Check address type match */ | |
0131d897 | 256 | if ((addr[0] ^ range[0]) & cpu_to_be32(1)) |
dbbdee94 GL |
257 | return OF_BAD_ADDR; |
258 | ||
259 | /* Read address values, skipping high cell */ | |
260 | cp = of_read_number(range + 1, na - 1); | |
261 | s = of_read_number(range + na + pna, ns); | |
262 | da = of_read_number(addr + 1, na - 1); | |
263 | ||
264 | pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n", | |
265 | (unsigned long long)cp, (unsigned long long)s, | |
266 | (unsigned long long)da); | |
267 | ||
268 | if (da < cp || da >= (cp + s)) | |
269 | return OF_BAD_ADDR; | |
270 | return da - cp; | |
271 | } | |
272 | ||
47b1e689 | 273 | static int of_bus_isa_translate(__be32 *addr, u64 offset, int na) |
dbbdee94 GL |
274 | { |
275 | return of_bus_default_translate(addr + 1, offset, na - 1); | |
276 | } | |
277 | ||
0131d897 | 278 | static unsigned int of_bus_isa_get_flags(const __be32 *addr) |
dbbdee94 GL |
279 | { |
280 | unsigned int flags = 0; | |
0131d897 | 281 | u32 w = be32_to_cpup(addr); |
dbbdee94 GL |
282 | |
283 | if (w & 1) | |
284 | flags |= IORESOURCE_IO; | |
285 | else | |
286 | flags |= IORESOURCE_MEM; | |
287 | return flags; | |
288 | } | |
289 | ||
290 | /* | |
291 | * Array of bus specific translators | |
292 | */ | |
293 | ||
294 | static struct of_bus of_busses[] = { | |
295 | #ifdef CONFIG_PCI | |
296 | /* PCI */ | |
297 | { | |
298 | .name = "pci", | |
299 | .addresses = "assigned-addresses", | |
300 | .match = of_bus_pci_match, | |
301 | .count_cells = of_bus_pci_count_cells, | |
302 | .map = of_bus_pci_map, | |
303 | .translate = of_bus_pci_translate, | |
304 | .get_flags = of_bus_pci_get_flags, | |
305 | }, | |
306 | #endif /* CONFIG_PCI */ | |
307 | /* ISA */ | |
308 | { | |
309 | .name = "isa", | |
310 | .addresses = "reg", | |
311 | .match = of_bus_isa_match, | |
312 | .count_cells = of_bus_isa_count_cells, | |
313 | .map = of_bus_isa_map, | |
314 | .translate = of_bus_isa_translate, | |
315 | .get_flags = of_bus_isa_get_flags, | |
316 | }, | |
317 | /* Default */ | |
318 | { | |
319 | .name = "default", | |
320 | .addresses = "reg", | |
321 | .match = NULL, | |
322 | .count_cells = of_bus_default_count_cells, | |
323 | .map = of_bus_default_map, | |
324 | .translate = of_bus_default_translate, | |
325 | .get_flags = of_bus_default_get_flags, | |
326 | }, | |
327 | }; | |
328 | ||
329 | static struct of_bus *of_match_bus(struct device_node *np) | |
330 | { | |
331 | int i; | |
332 | ||
333 | for (i = 0; i < ARRAY_SIZE(of_busses); i++) | |
334 | if (!of_busses[i].match || of_busses[i].match(np)) | |
335 | return &of_busses[i]; | |
336 | BUG(); | |
337 | return NULL; | |
338 | } | |
339 | ||
340 | static int of_translate_one(struct device_node *parent, struct of_bus *bus, | |
47b1e689 | 341 | struct of_bus *pbus, __be32 *addr, |
dbbdee94 GL |
342 | int na, int ns, int pna, const char *rprop) |
343 | { | |
0131d897 | 344 | const __be32 *ranges; |
dbbdee94 GL |
345 | unsigned int rlen; |
346 | int rone; | |
347 | u64 offset = OF_BAD_ADDR; | |
348 | ||
349 | /* Normally, an absence of a "ranges" property means we are | |
350 | * crossing a non-translatable boundary, and thus the addresses | |
351 | * below the current not cannot be converted to CPU physical ones. | |
352 | * Unfortunately, while this is very clear in the spec, it's not | |
353 | * what Apple understood, and they do have things like /uni-n or | |
354 | * /ht nodes with no "ranges" property and a lot of perfectly | |
355 | * useable mapped devices below them. Thus we treat the absence of | |
356 | * "ranges" as equivalent to an empty "ranges" property which means | |
357 | * a 1:1 translation at that level. It's up to the caller not to try | |
358 | * to translate addresses that aren't supposed to be translated in | |
359 | * the first place. --BenH. | |
3930f294 GL |
360 | * |
361 | * As far as we know, this damage only exists on Apple machines, so | |
362 | * This code is only enabled on powerpc. --gcl | |
dbbdee94 GL |
363 | */ |
364 | ranges = of_get_property(parent, rprop, &rlen); | |
3930f294 GL |
365 | #if !defined(CONFIG_PPC) |
366 | if (ranges == NULL) { | |
367 | pr_err("OF: no ranges; cannot translate\n"); | |
368 | return 1; | |
369 | } | |
370 | #endif /* !defined(CONFIG_PPC) */ | |
dbbdee94 GL |
371 | if (ranges == NULL || rlen == 0) { |
372 | offset = of_read_number(addr, na); | |
373 | memset(addr, 0, pna * 4); | |
3930f294 | 374 | pr_debug("OF: empty ranges; 1:1 translation\n"); |
dbbdee94 GL |
375 | goto finish; |
376 | } | |
377 | ||
378 | pr_debug("OF: walking ranges...\n"); | |
379 | ||
380 | /* Now walk through the ranges */ | |
381 | rlen /= 4; | |
382 | rone = na + pna + ns; | |
383 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
384 | offset = bus->map(addr, ranges, na, ns, pna); | |
385 | if (offset != OF_BAD_ADDR) | |
386 | break; | |
387 | } | |
388 | if (offset == OF_BAD_ADDR) { | |
389 | pr_debug("OF: not found !\n"); | |
390 | return 1; | |
391 | } | |
392 | memcpy(addr, ranges + na, 4 * pna); | |
393 | ||
394 | finish: | |
395 | of_dump_addr("OF: parent translation for:", addr, pna); | |
396 | pr_debug("OF: with offset: %llx\n", (unsigned long long)offset); | |
397 | ||
398 | /* Translate it into parent bus space */ | |
399 | return pbus->translate(addr, offset, pna); | |
400 | } | |
401 | ||
402 | /* | |
403 | * Translate an address from the device-tree into a CPU physical address, | |
404 | * this walks up the tree and applies the various bus mappings on the | |
405 | * way. | |
406 | * | |
407 | * Note: We consider that crossing any level with #size-cells == 0 to mean | |
408 | * that translation is impossible (that is we are not dealing with a value | |
409 | * that can be mapped to a cpu physical address). This is not really specified | |
410 | * that way, but this is traditionally the way IBM at least do things | |
411 | */ | |
47b1e689 KP |
412 | static u64 __of_translate_address(struct device_node *dev, |
413 | const __be32 *in_addr, const char *rprop) | |
dbbdee94 GL |
414 | { |
415 | struct device_node *parent = NULL; | |
416 | struct of_bus *bus, *pbus; | |
47b1e689 | 417 | __be32 addr[OF_MAX_ADDR_CELLS]; |
dbbdee94 GL |
418 | int na, ns, pna, pns; |
419 | u64 result = OF_BAD_ADDR; | |
420 | ||
421 | pr_debug("OF: ** translation for device %s **\n", dev->full_name); | |
422 | ||
423 | /* Increase refcount at current level */ | |
424 | of_node_get(dev); | |
425 | ||
426 | /* Get parent & match bus type */ | |
427 | parent = of_get_parent(dev); | |
428 | if (parent == NULL) | |
429 | goto bail; | |
430 | bus = of_match_bus(parent); | |
431 | ||
59f5ca48 | 432 | /* Count address cells & copy address locally */ |
dbbdee94 GL |
433 | bus->count_cells(dev, &na, &ns); |
434 | if (!OF_CHECK_COUNTS(na, ns)) { | |
435 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
436 | dev->full_name); | |
437 | goto bail; | |
438 | } | |
439 | memcpy(addr, in_addr, na * 4); | |
440 | ||
441 | pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n", | |
442 | bus->name, na, ns, parent->full_name); | |
443 | of_dump_addr("OF: translating address:", addr, na); | |
444 | ||
445 | /* Translate */ | |
446 | for (;;) { | |
447 | /* Switch to parent bus */ | |
448 | of_node_put(dev); | |
449 | dev = parent; | |
450 | parent = of_get_parent(dev); | |
451 | ||
452 | /* If root, we have finished */ | |
453 | if (parent == NULL) { | |
454 | pr_debug("OF: reached root node\n"); | |
455 | result = of_read_number(addr, na); | |
456 | break; | |
457 | } | |
458 | ||
459 | /* Get new parent bus and counts */ | |
460 | pbus = of_match_bus(parent); | |
461 | pbus->count_cells(dev, &pna, &pns); | |
462 | if (!OF_CHECK_COUNTS(pna, pns)) { | |
463 | printk(KERN_ERR "prom_parse: Bad cell count for %s\n", | |
464 | dev->full_name); | |
465 | break; | |
466 | } | |
467 | ||
468 | pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n", | |
469 | pbus->name, pna, pns, parent->full_name); | |
470 | ||
471 | /* Apply bus translation */ | |
472 | if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop)) | |
473 | break; | |
474 | ||
475 | /* Complete the move up one level */ | |
476 | na = pna; | |
477 | ns = pns; | |
478 | bus = pbus; | |
479 | ||
480 | of_dump_addr("OF: one level translation:", addr, na); | |
481 | } | |
482 | bail: | |
483 | of_node_put(parent); | |
484 | of_node_put(dev); | |
485 | ||
486 | return result; | |
487 | } | |
488 | ||
0131d897 | 489 | u64 of_translate_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
490 | { |
491 | return __of_translate_address(dev, in_addr, "ranges"); | |
492 | } | |
493 | EXPORT_SYMBOL(of_translate_address); | |
494 | ||
0131d897 | 495 | u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr) |
dbbdee94 GL |
496 | { |
497 | return __of_translate_address(dev, in_addr, "dma-ranges"); | |
498 | } | |
499 | EXPORT_SYMBOL(of_translate_dma_address); | |
500 | ||
5d61b165 SW |
501 | bool of_can_translate_address(struct device_node *dev) |
502 | { | |
503 | struct device_node *parent; | |
504 | struct of_bus *bus; | |
505 | int na, ns; | |
506 | ||
507 | parent = of_get_parent(dev); | |
508 | if (parent == NULL) | |
509 | return false; | |
510 | ||
511 | bus = of_match_bus(parent); | |
512 | bus->count_cells(dev, &na, &ns); | |
513 | ||
514 | of_node_put(parent); | |
515 | ||
516 | return OF_CHECK_COUNTS(na, ns); | |
517 | } | |
518 | EXPORT_SYMBOL(of_can_translate_address); | |
519 | ||
0131d897 | 520 | const __be32 *of_get_address(struct device_node *dev, int index, u64 *size, |
dbbdee94 GL |
521 | unsigned int *flags) |
522 | { | |
0131d897 | 523 | const __be32 *prop; |
dbbdee94 GL |
524 | unsigned int psize; |
525 | struct device_node *parent; | |
526 | struct of_bus *bus; | |
527 | int onesize, i, na, ns; | |
528 | ||
529 | /* Get parent & match bus type */ | |
530 | parent = of_get_parent(dev); | |
531 | if (parent == NULL) | |
532 | return NULL; | |
533 | bus = of_match_bus(parent); | |
534 | bus->count_cells(dev, &na, &ns); | |
535 | of_node_put(parent); | |
5d61b165 | 536 | if (!OF_CHECK_ADDR_COUNT(na)) |
dbbdee94 GL |
537 | return NULL; |
538 | ||
539 | /* Get "reg" or "assigned-addresses" property */ | |
540 | prop = of_get_property(dev, bus->addresses, &psize); | |
541 | if (prop == NULL) | |
542 | return NULL; | |
543 | psize /= 4; | |
544 | ||
545 | onesize = na + ns; | |
546 | for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) | |
547 | if (i == index) { | |
548 | if (size) | |
549 | *size = of_read_number(prop + na, ns); | |
550 | if (flags) | |
551 | *flags = bus->get_flags(prop); | |
552 | return prop; | |
553 | } | |
554 | return NULL; | |
555 | } | |
556 | EXPORT_SYMBOL(of_get_address); | |
557 | ||
0131d897 SAS |
558 | static int __of_address_to_resource(struct device_node *dev, |
559 | const __be32 *addrp, u64 size, unsigned int flags, | |
35f3da32 | 560 | const char *name, struct resource *r) |
1f5bef30 GL |
561 | { |
562 | u64 taddr; | |
563 | ||
564 | if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0) | |
565 | return -EINVAL; | |
566 | taddr = of_translate_address(dev, addrp); | |
567 | if (taddr == OF_BAD_ADDR) | |
568 | return -EINVAL; | |
569 | memset(r, 0, sizeof(struct resource)); | |
570 | if (flags & IORESOURCE_IO) { | |
571 | unsigned long port; | |
572 | port = pci_address_to_pio(taddr); | |
573 | if (port == (unsigned long)-1) | |
574 | return -EINVAL; | |
575 | r->start = port; | |
576 | r->end = port + size - 1; | |
577 | } else { | |
578 | r->start = taddr; | |
579 | r->end = taddr + size - 1; | |
580 | } | |
581 | r->flags = flags; | |
35f3da32 BC |
582 | r->name = name ? name : dev->full_name; |
583 | ||
1f5bef30 GL |
584 | return 0; |
585 | } | |
586 | ||
587 | /** | |
588 | * of_address_to_resource - Translate device tree address and return as resource | |
589 | * | |
590 | * Note that if your address is a PIO address, the conversion will fail if | |
591 | * the physical address can't be internally converted to an IO token with | |
592 | * pci_address_to_pio(), that is because it's either called to early or it | |
593 | * can't be matched to any host bridge IO space | |
594 | */ | |
595 | int of_address_to_resource(struct device_node *dev, int index, | |
596 | struct resource *r) | |
597 | { | |
0131d897 | 598 | const __be32 *addrp; |
1f5bef30 GL |
599 | u64 size; |
600 | unsigned int flags; | |
35f3da32 | 601 | const char *name = NULL; |
1f5bef30 GL |
602 | |
603 | addrp = of_get_address(dev, index, &size, &flags); | |
604 | if (addrp == NULL) | |
605 | return -EINVAL; | |
35f3da32 BC |
606 | |
607 | /* Get optional "reg-names" property to add a name to a resource */ | |
608 | of_property_read_string_index(dev, "reg-names", index, &name); | |
609 | ||
610 | return __of_address_to_resource(dev, addrp, size, flags, name, r); | |
1f5bef30 GL |
611 | } |
612 | EXPORT_SYMBOL_GPL(of_address_to_resource); | |
613 | ||
90e33f62 GL |
614 | struct device_node *of_find_matching_node_by_address(struct device_node *from, |
615 | const struct of_device_id *matches, | |
616 | u64 base_address) | |
617 | { | |
618 | struct device_node *dn = of_find_matching_node(from, matches); | |
619 | struct resource res; | |
620 | ||
621 | while (dn) { | |
622 | if (of_address_to_resource(dn, 0, &res)) | |
623 | continue; | |
624 | if (res.start == base_address) | |
625 | return dn; | |
626 | dn = of_find_matching_node(dn, matches); | |
627 | } | |
628 | ||
629 | return NULL; | |
630 | } | |
631 | ||
1f5bef30 | 632 | |
6b884a8d GL |
633 | /** |
634 | * of_iomap - Maps the memory mapped IO for a given device_node | |
635 | * @device: the device whose io range will be mapped | |
636 | * @index: index of the io range | |
637 | * | |
638 | * Returns a pointer to the mapped memory | |
639 | */ | |
640 | void __iomem *of_iomap(struct device_node *np, int index) | |
641 | { | |
642 | struct resource res; | |
643 | ||
644 | if (of_address_to_resource(np, index, &res)) | |
645 | return NULL; | |
646 | ||
28c1b6d6 | 647 | return ioremap(res.start, resource_size(&res)); |
6b884a8d GL |
648 | } |
649 | EXPORT_SYMBOL(of_iomap); |