[deliverable/linux.git] / drivers / parisc / superio.c

/*      National Semiconductor NS87560UBD Super I/O controller used in
 *      HP [BCJ]x000 workstations.
 *
 *      This chip is a horrid piece of engineering, and National
 *      denies any knowledge of its existence. Thus no datasheet is
 *      available off www.national.com. 
 *
 *	(C) Copyright 2000 Linuxcare, Inc.
 * 	(C) Copyright 2000 Linuxcare Canada, Inc.
 *	(C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
 * 	(C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
 *      (C) Copyright 2001 John Marvin <jsm fc hp com>
 *      (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
 *	(C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
 *
 *	This program is free software; you can redistribute it and/or
 *	modify it under the terms of the GNU General Public License as
 *	published by the Free Software Foundation; either version 2 of
 *	the License, or (at your option) any later version.  
 *
 *	The initial version of this is by Martin Peterson.  Alex deVries
 *	has spent a bit of time trying to coax it into working.
 *
 *      Major changes to get basic interrupt infrastructure working to
 *      hopefully be able to support all SuperIO devices. Currently
 *      works with serial. -- John Marvin <jsm@fc.hp.com>
 *
 *	Converted superio_init() to be a PCI_FIXUP_FINAL callee.
 *         -- Kyle McMartin <kyle@parisc-linux.org>
 */


/* NOTES:
 * 
 * Function 0 is an IDE controller. It is identical to a PC87415 IDE
 * controller (and identifies itself as such).
 *
 * Function 1 is a "Legacy I/O" controller. Under this function is a
 * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
 * all the functionality in hardware, but the following is available:
 *
 *      Two 16550A compatible serial controllers
 *      An IEEE 1284 compatible parallel port
 *      A floppy disk controller
 *
 * Function 2 is a USB controller.
 *
 * We must be incredibly careful during initialization.  Since all
 * interrupts are routed through function 1 (which is not allowed by
 * the PCI spec), we need to program the PICs on the legacy I/O port
 * *before* we attempt to set up IDE and USB.  @#$!&
 *
 * According to HP, devices are only enabled by firmware if they have
 * a physical device connected.
 *
 * Configuration register bits:
 *     0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
 *     0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
 *
 */

#include <linux/errno.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/serial.h>
#include <linux/pci.h>
#include <linux/parport.h>
#include <linux/parport_pc.h>
#include <linux/termios.h>
#include <linux/tty.h>
#include <linux/serial_core.h>
#include <linux/delay.h>

#include <asm/io.h>
#include <asm/hardware.h>
#include <asm/superio.h>

static struct superio_device sio_dev;


#undef DEBUG_SUPERIO_INIT

#ifdef DEBUG_SUPERIO_INIT
#define DBG_INIT(x...)  printk(x)
#else
#define DBG_INIT(x...)
#endif

static irqreturn_t
superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
{
	u8 results;
	u8 local_irq;

	/* Poll the 8259 to see if there's an interrupt. */
	outb (OCW3_POLL,IC_PIC1+0);

	results = inb(IC_PIC1+0);

	/*
	 * Bit    7:	1 = active Interrupt; 0 = no Interrupt pending
	 * Bits 6-3:	zero
	 * Bits 2-0:	highest priority, active requesting interrupt ID (0-7)
	 */
	if ((results & 0x80) == 0) {
		/* I suspect "spurious" interrupts are from unmasking an IRQ.
		 * We don't know if an interrupt was/is pending and thus
		 * just call the handler for that IRQ as if it were pending.
		 */
		return IRQ_NONE;
	}

	/* Check to see which device is interrupting */
	local_irq = results & 0x0f;

	if (local_irq == 2 || local_irq > 7) {
		printk(KERN_ERR "SuperIO: slave interrupted!\n");
		return IRQ_HANDLED;
	}

	if (local_irq == 7) {

		/* Could be spurious. Check in service bits */

		outb(OCW3_ISR,IC_PIC1+0);
		results = inb(IC_PIC1+0);
		if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
			printk(KERN_WARNING "SuperIO: spurious interrupt!\n");
			return IRQ_HANDLED;
		}
	}

	/* Call the appropriate device's interrupt */
	__do_IRQ(local_irq, regs);

	/* set EOI - forces a new interrupt if a lower priority device
	 * still needs service.
	 */
	outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
	return IRQ_HANDLED;
}

/* Initialize Super I/O device */
static void
superio_init(struct pci_dev *pcidev)
{
	struct superio_device *sio = &sio_dev;
	struct pci_dev *pdev = sio->lio_pdev;
	u16 word;

        if (sio->suckyio_irq_enabled)                                       
		return;

	if (!pdev) BUG();
	if (!sio->usb_pdev) BUG();

	/* use the IRQ iosapic found for USB INT D... */
	pdev->irq = sio->usb_pdev->irq;

	/* ...then properly fixup the USB to point at suckyio PIC */
	sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);

	printk(KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
	       pci_name(pdev), pdev->irq);

	pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
	sio->sp1_base &= ~1;
	printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base);

	pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
	sio->sp2_base &= ~1;
	printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base);

	pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
	sio->pp_base &= ~1;
	printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base);

	pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
	sio->fdc_base &= ~1;
	printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base);
	pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
	sio->acpi_base &= ~1;
	printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base);

	request_region (IC_PIC1, 0x1f, "pic1");
	request_region (IC_PIC2, 0x1f, "pic2");
	request_region (sio->acpi_base, 0x1f, "acpi");

	/* Enable the legacy I/O function */
        pci_read_config_word (pdev, PCI_COMMAND, &word);
	word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
	pci_write_config_word (pdev, PCI_COMMAND, word);

	pci_set_master (pdev);
	pci_enable_device(pdev);

	/*
	 * Next project is programming the onboard interrupt controllers.
	 * PDC hasn't done this for us, since it's using polled I/O.
	 *
	 * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
	 *     space access.  PCI is by nature a 32-bit bus and config
	 *     space can be sensitive to that.
	 */

	/* 0x64 - 0x67 :
		DMA Rtg 2
		DMA Rtg 3
		DMA Chan Ctl
		TRIGGER_1    == 0x82   USB & IDE level triggered, rest to edge
	*/
	pci_write_config_dword (pdev, 0x64,         0x82000000U);

	/* 0x68 - 0x6b :
		TRIGGER_2    == 0x00   all edge triggered (not used)
		CFG_IR_SER   == 0x43   SerPort1 = IRQ3, SerPort2 = IRQ4
		CFG_IR_PF    == 0x65   ParPort  = IRQ5, FloppyCtlr = IRQ6
		CFG_IR_IDE   == 0x07   IDE1 = IRQ7, reserved
	*/
	pci_write_config_dword (pdev, TRIGGER_2,    0x07654300U);

	/* 0x6c - 0x6f :
		CFG_IR_INTAB == 0x00
		CFG_IR_INTCD == 0x10   USB = IRQ1
		CFG_IR_PS2   == 0x00
		CFG_IR_FXBUS == 0x00
	*/
	pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);

	/* 0x70 - 0x73 :
		CFG_IR_USB   == 0x00  not used. USB is connected to INTD.
		CFG_IR_ACPI  == 0x00  not used.
		DMA Priority == 0x4c88  Power on default value. NFC.
	*/
	pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);

	/* PIC1 Initialization Command Word register programming */
	outb (0x11,IC_PIC1+0);	/* ICW1: ICW4 write req | ICW1 */
	outb (0x00,IC_PIC1+1);	/* ICW2: interrupt vector table - not used */
	outb (0x04,IC_PIC1+1);	/* ICW3: Cascade */
	outb (0x01,IC_PIC1+1);	/* ICW4: x86 mode */

	/* PIC1 Program Operational Control Words */
	outb (0xff,IC_PIC1+1);	/* OCW1: Mask all interrupts */
	outb (0xc2,IC_PIC1+0);  /* OCW2: priority (3-7,0-2) */

	/* PIC2 Initialization Command Word register programming */
	outb (0x11,IC_PIC2+0);	/* ICW1: ICW4 write req | ICW1 */
	outb (0x00,IC_PIC2+1);	/* ICW2: N/A */
	outb (0x02,IC_PIC2+1);	/* ICW3: Slave ID code */
	outb (0x01,IC_PIC2+1);	/* ICW4: x86 mode */
		
	/* Program Operational Control Words */
	outb (0xff,IC_PIC1+1);	/* OCW1: Mask all interrupts */
	outb (0x68,IC_PIC1+0);	/* OCW3: OCW3 select | ESMM | SMM */

	/* Write master mask reg */
	outb (0xff,IC_PIC1+1);

	/* Setup USB power regulation */
	outb(1, sio->acpi_base + USB_REG_CR);
	if (inb(sio->acpi_base + USB_REG_CR) & 1)
		printk(KERN_INFO "SuperIO: USB regulator enabled\n");
	else
		printk(KERN_ERR "USB regulator not initialized!\n");

	if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
			"SuperIO", (void *)sio)) {

		printk(KERN_ERR "SuperIO: could not get irq\n");
		BUG();
		return;
	}

	sio->suckyio_irq_enabled = 1;
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);

static void superio_disable_irq(unsigned int irq)
{
	u8 r8;

	if ((irq < 1) || (irq == 2) || (irq > 7)) {
		printk(KERN_ERR "SuperIO: Illegal irq number.\n");
		BUG();
		return;
	}

	/* Mask interrupt */

	r8 = inb(IC_PIC1+1);
	r8 |= (1 << irq);
	outb (r8,IC_PIC1+1);
}

static void superio_enable_irq(unsigned int irq)
{
	u8 r8;

	if ((irq < 1) || (irq == 2) || (irq > 7)) {
		printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq);
		BUG();
		return;
	}

	/* Unmask interrupt */
	r8 = inb(IC_PIC1+1);
	r8 &= ~(1 << irq);
	outb (r8,IC_PIC1+1);
}

static unsigned int superio_startup_irq(unsigned int irq)
{
	superio_enable_irq(irq);
	return 0;
}

static struct hw_interrupt_type superio_interrupt_type = {
	.typename =	"SuperIO",
	.startup =	superio_startup_irq,
	.shutdown =	superio_disable_irq,
	.enable =	superio_enable_irq,
	.disable =	superio_disable_irq,
	.ack =		no_ack_irq,
	.end =		no_end_irq,
};

#ifdef DEBUG_SUPERIO_INIT
static unsigned short expected_device[3] = {
	PCI_DEVICE_ID_NS_87415,
	PCI_DEVICE_ID_NS_87560_LIO,
	PCI_DEVICE_ID_NS_87560_USB
};
#endif

int superio_fixup_irq(struct pci_dev *pcidev)
{
	int local_irq, i;

#ifdef DEBUG_SUPERIO_INIT
	int fn;
	fn = PCI_FUNC(pcidev->devfn);

	/* Verify the function number matches the expected device id. */
	if (expected_device[fn] != pcidev->device) {
		BUG();
		return -1;
	}
	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
		pci_name(pcidev),
		pcidev->vendor, pcidev->device,
		__builtin_return_address(0));
#endif

	for (i = 0; i < 16; i++) {
		irq_desc[i].handler = &superio_interrupt_type;
	}

	/*
	 * We don't allocate a SuperIO irq for the legacy IO function,
	 * since it is a "bridge". Instead, we will allocate irq's for
	 * each legacy device as they are initialized.
	 */

	switch(pcidev->device) {
	case PCI_DEVICE_ID_NS_87415:		/* Function 0 */
		local_irq = IDE_IRQ;
		break;
	case PCI_DEVICE_ID_NS_87560_LIO:	/* Function 1 */
		sio_dev.lio_pdev = pcidev;	/* save for superio_init() */
		return -1;
	case PCI_DEVICE_ID_NS_87560_USB:	/* Function 2 */
		sio_dev.usb_pdev = pcidev;	/* save for superio_init() */
		local_irq = USB_IRQ;
		break;
	default:
		local_irq = -1;
		BUG();
		break;
	}

	return local_irq;
}

static struct uart_port serial[] = {
	{
		.iotype		= UPIO_PORT,
		.line		= 0,
		.type		= PORT_16550A,
		.uartclk	= 115200*16,
		.fifosize	= 16,
	},
	{
		.iotype		= UPIO_PORT,
		.line		= 1,
		.type		= PORT_16550A,
		.uartclk	= 115200*16,
		.fifosize	= 16,
	}
};

static void __devinit superio_serial_init(void)
{
#ifdef CONFIG_SERIAL_8250
	int retval;
        
	serial[0].iobase = sio_dev.sp1_base;
	serial[0].irq = SP1_IRQ;
	spin_lock_init(&serial[0].lock);

	retval = early_serial_setup(&serial[0]);
	if (retval < 0) {
		printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n");
		return;
	}

	serial[1].iobase = sio_dev.sp2_base;
	serial[1].irq = SP2_IRQ;
	spin_lock_init(&serial[1].lock);
	retval = early_serial_setup(&serial[1]);

	if (retval < 0)
		printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n");
#endif /* CONFIG_SERIAL_8250 */
}


static void __devinit superio_parport_init(void)
{
#ifdef CONFIG_PARPORT_PC
	if (!parport_pc_probe_port(sio_dev.pp_base,
			0 /*base_hi*/,
			PAR_IRQ, 
			PARPORT_DMA_NONE /* dma */,
			NULL /*struct pci_dev* */) )

		printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n");
#endif	/* CONFIG_PARPORT_PC */
}


static void superio_fixup_pci(struct pci_dev *pdev)
{
	u8 prog;

	pdev->class |= 0x5;
	pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);

	pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
	printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);


static int __devinit
superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
{
	struct superio_device *sio = &sio_dev;

	/*
	** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
	** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
	** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
	*/
	DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
		pci_name(dev),
		dev->vendor, dev->device,
		dev->subsystem_vendor, dev->subsystem_device,
		dev->class);

	if (!sio->suckyio_irq_enabled)
		BUG(); /* Enabled by PCI_FIXUP_FINAL */

	if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) {	/* Function 1 */
		superio_parport_init();
		superio_serial_init();
		/* REVISIT XXX : superio_fdc_init() ? */
		return 0;
	} else if (dev->device == PCI_DEVICE_ID_NS_87415) {	/* Function 0 */
		DBG_INIT("superio_probe: ignoring IDE 87415\n");
	} else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) {	/* Function 2 */
		DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
	} else {
		DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
	}

	/* Let appropriate other driver claim this device. */
	return -ENODEV;
}

static struct pci_device_id superio_tbl[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
	{ 0, }
};

static struct pci_driver superio_driver = {
	.name =         "SuperIO",
	.id_table =     superio_tbl,
	.probe =        superio_probe,
};

static int __init superio_modinit(void)
{
	return pci_register_driver(&superio_driver);
}

static void __exit superio_exit(void)
{
	pci_unregister_driver(&superio_driver);
}

module_init(superio_modinit);
module_exit(superio_exit);
Commit	Line	Data
1da177e4 LT	1	/* National Semiconductor NS87560UBD Super I/O controller used in
	2	* HP [BCJ]x000 workstations.
	3	*
	4	* This chip is a horrid piece of engineering, and National
	5	* denies any knowledge of its existence. Thus no datasheet is
	6	* available off www.national.com.
	7	*
	8	* (C) Copyright 2000 Linuxcare, Inc.
	9	* (C) Copyright 2000 Linuxcare Canada, Inc.
	10	* (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
	11	* (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
	12	* (C) Copyright 2001 John Marvin <jsm fc hp com>
	13	* (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
7efe1611	14	* (C) Copyright 2005 Kyle McMartin <kyle@parisc-linux.org>
1da177e4 LT	15	*
	16	* This program is free software; you can redistribute it and/or
	17	* modify it under the terms of the GNU General Public License as
	18	* published by the Free Software Foundation; either version 2 of
	19	* the License, or (at your option) any later version.
	20	*
	21	* The initial version of this is by Martin Peterson. Alex deVries
	22	* has spent a bit of time trying to coax it into working.
	23	*
	24	* Major changes to get basic interrupt infrastructure working to
	25	* hopefully be able to support all SuperIO devices. Currently
	26	* works with serial. -- John Marvin <jsm@fc.hp.com>
a39cf72c KM	27	*
	28	* Converted superio_init() to be a PCI_FIXUP_FINAL callee.
	29	* -- Kyle McMartin <kyle@parisc-linux.org>
1da177e4 LT	30	*/
	31
	32
	33	/* NOTES:
	34	*
	35	* Function 0 is an IDE controller. It is identical to a PC87415 IDE
	36	* controller (and identifies itself as such).
	37	*
	38	* Function 1 is a "Legacy I/O" controller. Under this function is a
	39	* whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
	40	* all the functionality in hardware, but the following is available:
	41	*
	42	* Two 16550A compatible serial controllers
	43	* An IEEE 1284 compatible parallel port
	44	* A floppy disk controller
	45	*
	46	* Function 2 is a USB controller.
	47	*
	48	* We must be incredibly careful during initialization. Since all
	49	* interrupts are routed through function 1 (which is not allowed by
	50	* the PCI spec), we need to program the PICs on the legacy I/O port
	51	* before we attempt to set up IDE and USB. @#$!&
	52	*
	53	* According to HP, devices are only enabled by firmware if they have
	54	* a physical device connected.
	55	*
	56	* Configuration register bits:
	57	* 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
	58	* 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
	59	*
	60	*/
	61
	62	#include <linux/errno.h>
	63	#include <linux/init.h>
	64	#include <linux/module.h>
	65	#include <linux/types.h>
	66	#include <linux/interrupt.h>
	67	#include <linux/ioport.h>
	68	#include <linux/serial.h>
	69	#include <linux/pci.h>
	70	#include <linux/parport.h>
	71	#include <linux/parport_pc.h>
	72	#include <linux/termios.h>
	73	#include <linux/tty.h>
	74	#include <linux/serial_core.h>
	75	#include <linux/delay.h>
	76
	77	#include <asm/io.h>
	78	#include <asm/hardware.h>
	79	#include <asm/superio.h>
	80
	81	static struct superio_device sio_dev;
	82
	83
	84	#undef DEBUG_SUPERIO_INIT
	85
	86	#ifdef DEBUG_SUPERIO_INIT
	87	#define DBG_INIT(x...) printk(x)
	88	#else
	89	#define DBG_INIT(x...)
	90	#endif
	91
	92	static irqreturn_t
	93	superio_interrupt(int parent_irq, void devp, struct pt_regs regs)
94	{
95	u8 results;
96	u8 local_irq;
97
98	/* Poll the 8259 to see if there's an interrupt. */
99	outb (OCW3_POLL,IC_PIC1+0);
100
101	results = inb(IC_PIC1+0);
102
103	/*
104	* Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
105	* Bits 6-3: zero
106	* Bits 2-0: highest priority, active requesting interrupt ID (0-7)
107	*/
108	if ((results & 0x80) == 0) {
109	/* I suspect "spurious" interrupts are from unmasking an IRQ.
110	* We don't know if an interrupt was/is pending and thus
111	* just call the handler for that IRQ as if it were pending.
112	*/
113	return IRQ_NONE;
114	}
115
116	/* Check to see which device is interrupting */
117	local_irq = results & 0x0f;
118
119	if (local_irq == 2 \|\| local_irq > 7) {
120	printk(KERN_ERR "SuperIO: slave interrupted!\n");
121	return IRQ_HANDLED;
122	}
123
124	if (local_irq == 7) {
125
126	/* Could be spurious. Check in service bits */
127
128	outb(OCW3_ISR,IC_PIC1+0);
129	results = inb(IC_PIC1+0);
130	if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
131	printk(KERN_WARNING "SuperIO: spurious interrupt!\n");
132	return IRQ_HANDLED;
133	}
134	}
135
136	/* Call the appropriate device's interrupt */
137	__do_IRQ(local_irq, regs);
138
139	/* set EOI - forces a new interrupt if a lower priority device
140	* still needs service.
141	*/
142	outb((OCW2_SEOI\|local_irq),IC_PIC1 + 0);
143	return IRQ_HANDLED;
144	}
145
146	/* Initialize Super I/O device */
a39cf72c KM	147	static void
a39cf72c KM	148	superio_init(struct pci_dev *pcidev)
1da177e4	149	{
a39cf72c	150	struct superio_device *sio = &sio_dev;
1da177e4 LT	151	struct pci_dev *pdev = sio->lio_pdev;
	152	u16 word;
	153
	154	if (sio->suckyio_irq_enabled)
	155	return;
	156
	157	if (!pdev) BUG();
	158	if (!sio->usb_pdev) BUG();
	159
	160	/* use the IRQ iosapic found for USB INT D... */
	161	pdev->irq = sio->usb_pdev->irq;
	162
	163	/* ...then properly fixup the USB to point at suckyio PIC */
	164	sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
	165
a39cf72c KM	166	printk(KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
a39cf72c KM	167	pci_name(pdev), pdev->irq);
1da177e4 LT	168
	169	pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
	170	sio->sp1_base &= ~1;
	171	printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base);
	172
	173	pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
	174	sio->sp2_base &= ~1;
	175	printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base);
	176
	177	pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
	178	sio->pp_base &= ~1;
	179	printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base);
	180
	181	pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
	182	sio->fdc_base &= ~1;
	183	printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base);
	184	pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
	185	sio->acpi_base &= ~1;
	186	printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base);
	187
	188	request_region (IC_PIC1, 0x1f, "pic1");
	189	request_region (IC_PIC2, 0x1f, "pic2");
	190	request_region (sio->acpi_base, 0x1f, "acpi");
	191
	192	/* Enable the legacy I/O function */
	193	pci_read_config_word (pdev, PCI_COMMAND, &word);
	194	word \|= PCI_COMMAND_SERR \| PCI_COMMAND_PARITY \| PCI_COMMAND_IO;
	195	pci_write_config_word (pdev, PCI_COMMAND, word);
	196
	197	pci_set_master (pdev);
	198	pci_enable_device(pdev);
	199
	200	/*
	201	* Next project is programming the onboard interrupt controllers.
	202	* PDC hasn't done this for us, since it's using polled I/O.
	203	*
	204	* XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
	205	* space access. PCI is by nature a 32-bit bus and config
	206	* space can be sensitive to that.
	207	*/
	208
	209	/* 0x64 - 0x67 :
	210	DMA Rtg 2
	211	DMA Rtg 3
	212	DMA Chan Ctl
	213	TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
	214	*/
	215	pci_write_config_dword (pdev, 0x64, 0x82000000U);
	216
	217	/* 0x68 - 0x6b :
	218	TRIGGER_2 == 0x00 all edge triggered (not used)
	219	CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
	220	CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
	221	CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
	222	*/
	223	pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
	224
	225	/* 0x6c - 0x6f :
	226	CFG_IR_INTAB == 0x00
	227	CFG_IR_INTCD == 0x10 USB = IRQ1
	228	CFG_IR_PS2 == 0x00
	229	CFG_IR_FXBUS == 0x00
	230	*/
	231	pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
232
233	/* 0x70 - 0x73 :
234	CFG_IR_USB == 0x00 not used. USB is connected to INTD.
235	CFG_IR_ACPI == 0x00 not used.
236	DMA Priority == 0x4c88 Power on default value. NFC.
237	*/
238	pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
239
240	/* PIC1 Initialization Command Word register programming */
241	outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req \| ICW1 */
242	outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
243	outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
244	outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
245
246	/* PIC1 Program Operational Control Words */
247	outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
248	outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
249
250	/* PIC2 Initialization Command Word register programming */
251	outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req \| ICW1 */
252	outb (0x00,IC_PIC2+1); /* ICW2: N/A */
253	outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
254	outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
255
256	/* Program Operational Control Words */
257	outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
258	outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select \| ESMM \| SMM */
259
260	/* Write master mask reg */
261	outb (0xff,IC_PIC1+1);
262
263	/* Setup USB power regulation */
264	outb(1, sio->acpi_base + USB_REG_CR);
265	if (inb(sio->acpi_base + USB_REG_CR) & 1)
266	printk(KERN_INFO "SuperIO: USB regulator enabled\n");
267	else
268	printk(KERN_ERR "USB regulator not initialized!\n");
269
270	if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
271	"SuperIO", (void *)sio)) {
272
273	printk(KERN_ERR "SuperIO: could not get irq\n");
274	BUG();
275	return;
276	}
277
278	sio->suckyio_irq_enabled = 1;
279	}
a39cf72c	280	DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO, superio_init);
1da177e4 LT	281
	282	static void superio_disable_irq(unsigned int irq)
	283	{
	284	u8 r8;
	285
	286	if ((irq < 1) \|\| (irq == 2) \|\| (irq > 7)) {
	287	printk(KERN_ERR "SuperIO: Illegal irq number.\n");
	288	BUG();
	289	return;
	290	}
	291
	292	/* Mask interrupt */
	293
	294	r8 = inb(IC_PIC1+1);
	295	r8 \|= (1 << irq);
	296	outb (r8,IC_PIC1+1);
	297	}
	298
	299	static void superio_enable_irq(unsigned int irq)
	300	{
	301	u8 r8;
	302
	303	if ((irq < 1) \|\| (irq == 2) \|\| (irq > 7)) {
	304	printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq);
	305	BUG();
	306	return;
	307	}
	308
	309	/* Unmask interrupt */
	310	r8 = inb(IC_PIC1+1);
	311	r8 &= ~(1 << irq);
	312	outb (r8,IC_PIC1+1);
	313	}
	314
	315	static unsigned int superio_startup_irq(unsigned int irq)
	316	{
	317	superio_enable_irq(irq);
	318	return 0;
	319	}
	320
	321	static struct hw_interrupt_type superio_interrupt_type = {
	322	.typename = "SuperIO",
	323	.startup = superio_startup_irq,
	324	.shutdown = superio_disable_irq,
	325	.enable = superio_enable_irq,
	326	.disable = superio_disable_irq,
	327	.ack = no_ack_irq,
	328	.end = no_end_irq,
	329	};
	330
	331	#ifdef DEBUG_SUPERIO_INIT
	332	static unsigned short expected_device[3] = {
	333	PCI_DEVICE_ID_NS_87415,
	334	PCI_DEVICE_ID_NS_87560_LIO,
	335	PCI_DEVICE_ID_NS_87560_USB
	336	};
	337	#endif
	338
	339	int superio_fixup_irq(struct pci_dev *pcidev)
	340	{
	341	int local_irq, i;
	342
	343	#ifdef DEBUG_SUPERIO_INIT
	344	int fn;
345	fn = PCI_FUNC(pcidev->devfn);
346
347	/* Verify the function number matches the expected device id. */
348	if (expected_device[fn] != pcidev->device) {
349	BUG();
350	return -1;
351	}
352	printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
353	pci_name(pcidev),
354	pcidev->vendor, pcidev->device,
355	__builtin_return_address(0));
356	#endif
357
358	for (i = 0; i < 16; i++) {
359	irq_desc[i].handler = &superio_interrupt_type;
360	}
361
362	/*
363	* We don't allocate a SuperIO irq for the legacy IO function,
364	* since it is a "bridge". Instead, we will allocate irq's for
365	* each legacy device as they are initialized.
366	*/
367
368	switch(pcidev->device) {
369	case PCI_DEVICE_ID_NS_87415: /* Function 0 */
370	local_irq = IDE_IRQ;
371	break;
372	case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
373	sio_dev.lio_pdev = pcidev; /* save for superio_init() */
374	return -1;
375	case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
376	sio_dev.usb_pdev = pcidev; /* save for superio_init() */
377	local_irq = USB_IRQ;
378	break;
379	default:
380	local_irq = -1;
381	BUG();
382	break;
383	}
384
385	return local_irq;
386	}
387
388	static struct uart_port serial[] = {
389	{
390	.iotype = UPIO_PORT,
391	.line = 0,
392	.type = PORT_16550A,
393	.uartclk = 115200*16,
394	.fifosize = 16,
395	},
396	{
397	.iotype = UPIO_PORT,
398	.line = 1,
399	.type = PORT_16550A,
400	.uartclk = 115200*16,
401	.fifosize = 16,
402	}
403	};
404
405	static void __devinit superio_serial_init(void)
406	{
407	#ifdef CONFIG_SERIAL_8250
408	int retval;
409
410	serial[0].iobase = sio_dev.sp1_base;
411	serial[0].irq = SP1_IRQ;
7efe1611	412	spin_lock_init(&serial[0].lock);
1da177e4 LT	413
	414	retval = early_serial_setup(&serial[0]);
	415	if (retval < 0) {
	416	printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n");
	417	return;
	418	}
	419
	420	serial[1].iobase = sio_dev.sp2_base;
	421	serial[1].irq = SP2_IRQ;
7efe1611	422	spin_lock_init(&serial[1].lock);
1da177e4 LT	423	retval = early_serial_setup(&serial[1]);
	424
	425	if (retval < 0)
	426	printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n");
	427	#endif /* CONFIG_SERIAL_8250 */
	428	}
	429
	430
	431	static void __devinit superio_parport_init(void)
	432	{
	433	#ifdef CONFIG_PARPORT_PC
	434	if (!parport_pc_probe_port(sio_dev.pp_base,
	435	0 /base_hi/,
	436	PAR_IRQ,
	437	PARPORT_DMA_NONE /* dma */,
	438	NULL /struct pci_dev */) )
	439
	440	printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n");
	441	#endif /* CONFIG_PARPORT_PC */
	442	}
	443
	444
	445	static void superio_fixup_pci(struct pci_dev *pdev)
	446	{
	447	u8 prog;
	448
	449	pdev->class \|= 0x5;
	450	pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
	451
	452	pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
	453	printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
	454	}
	455	DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
	456
	457
a39cf72c KM	458	static int __devinit
a39cf72c KM	459	superio_probe(struct pci_dev dev, const struct pci_device_id id)
1da177e4	460	{
a39cf72c	461	struct superio_device *sio = &sio_dev;
1da177e4 LT	462
	463	/*
	464	** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
	465	** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
	466	** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
	467	*/
	468	DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
	469	pci_name(dev),
	470	dev->vendor, dev->device,
	471	dev->subsystem_vendor, dev->subsystem_device,
	472	dev->class);
	473
a39cf72c KM	474	if (!sio->suckyio_irq_enabled)
a39cf72c KM	475	BUG(); /* Enabled by PCI_FIXUP_FINAL */
1da177e4 LT	476
	477	if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
	478	superio_parport_init();
	479	superio_serial_init();
	480	/* REVISIT XXX : superio_fdc_init() ? */
	481	return 0;
	482	} else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
	483	DBG_INIT("superio_probe: ignoring IDE 87415\n");
	484	} else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
	485	DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
	486	} else {
	487	DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
	488	}
	489
a39cf72c	490	/* Let appropriate other driver claim this device. */
1da177e4 LT	491	return -ENODEV;
	492	}
	493
	494	static struct pci_device_id superio_tbl[] = {
a39cf72c KM	495	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_LIO) },
	496	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87560_USB) },
	497	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415) },
1da177e4 LT	498	{ 0, }
	499	};
	500
	501	static struct pci_driver superio_driver = {
a39cf72c KM	502	.name = "SuperIO",
	503	.id_table = superio_tbl,
	504	.probe = superio_probe,
1da177e4 LT	505	};
	506
	507	static int __init superio_modinit(void)
	508	{
	509	return pci_register_driver(&superio_driver);
	510	}
	511
	512	static void __exit superio_exit(void)
	513	{
	514	pci_unregister_driver(&superio_driver);
	515	}
	516
1da177e4 LT	517	module_init(superio_modinit);
1da177e4 LT	518	module_exit(superio_exit);