Commit | Line | Data |
---|---|---|
4f62d158 | 1 | /* parport_sunbpp.c: Parallel-port routines for SBUS |
1da177e4 LT |
2 | * |
3 | * Author: Derrick J. Brashear <shadow@dementia.org> | |
4 | * | |
5 | * based on work by: | |
6 | * Phil Blundell <philb@gnu.org> | |
7 | * Tim Waugh <tim@cyberelk.demon.co.uk> | |
8 | * Jose Renau <renau@acm.org> | |
9 | * David Campbell <campbell@tirian.che.curtin.edu.au> | |
10 | * Grant Guenther <grant@torque.net> | |
11 | * Eddie C. Dost <ecd@skynet.be> | |
12 | * Stephen Williams (steve@icarus.com) | |
13 | * Gus Baldauf (gbaldauf@ix.netcom.com) | |
14 | * Peter Zaitcev | |
15 | * Tom Dyas | |
4f62d158 DM |
16 | * |
17 | * Updated to new SBUS device framework: David S. Miller <davem@davemloft.net> | |
18 | * | |
1da177e4 LT |
19 | */ |
20 | ||
21 | #include <linux/string.h> | |
22 | #include <linux/module.h> | |
23 | #include <linux/delay.h> | |
24 | #include <linux/errno.h> | |
25 | #include <linux/ioport.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/slab.h> | |
28 | #include <linux/init.h> | |
27167e0e DM |
29 | #include <linux/of.h> |
30 | #include <linux/of_device.h> | |
1da177e4 LT |
31 | |
32 | #include <linux/parport.h> | |
33 | ||
34 | #include <asm/ptrace.h> | |
35 | #include <linux/interrupt.h> | |
36 | ||
37 | #include <asm/io.h> | |
38 | #include <asm/oplib.h> /* OpenProm Library */ | |
1da177e4 LT |
39 | #include <asm/dma.h> /* BPP uses LSI 64854 for DMA */ |
40 | #include <asm/irq.h> | |
41 | #include <asm/sunbpp.h> | |
42 | ||
43 | #undef __SUNBPP_DEBUG | |
44 | #ifdef __SUNBPP_DEBUG | |
45 | #define dprintk(x) printk x | |
46 | #else | |
47 | #define dprintk(x) | |
48 | #endif | |
49 | ||
1da177e4 LT |
50 | static void parport_sunbpp_disable_irq(struct parport *p) |
51 | { | |
52 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
53 | u32 tmp; | |
54 | ||
55 | tmp = sbus_readl(®s->p_csr); | |
56 | tmp &= ~DMA_INT_ENAB; | |
57 | sbus_writel(tmp, ®s->p_csr); | |
58 | } | |
59 | ||
60 | static void parport_sunbpp_enable_irq(struct parport *p) | |
61 | { | |
62 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
63 | u32 tmp; | |
64 | ||
65 | tmp = sbus_readl(®s->p_csr); | |
66 | tmp |= DMA_INT_ENAB; | |
67 | sbus_writel(tmp, ®s->p_csr); | |
68 | } | |
69 | ||
70 | static void parport_sunbpp_write_data(struct parport *p, unsigned char d) | |
71 | { | |
72 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
73 | ||
74 | sbus_writeb(d, ®s->p_dr); | |
75 | dprintk((KERN_DEBUG "wrote 0x%x\n", d)); | |
76 | } | |
77 | ||
78 | static unsigned char parport_sunbpp_read_data(struct parport *p) | |
79 | { | |
80 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
81 | ||
82 | return sbus_readb(®s->p_dr); | |
83 | } | |
84 | ||
1da177e4 LT |
85 | static unsigned char status_sunbpp_to_pc(struct parport *p) |
86 | { | |
87 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
88 | unsigned char bits = 0; | |
89 | unsigned char value_tcr = sbus_readb(®s->p_tcr); | |
90 | unsigned char value_ir = sbus_readb(®s->p_ir); | |
91 | ||
92 | if (!(value_ir & P_IR_ERR)) | |
93 | bits |= PARPORT_STATUS_ERROR; | |
94 | if (!(value_ir & P_IR_SLCT)) | |
95 | bits |= PARPORT_STATUS_SELECT; | |
96 | if (!(value_ir & P_IR_PE)) | |
97 | bits |= PARPORT_STATUS_PAPEROUT; | |
98 | if (value_tcr & P_TCR_ACK) | |
99 | bits |= PARPORT_STATUS_ACK; | |
100 | if (!(value_tcr & P_TCR_BUSY)) | |
101 | bits |= PARPORT_STATUS_BUSY; | |
102 | ||
5a68b2e3 | 103 | dprintk((KERN_DEBUG "tcr 0x%x ir 0x%x\n", value_tcr, value_ir)); |
1da177e4 LT |
104 | dprintk((KERN_DEBUG "read status 0x%x\n", bits)); |
105 | return bits; | |
106 | } | |
107 | ||
108 | static unsigned char control_sunbpp_to_pc(struct parport *p) | |
109 | { | |
110 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
111 | unsigned char bits = 0; | |
112 | unsigned char value_tcr = sbus_readb(®s->p_tcr); | |
113 | unsigned char value_or = sbus_readb(®s->p_or); | |
114 | ||
115 | if (!(value_tcr & P_TCR_DS)) | |
116 | bits |= PARPORT_CONTROL_STROBE; | |
117 | if (!(value_or & P_OR_AFXN)) | |
118 | bits |= PARPORT_CONTROL_AUTOFD; | |
119 | if (!(value_or & P_OR_INIT)) | |
120 | bits |= PARPORT_CONTROL_INIT; | |
121 | if (value_or & P_OR_SLCT_IN) | |
122 | bits |= PARPORT_CONTROL_SELECT; | |
123 | ||
5a68b2e3 | 124 | dprintk((KERN_DEBUG "tcr 0x%x or 0x%x\n", value_tcr, value_or)); |
1da177e4 LT |
125 | dprintk((KERN_DEBUG "read control 0x%x\n", bits)); |
126 | return bits; | |
127 | } | |
128 | ||
129 | static unsigned char parport_sunbpp_read_control(struct parport *p) | |
130 | { | |
131 | return control_sunbpp_to_pc(p); | |
132 | } | |
133 | ||
134 | static unsigned char parport_sunbpp_frob_control(struct parport *p, | |
135 | unsigned char mask, | |
136 | unsigned char val) | |
137 | { | |
138 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
139 | unsigned char value_tcr = sbus_readb(®s->p_tcr); | |
140 | unsigned char value_or = sbus_readb(®s->p_or); | |
141 | ||
5a68b2e3 DM |
142 | dprintk((KERN_DEBUG "frob1: tcr 0x%x or 0x%x\n", |
143 | value_tcr, value_or)); | |
1da177e4 LT |
144 | if (mask & PARPORT_CONTROL_STROBE) { |
145 | if (val & PARPORT_CONTROL_STROBE) { | |
146 | value_tcr &= ~P_TCR_DS; | |
147 | } else { | |
148 | value_tcr |= P_TCR_DS; | |
149 | } | |
150 | } | |
151 | if (mask & PARPORT_CONTROL_AUTOFD) { | |
152 | if (val & PARPORT_CONTROL_AUTOFD) { | |
153 | value_or &= ~P_OR_AFXN; | |
154 | } else { | |
155 | value_or |= P_OR_AFXN; | |
156 | } | |
157 | } | |
158 | if (mask & PARPORT_CONTROL_INIT) { | |
159 | if (val & PARPORT_CONTROL_INIT) { | |
160 | value_or &= ~P_OR_INIT; | |
161 | } else { | |
162 | value_or |= P_OR_INIT; | |
163 | } | |
164 | } | |
165 | if (mask & PARPORT_CONTROL_SELECT) { | |
166 | if (val & PARPORT_CONTROL_SELECT) { | |
167 | value_or |= P_OR_SLCT_IN; | |
168 | } else { | |
169 | value_or &= ~P_OR_SLCT_IN; | |
170 | } | |
171 | } | |
172 | ||
173 | sbus_writeb(value_or, ®s->p_or); | |
174 | sbus_writeb(value_tcr, ®s->p_tcr); | |
5a68b2e3 DM |
175 | dprintk((KERN_DEBUG "frob2: tcr 0x%x or 0x%x\n", |
176 | value_tcr, value_or)); | |
1da177e4 LT |
177 | return parport_sunbpp_read_control(p); |
178 | } | |
179 | ||
180 | static void parport_sunbpp_write_control(struct parport *p, unsigned char d) | |
181 | { | |
182 | const unsigned char wm = (PARPORT_CONTROL_STROBE | | |
183 | PARPORT_CONTROL_AUTOFD | | |
184 | PARPORT_CONTROL_INIT | | |
185 | PARPORT_CONTROL_SELECT); | |
186 | ||
187 | parport_sunbpp_frob_control (p, wm, d & wm); | |
188 | } | |
189 | ||
190 | static unsigned char parport_sunbpp_read_status(struct parport *p) | |
191 | { | |
192 | return status_sunbpp_to_pc(p); | |
193 | } | |
194 | ||
195 | static void parport_sunbpp_data_forward (struct parport *p) | |
196 | { | |
197 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
198 | unsigned char value_tcr = sbus_readb(®s->p_tcr); | |
199 | ||
200 | dprintk((KERN_DEBUG "forward\n")); | |
201 | value_tcr &= ~P_TCR_DIR; | |
202 | sbus_writeb(value_tcr, ®s->p_tcr); | |
203 | } | |
204 | ||
205 | static void parport_sunbpp_data_reverse (struct parport *p) | |
206 | { | |
207 | struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; | |
208 | u8 val = sbus_readb(®s->p_tcr); | |
209 | ||
210 | dprintk((KERN_DEBUG "reverse\n")); | |
211 | val |= P_TCR_DIR; | |
212 | sbus_writeb(val, ®s->p_tcr); | |
213 | } | |
214 | ||
215 | static void parport_sunbpp_init_state(struct pardevice *dev, struct parport_state *s) | |
216 | { | |
217 | s->u.pc.ctr = 0xc; | |
218 | s->u.pc.ecr = 0x0; | |
219 | } | |
220 | ||
221 | static void parport_sunbpp_save_state(struct parport *p, struct parport_state *s) | |
222 | { | |
223 | s->u.pc.ctr = parport_sunbpp_read_control(p); | |
224 | } | |
225 | ||
226 | static void parport_sunbpp_restore_state(struct parport *p, struct parport_state *s) | |
227 | { | |
228 | parport_sunbpp_write_control(p, s->u.pc.ctr); | |
229 | } | |
230 | ||
231 | static struct parport_operations parport_sunbpp_ops = | |
232 | { | |
233 | .write_data = parport_sunbpp_write_data, | |
234 | .read_data = parport_sunbpp_read_data, | |
235 | ||
236 | .write_control = parport_sunbpp_write_control, | |
237 | .read_control = parport_sunbpp_read_control, | |
238 | .frob_control = parport_sunbpp_frob_control, | |
239 | ||
240 | .read_status = parport_sunbpp_read_status, | |
241 | ||
242 | .enable_irq = parport_sunbpp_enable_irq, | |
243 | .disable_irq = parport_sunbpp_disable_irq, | |
244 | ||
245 | .data_forward = parport_sunbpp_data_forward, | |
246 | .data_reverse = parport_sunbpp_data_reverse, | |
247 | ||
248 | .init_state = parport_sunbpp_init_state, | |
249 | .save_state = parport_sunbpp_save_state, | |
250 | .restore_state = parport_sunbpp_restore_state, | |
251 | ||
252 | .epp_write_data = parport_ieee1284_epp_write_data, | |
253 | .epp_read_data = parport_ieee1284_epp_read_data, | |
254 | .epp_write_addr = parport_ieee1284_epp_write_addr, | |
255 | .epp_read_addr = parport_ieee1284_epp_read_addr, | |
256 | ||
257 | .ecp_write_data = parport_ieee1284_ecp_write_data, | |
258 | .ecp_read_data = parport_ieee1284_ecp_read_data, | |
259 | .ecp_write_addr = parport_ieee1284_ecp_write_addr, | |
260 | ||
261 | .compat_write_data = parport_ieee1284_write_compat, | |
262 | .nibble_read_data = parport_ieee1284_read_nibble, | |
263 | .byte_read_data = parport_ieee1284_read_byte, | |
264 | ||
265 | .owner = THIS_MODULE, | |
266 | }; | |
267 | ||
312facaf | 268 | static int bpp_probe(struct platform_device *op) |
1da177e4 | 269 | { |
1da177e4 | 270 | struct parport_operations *ops; |
1da177e4 | 271 | struct bpp_regs __iomem *regs; |
27167e0e | 272 | int irq, dma, err = 0, size; |
1da177e4 | 273 | unsigned char value_tcr; |
27167e0e DM |
274 | void __iomem *base; |
275 | struct parport *p; | |
1da177e4 | 276 | |
1636f8ac | 277 | irq = op->archdata.irqs[0]; |
27167e0e DM |
278 | base = of_ioremap(&op->resource[0], 0, |
279 | resource_size(&op->resource[0]), | |
280 | "sunbpp"); | |
1da177e4 | 281 | if (!base) |
4f62d158 | 282 | return -ENODEV; |
1da177e4 | 283 | |
27167e0e | 284 | size = resource_size(&op->resource[0]); |
1da177e4 LT |
285 | dma = PARPORT_DMA_NONE; |
286 | ||
2451a848 SMP |
287 | ops = kmemdup(&parport_sunbpp_ops, sizeof(struct parport_operations), |
288 | GFP_KERNEL); | |
1da177e4 | 289 | if (!ops) |
4f62d158 | 290 | goto out_unmap; |
1da177e4 | 291 | |
1da177e4 LT |
292 | dprintk(("register_port\n")); |
293 | if (!(p = parport_register_port((unsigned long)base, irq, dma, ops))) | |
4f62d158 | 294 | goto out_free_ops; |
1da177e4 LT |
295 | |
296 | p->size = size; | |
27167e0e | 297 | p->dev = &op->dev; |
1da177e4 | 298 | |
3f2e40df | 299 | if ((err = request_irq(p->irq, parport_irq_handler, |
dace1453 | 300 | IRQF_SHARED, p->name, p)) != 0) { |
4f62d158 | 301 | goto out_put_port; |
1da177e4 | 302 | } |
4f62d158 | 303 | |
1da177e4 LT |
304 | parport_sunbpp_enable_irq(p); |
305 | ||
306 | regs = (struct bpp_regs __iomem *)p->base; | |
4f62d158 | 307 | |
1da177e4 LT |
308 | value_tcr = sbus_readb(®s->p_tcr); |
309 | value_tcr &= ~P_TCR_DIR; | |
310 | sbus_writeb(value_tcr, ®s->p_tcr); | |
311 | ||
312 | printk(KERN_INFO "%s: sunbpp at 0x%lx\n", p->name, p->base); | |
1da177e4 | 313 | |
27167e0e | 314 | dev_set_drvdata(&op->dev, p); |
4f62d158 DM |
315 | |
316 | parport_announce_port(p); | |
317 | ||
318 | return 0; | |
1da177e4 | 319 | |
4f62d158 | 320 | out_put_port: |
1da177e4 | 321 | parport_put_port(p); |
4f62d158 DM |
322 | |
323 | out_free_ops: | |
1da177e4 | 324 | kfree(ops); |
4f62d158 DM |
325 | |
326 | out_unmap: | |
27167e0e | 327 | of_iounmap(&op->resource[0], base, size); |
4f62d158 | 328 | |
1da177e4 LT |
329 | return err; |
330 | } | |
331 | ||
312facaf | 332 | static int bpp_remove(struct platform_device *op) |
4f62d158 | 333 | { |
27167e0e | 334 | struct parport *p = dev_get_drvdata(&op->dev); |
4f62d158 DM |
335 | struct parport_operations *ops = p->ops; |
336 | ||
337 | parport_remove_port(p); | |
338 | ||
339 | if (p->irq != PARPORT_IRQ_NONE) { | |
340 | parport_sunbpp_disable_irq(p); | |
341 | free_irq(p->irq, p); | |
1da177e4 | 342 | } |
4f62d158 | 343 | |
27167e0e | 344 | of_iounmap(&op->resource[0], (void __iomem *) p->base, p->size); |
4f62d158 DM |
345 | parport_put_port(p); |
346 | kfree(ops); | |
347 | ||
27167e0e | 348 | dev_set_drvdata(&op->dev, NULL); |
4f62d158 DM |
349 | |
350 | return 0; | |
351 | } | |
352 | ||
fd098316 | 353 | static const struct of_device_id bpp_match[] = { |
4f62d158 DM |
354 | { |
355 | .name = "SUNW,bpp", | |
356 | }, | |
357 | {}, | |
358 | }; | |
359 | ||
09ec4314 | 360 | MODULE_DEVICE_TABLE(of, bpp_match); |
4f62d158 | 361 | |
4ebb24f7 | 362 | static struct platform_driver bpp_sbus_driver = { |
4018294b GL |
363 | .driver = { |
364 | .name = "bpp", | |
4018294b GL |
365 | .of_match_table = bpp_match, |
366 | }, | |
4f62d158 | 367 | .probe = bpp_probe, |
312facaf | 368 | .remove = bpp_remove, |
4f62d158 DM |
369 | }; |
370 | ||
782ee877 | 371 | module_platform_driver(bpp_sbus_driver); |
1da177e4 LT |
372 | |
373 | MODULE_AUTHOR("Derrick J Brashear"); | |
374 | MODULE_DESCRIPTION("Parport Driver for Sparc bidirectional Port"); | |
375 | MODULE_SUPPORTED_DEVICE("Sparc Bidirectional Parallel Port"); | |
4f62d158 | 376 | MODULE_VERSION("2.0"); |
1da177e4 | 377 | MODULE_LICENSE("GPL"); |