Commit | Line | Data |
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4e64dbe2 | 1 | /* |
4068bd19 PG |
2 | * Generic PCI host driver common code |
3 | * | |
4e64dbe2 DD |
4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License version 2 as | |
6 | * published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, | |
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | * GNU General Public License for more details. | |
12 | * | |
13 | * You should have received a copy of the GNU General Public License | |
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
15 | * | |
16 | * Copyright (C) 2014 ARM Limited | |
17 | * | |
18 | * Author: Will Deacon <will.deacon@arm.com> | |
19 | */ | |
20 | ||
21 | #include <linux/kernel.h> | |
4e64dbe2 DD |
22 | #include <linux/of_address.h> |
23 | #include <linux/of_pci.h> | |
80955f9e | 24 | #include <linux/pci-ecam.h> |
4e64dbe2 DD |
25 | #include <linux/platform_device.h> |
26 | ||
1958e717 J |
27 | static int gen_pci_parse_request_of_pci_ranges(struct device *dev, |
28 | struct list_head *resources, struct resource **bus_range) | |
4e64dbe2 DD |
29 | { |
30 | int err, res_valid = 0; | |
4e64dbe2 DD |
31 | struct device_node *np = dev->of_node; |
32 | resource_size_t iobase; | |
33 | struct resource_entry *win; | |
34 | ||
1958e717 | 35 | err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase); |
4e64dbe2 DD |
36 | if (err) |
37 | return err; | |
38 | ||
b7f957ac BH |
39 | err = devm_request_pci_bus_resources(dev, resources); |
40 | if (err) | |
5aa182a2 | 41 | return err; |
b7f957ac | 42 | |
1958e717 | 43 | resource_list_for_each_entry(win, resources) { |
b7f957ac | 44 | struct resource *res = win->res; |
4e64dbe2 DD |
45 | |
46 | switch (resource_type(res)) { | |
47 | case IORESOURCE_IO: | |
4e64dbe2 | 48 | err = pci_remap_iospace(res, iobase); |
5aa182a2 | 49 | if (err) |
4e64dbe2 DD |
50 | dev_warn(dev, "error %d: failed to map resource %pR\n", |
51 | err, res); | |
4e64dbe2 DD |
52 | break; |
53 | case IORESOURCE_MEM: | |
4e64dbe2 DD |
54 | res_valid |= !(res->flags & IORESOURCE_PREFETCH); |
55 | break; | |
56 | case IORESOURCE_BUS: | |
1958e717 | 57 | *bus_range = res; |
5aa182a2 | 58 | break; |
4e64dbe2 | 59 | } |
4e64dbe2 DD |
60 | } |
61 | ||
5aa182a2 BH |
62 | if (res_valid) |
63 | return 0; | |
4e64dbe2 | 64 | |
5aa182a2 BH |
65 | dev_err(dev, "non-prefetchable memory resource required\n"); |
66 | return -EINVAL; | |
4e64dbe2 DD |
67 | } |
68 | ||
1958e717 J |
69 | static void gen_pci_unmap_cfg(void *ptr) |
70 | { | |
71 | pci_ecam_free((struct pci_config_window *)ptr); | |
72 | } | |
73 | ||
74 | static struct pci_config_window *gen_pci_init(struct device *dev, | |
75 | struct list_head *resources, struct pci_ecam_ops *ops) | |
4e64dbe2 DD |
76 | { |
77 | int err; | |
1958e717 J |
78 | struct resource cfgres; |
79 | struct resource *bus_range = NULL; | |
80 | struct pci_config_window *cfg; | |
4e64dbe2 | 81 | |
1958e717 J |
82 | /* Parse our PCI ranges and request their resources */ |
83 | err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range); | |
84 | if (err) | |
85 | goto err_out; | |
86 | ||
87 | err = of_address_to_resource(dev->of_node, 0, &cfgres); | |
4e64dbe2 DD |
88 | if (err) { |
89 | dev_err(dev, "missing \"reg\" property\n"); | |
1958e717 | 90 | goto err_out; |
4e64dbe2 DD |
91 | } |
92 | ||
1958e717 J |
93 | cfg = pci_ecam_create(dev, &cfgres, bus_range, ops); |
94 | if (IS_ERR(cfg)) { | |
95 | err = PTR_ERR(cfg); | |
96 | goto err_out; | |
4e64dbe2 DD |
97 | } |
98 | ||
1958e717 J |
99 | err = devm_add_action(dev, gen_pci_unmap_cfg, cfg); |
100 | if (err) { | |
101 | gen_pci_unmap_cfg(cfg); | |
102 | goto err_out; | |
103 | } | |
104 | return cfg; | |
105 | ||
106 | err_out: | |
107 | pci_free_resource_list(resources); | |
108 | return ERR_PTR(err); | |
4e64dbe2 DD |
109 | } |
110 | ||
111 | int pci_host_common_probe(struct platform_device *pdev, | |
1958e717 | 112 | struct pci_ecam_ops *ops) |
4e64dbe2 | 113 | { |
4e64dbe2 DD |
114 | const char *type; |
115 | struct device *dev = &pdev->dev; | |
116 | struct device_node *np = dev->of_node; | |
117 | struct pci_bus *bus, *child; | |
1958e717 J |
118 | struct pci_config_window *cfg; |
119 | struct list_head resources; | |
4e64dbe2 DD |
120 | |
121 | type = of_get_property(np, "device_type", NULL); | |
122 | if (!type || strcmp(type, "pci")) { | |
123 | dev_err(dev, "invalid \"device_type\" %s\n", type); | |
124 | return -EINVAL; | |
125 | } | |
126 | ||
127 | of_pci_check_probe_only(); | |
128 | ||
4e64dbe2 | 129 | /* Parse and map our Configuration Space windows */ |
1958e717 J |
130 | INIT_LIST_HEAD(&resources); |
131 | cfg = gen_pci_init(dev, &resources, ops); | |
132 | if (IS_ERR(cfg)) | |
133 | return PTR_ERR(cfg); | |
4e64dbe2 DD |
134 | |
135 | /* Do not reassign resources if probe only */ | |
136 | if (!pci_has_flag(PCI_PROBE_ONLY)) | |
137 | pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS); | |
138 | ||
1958e717 J |
139 | bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg, |
140 | &resources); | |
4e64dbe2 DD |
141 | if (!bus) { |
142 | dev_err(dev, "Scanning rootbus failed"); | |
143 | return -ENODEV; | |
144 | } | |
145 | ||
146 | pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci); | |
147 | ||
dcce0f15 LP |
148 | /* |
149 | * We insert PCI resources into the iomem_resource and | |
150 | * ioport_resource trees in either pci_bus_claim_resources() | |
151 | * or pci_bus_assign_resources(). | |
152 | */ | |
153 | if (pci_has_flag(PCI_PROBE_ONLY)) { | |
154 | pci_bus_claim_resources(bus); | |
155 | } else { | |
4e64dbe2 DD |
156 | pci_bus_size_bridges(bus); |
157 | pci_bus_assign_resources(bus); | |
158 | ||
159 | list_for_each_entry(child, &bus->children, node) | |
160 | pcie_bus_configure_settings(child); | |
161 | } | |
162 | ||
163 | pci_bus_add_devices(bus); | |
164 | return 0; | |
165 | } |