[deliverable/linux.git] / drivers / pci / host / pci-host-common.c

/*
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 *
 * Copyright (C) 2014 ARM Limited
 *
 * Author: Will Deacon <will.deacon@arm.com>
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_pci.h>
#include <linux/platform_device.h>

#include "../ecam.h"

static int gen_pci_parse_request_of_pci_ranges(struct device *dev,
		       struct list_head *resources, struct resource **bus_range)
{
	int err, res_valid = 0;
	struct device_node *np = dev->of_node;
	resource_size_t iobase;
	struct resource_entry *win;

	err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase);
	if (err)
		return err;

	resource_list_for_each_entry(win, resources) {
		struct resource *parent, *res = win->res;

		switch (resource_type(res)) {
		case IORESOURCE_IO:
			parent = &ioport_resource;
			err = pci_remap_iospace(res, iobase);
			if (err) {
				dev_warn(dev, "error %d: failed to map resource %pR\n",
					 err, res);
				continue;
			}
			break;
		case IORESOURCE_MEM:
			parent = &iomem_resource;
			res_valid |= !(res->flags & IORESOURCE_PREFETCH);
			break;
		case IORESOURCE_BUS:
			*bus_range = res;
		default:
			continue;
		}

		err = devm_request_resource(dev, parent, res);
		if (err)
			goto out_release_res;
	}

	if (!res_valid) {
		dev_err(dev, "non-prefetchable memory resource required\n");
		err = -EINVAL;
		goto out_release_res;
	}

	return 0;

out_release_res:
	return err;
}

static void gen_pci_unmap_cfg(void *ptr)
{
	pci_ecam_free((struct pci_config_window *)ptr);
}

static struct pci_config_window *gen_pci_init(struct device *dev,
		struct list_head *resources, struct pci_ecam_ops *ops)
{
	int err;
	struct resource cfgres;
	struct resource *bus_range = NULL;
	struct pci_config_window *cfg;

	/* Parse our PCI ranges and request their resources */
	err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range);
	if (err)
		goto err_out;

	err = of_address_to_resource(dev->of_node, 0, &cfgres);
	if (err) {
		dev_err(dev, "missing \"reg\" property\n");
		goto err_out;
	}

	cfg = pci_ecam_create(dev, &cfgres, bus_range, ops);
	if (IS_ERR(cfg)) {
		err = PTR_ERR(cfg);
		goto err_out;
	}

	err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
	if (err) {
		gen_pci_unmap_cfg(cfg);
		goto err_out;
	}
	return cfg;

err_out:
	pci_free_resource_list(resources);
	return ERR_PTR(err);
}

int pci_host_common_probe(struct platform_device *pdev,
			  struct pci_ecam_ops *ops)
{
	const char *type;
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct pci_bus *bus, *child;
	struct pci_config_window *cfg;
	struct list_head resources;

	type = of_get_property(np, "device_type", NULL);
	if (!type || strcmp(type, "pci")) {
		dev_err(dev, "invalid \"device_type\" %s\n", type);
		return -EINVAL;
	}

	of_pci_check_probe_only();

	/* Parse and map our Configuration Space windows */
	INIT_LIST_HEAD(&resources);
	cfg = gen_pci_init(dev, &resources, ops);
	if (IS_ERR(cfg))
		return PTR_ERR(cfg);

	/* Do not reassign resources if probe only */
	if (!pci_has_flag(PCI_PROBE_ONLY))
		pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);

	bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg,
				&resources);
	if (!bus) {
		dev_err(dev, "Scanning rootbus failed");
		return -ENODEV;
	}

	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);

	if (!pci_has_flag(PCI_PROBE_ONLY)) {
		pci_bus_size_bridges(bus);
		pci_bus_assign_resources(bus);

		list_for_each_entry(child, &bus->children, node)
			pcie_bus_configure_settings(child);
	}

	pci_bus_add_devices(bus);
	return 0;
}

MODULE_DESCRIPTION("Generic PCI host driver common code");
MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
4e64dbe2 DD	1	/*
	2	* This program is free software; you can redistribute it and/or modify
	3	* it under the terms of the GNU General Public License version 2 as
	4	* published by the Free Software Foundation.
	5	*
	6	* This program is distributed in the hope that it will be useful,
	7	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	8	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	9	* GNU General Public License for more details.
	10	*
	11	* You should have received a copy of the GNU General Public License
	12	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	13	*
	14	* Copyright (C) 2014 ARM Limited
	15	*
	16	* Author: Will Deacon <will.deacon@arm.com>
	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/of_address.h>
	22	#include <linux/of_pci.h>
	23	#include <linux/platform_device.h>
	24
1958e717	25	#include "../ecam.h"
4e64dbe2	26
1958e717 J	27	static int gen_pci_parse_request_of_pci_ranges(struct device *dev,
1958e717 J	28	struct list_head resources, struct resource *bus_range)
4e64dbe2 DD	29	{
4e64dbe2 DD	30	int err, res_valid = 0;
4e64dbe2 DD	31	struct device_node *np = dev->of_node;
	32	resource_size_t iobase;
	33	struct resource_entry *win;
	34
1958e717	35	err = of_pci_get_host_bridge_resources(np, 0, 0xff, resources, &iobase);
4e64dbe2 DD	36	if (err)
	37	return err;
	38
1958e717	39	resource_list_for_each_entry(win, resources) {
4e64dbe2 DD	40	struct resource parent, res = win->res;
	41
	42	switch (resource_type(res)) {
	43	case IORESOURCE_IO:
	44	parent = &ioport_resource;
	45	err = pci_remap_iospace(res, iobase);
	46	if (err) {
	47	dev_warn(dev, "error %d: failed to map resource %pR\n",
	48	err, res);
	49	continue;
	50	}
	51	break;
	52	case IORESOURCE_MEM:
	53	parent = &iomem_resource;
	54	res_valid \|= !(res->flags & IORESOURCE_PREFETCH);
	55	break;
	56	case IORESOURCE_BUS:
1958e717	57	*bus_range = res;
4e64dbe2 DD	58	default:
	59	continue;
	60	}
	61
	62	err = devm_request_resource(dev, parent, res);
	63	if (err)
	64	goto out_release_res;
	65	}
	66
	67	if (!res_valid) {
	68	dev_err(dev, "non-prefetchable memory resource required\n");
	69	err = -EINVAL;
	70	goto out_release_res;
	71	}
	72
	73	return 0;
	74
	75	out_release_res:
4e64dbe2 DD	76	return err;
	77	}
	78
1958e717 J	79	static void gen_pci_unmap_cfg(void *ptr)
	80	{
	81	pci_ecam_free((struct pci_config_window *)ptr);
	82	}
	83
	84	static struct pci_config_window gen_pci_init(struct device dev,
	85	struct list_head resources, struct pci_ecam_ops ops)
4e64dbe2 DD	86	{
4e64dbe2 DD	87	int err;
1958e717 J	88	struct resource cfgres;
	89	struct resource *bus_range = NULL;
	90	struct pci_config_window *cfg;
4e64dbe2	91
1958e717 J	92	/* Parse our PCI ranges and request their resources */
	93	err = gen_pci_parse_request_of_pci_ranges(dev, resources, &bus_range);
	94	if (err)
	95	goto err_out;
	96
	97	err = of_address_to_resource(dev->of_node, 0, &cfgres);
4e64dbe2 DD	98	if (err) {
4e64dbe2 DD	99	dev_err(dev, "missing \"reg\" property\n");
1958e717	100	goto err_out;
4e64dbe2 DD	101	}
4e64dbe2 DD	102
1958e717 J	103	cfg = pci_ecam_create(dev, &cfgres, bus_range, ops);
	104	if (IS_ERR(cfg)) {
	105	err = PTR_ERR(cfg);
	106	goto err_out;
4e64dbe2 DD	107	}
4e64dbe2 DD	108
1958e717 J	109	err = devm_add_action(dev, gen_pci_unmap_cfg, cfg);
	110	if (err) {
	111	gen_pci_unmap_cfg(cfg);
	112	goto err_out;
	113	}
	114	return cfg;
	115
	116	err_out:
	117	pci_free_resource_list(resources);
	118	return ERR_PTR(err);
4e64dbe2 DD	119	}
	120
	121	int pci_host_common_probe(struct platform_device *pdev,
1958e717	122	struct pci_ecam_ops *ops)
4e64dbe2	123	{
4e64dbe2 DD	124	const char *type;
	125	struct device *dev = &pdev->dev;
	126	struct device_node *np = dev->of_node;
	127	struct pci_bus bus, child;
1958e717 J	128	struct pci_config_window *cfg;
1958e717 J	129	struct list_head resources;
4e64dbe2 DD	130
	131	type = of_get_property(np, "device_type", NULL);
	132	if (!type \|\| strcmp(type, "pci")) {
	133	dev_err(dev, "invalid \"device_type\" %s\n", type);
	134	return -EINVAL;
	135	}
	136
	137	of_pci_check_probe_only();
	138
4e64dbe2	139	/* Parse and map our Configuration Space windows */
1958e717 J	140	INIT_LIST_HEAD(&resources);
	141	cfg = gen_pci_init(dev, &resources, ops);
	142	if (IS_ERR(cfg))
	143	return PTR_ERR(cfg);
4e64dbe2 DD	144
	145	/* Do not reassign resources if probe only */
	146	if (!pci_has_flag(PCI_PROBE_ONLY))
	147	pci_add_flags(PCI_REASSIGN_ALL_RSRC \| PCI_REASSIGN_ALL_BUS);
	148
1958e717 J	149	bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg,
1958e717 J	150	&resources);
4e64dbe2 DD	151	if (!bus) {
	152	dev_err(dev, "Scanning rootbus failed");
	153	return -ENODEV;
	154	}
	155
	156	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
	157
	158	if (!pci_has_flag(PCI_PROBE_ONLY)) {
	159	pci_bus_size_bridges(bus);
	160	pci_bus_assign_resources(bus);
	161
	162	list_for_each_entry(child, &bus->children, node)
	163	pcie_bus_configure_settings(child);
	164	}
	165
	166	pci_bus_add_devices(bus);
	167	return 0;
	168	}
	169
	170	MODULE_DESCRIPTION("Generic PCI host driver common code");
	171	MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
	172	MODULE_LICENSE("GPL v2");