[deliverable/linux.git] / drivers / pci / host / pci-versatile.c

/*
 * Copyright 2004 Koninklijke Philips Electronics NV
 *
 * Conversion to platform driver and DT:
 * Copyright 2014 Linaro Ltd.
 *
 * This software is licensed under the terms of the GNU General Public
 * License version 2, as published by the Free Software Foundation, and
 * may be copied, distributed, and modified under those terms.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * 14/04/2005 Initial version, colin.king@philips.com
 */
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of_address.h>
#include <linux/of_pci.h>
#include <linux/of_platform.h>
#include <linux/pci.h>
#include <linux/platform_device.h>

static void __iomem *versatile_pci_base;
static void __iomem *versatile_cfg_base[2];

#define PCI_IMAP(m)		(versatile_pci_base + ((m) * 4))
#define PCI_SMAP(m)		(versatile_pci_base + 0x14 + ((m) * 4))
#define PCI_SELFID		(versatile_pci_base + 0xc)

#define VP_PCI_DEVICE_ID		0x030010ee
#define VP_PCI_CLASS_ID			0x0b400000

static u32 pci_slot_ignore;

static int __init versatile_pci_slot_ignore(char *str)
{
	int retval;
	int slot;

	while ((retval = get_option(&str, &slot))) {
		if ((slot < 0) || (slot > 31))
			pr_err("Illegal slot value: %d\n", slot);
		else
			pci_slot_ignore |= (1 << slot);
	}
	return 1;
}
__setup("pci_slot_ignore=", versatile_pci_slot_ignore);


static void __iomem *versatile_map_bus(struct pci_bus *bus,
				       unsigned int devfn, int offset)
{
	unsigned int busnr = bus->number;

	if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
		return NULL;

	return versatile_cfg_base[1] + ((busnr << 16) | (devfn << 8) | offset);
}

static struct pci_ops pci_versatile_ops = {
	.map_bus = versatile_map_bus,
	.read	= pci_generic_config_read32,
	.write	= pci_generic_config_write,
};

static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
						     struct list_head *res)
{
	int err, mem = 1, res_valid = 0;
	struct device_node *np = dev->of_node;
	resource_size_t iobase;
	struct resource_entry *win;

	err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
	if (err)
		return err;

	resource_list_for_each_entry(win, res) {
		struct resource *parent, *res = win->res;

		switch (resource_type(res)) {
		case IORESOURCE_IO:
			parent = &ioport_resource;
			err = pci_remap_iospace(res, iobase);
			if (err) {
				dev_warn(dev, "error %d: failed to map resource %pR\n",
					 err, res);
				continue;
			}
			break;
		case IORESOURCE_MEM:
			parent = &iomem_resource;
			res_valid |= !(res->flags & IORESOURCE_PREFETCH);

			writel(res->start >> 28, PCI_IMAP(mem));
			writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
			mem++;

			break;
		case IORESOURCE_BUS:
		default:
			continue;
		}

		err = devm_request_resource(dev, parent, res);
		if (err)
			goto out_release_res;
	}

	if (!res_valid) {
		dev_err(dev, "non-prefetchable memory resource required\n");
		err = -EINVAL;
		goto out_release_res;
	}

	return 0;

out_release_res:
	pci_free_resource_list(res);
	return err;
}

static int versatile_pci_probe(struct platform_device *pdev)
{
	struct resource *res;
	int ret, i, myslot = -1;
	u32 val;
	void __iomem *local_pci_cfg_base;
	struct pci_bus *bus;
	LIST_HEAD(pci_res);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(versatile_pci_base))
		return PTR_ERR(versatile_pci_base);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
	versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(versatile_cfg_base[0]))
		return PTR_ERR(versatile_cfg_base[0]);

	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
	versatile_cfg_base[1] = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(versatile_cfg_base[1]))
		return PTR_ERR(versatile_cfg_base[1]);

	ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res);
	if (ret)
		return ret;

	/*
	 * We need to discover the PCI core first to configure itself
	 * before the main PCI probing is performed
	 */
	for (i = 0; i < 32; i++) {
		if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
		    (readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
			myslot = i;
			break;
		}
	}
	if (myslot == -1) {
		dev_err(&pdev->dev, "Cannot find PCI core!\n");
		return -EIO;
	}
	/*
	 * Do not to map Versatile FPGA PCI device into memory space
	 */
	pci_slot_ignore |= (1 << myslot);

	dev_info(&pdev->dev, "PCI core found (slot %d)\n", myslot);

	writel(myslot, PCI_SELFID);
	local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);

	val = readl(local_pci_cfg_base + PCI_COMMAND);
	val |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE;
	writel(val, local_pci_cfg_base + PCI_COMMAND);

	/*
	 * Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
	 */
	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);

	/*
	 * For many years the kernel and QEMU were symbiotically buggy
	 * in that they both assumed the same broken IRQ mapping.
	 * QEMU therefore attempts to auto-detect old broken kernels
	 * so that they still work on newer QEMU as they did on old
	 * QEMU. Since we now use the correct (ie matching-hardware)
	 * IRQ mapping we write a definitely different value to a
	 * PCI_INTERRUPT_LINE register to tell QEMU that we expect
	 * real hardware behaviour and it need not be backwards
	 * compatible for us. This write is harmless on real hardware.
	 */
	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);

	pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
	pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);

	bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, NULL, &pci_res);
	if (!bus)
		return -ENOMEM;

	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
	pci_assign_unassigned_bus_resources(bus);
	pci_bus_add_devices(bus);

	return 0;
}

static const struct of_device_id versatile_pci_of_match[] = {
	{ .compatible = "arm,versatile-pci", },
	{ },
};
MODULE_DEVICE_TABLE(of, versatile_pci_of_match);

static struct platform_driver versatile_pci_driver = {
	.driver = {
		.name = "versatile-pci",
		.of_match_table = versatile_pci_of_match,
	},
	.probe = versatile_pci_probe,
};
module_platform_driver(versatile_pci_driver);

MODULE_DESCRIPTION("Versatile PCI driver");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
b7e78170 RH	1	/*
	2	* Copyright 2004 Koninklijke Philips Electronics NV
	3	*
	4	* Conversion to platform driver and DT:
	5	* Copyright 2014 Linaro Ltd.
	6	*
	7	* This software is licensed under the terms of the GNU General Public
	8	* License version 2, as published by the Free Software Foundation, and
	9	* may be copied, distributed, and modified under those terms.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* 14/04/2005 Initial version, colin.king@philips.com
	17	*/
	18	#include <linux/kernel.h>
	19	#include <linux/module.h>
	20	#include <linux/of_address.h>
	21	#include <linux/of_pci.h>
	22	#include <linux/of_platform.h>
	23	#include <linux/pci.h>
	24	#include <linux/platform_device.h>
	25
	26	static void __iomem *versatile_pci_base;
	27	static void __iomem *versatile_cfg_base[2];
	28
	29	#define PCI_IMAP(m) (versatile_pci_base + ((m) * 4))
	30	#define PCI_SMAP(m) (versatile_pci_base + 0x14 + ((m) * 4))
	31	#define PCI_SELFID (versatile_pci_base + 0xc)
	32
	33	#define VP_PCI_DEVICE_ID 0x030010ee
	34	#define VP_PCI_CLASS_ID 0x0b400000
	35
	36	static u32 pci_slot_ignore;
	37
	38	static int __init versatile_pci_slot_ignore(char *str)
	39	{
	40	int retval;
	41	int slot;
	42
	43	while ((retval = get_option(&str, &slot))) {
	44	if ((slot < 0) \|\| (slot > 31))
	45	pr_err("Illegal slot value: %d\n", slot);
	46	else
	47	pci_slot_ignore \|= (1 << slot);
	48	}
	49	return 1;
	50	}
	51	__setup("pci_slot_ignore=", versatile_pci_slot_ignore);
	52
	53
	54	static void __iomem versatile_map_bus(struct pci_bus bus,
	55	unsigned int devfn, int offset)
	56	{
	57	unsigned int busnr = bus->number;
	58
	59	if (pci_slot_ignore & (1 << PCI_SLOT(devfn)))
	60	return NULL;
	61
	62	return versatile_cfg_base[1] + ((busnr << 16) \| (devfn << 8) \| offset);
	63	}
	64
65	static struct pci_ops pci_versatile_ops = {
66	.map_bus = versatile_map_bus,
67	.read = pci_generic_config_read32,
68	.write = pci_generic_config_write,
69	};
70
71	static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
72	struct list_head *res)
73	{
74	int err, mem = 1, res_valid = 0;
75	struct device_node *np = dev->of_node;
76	resource_size_t iobase;
87291235	77	struct resource_entry *win;
b7e78170 RH	78
	79	err = of_pci_get_host_bridge_resources(np, 0, 0xff, res, &iobase);
	80	if (err)
	81	return err;
	82
f1651a24	83	resource_list_for_each_entry(win, res) {
b7e78170 RH	84	struct resource parent, res = win->res;
	85
	86	switch (resource_type(res)) {
	87	case IORESOURCE_IO:
	88	parent = &ioport_resource;
	89	err = pci_remap_iospace(res, iobase);
	90	if (err) {
	91	dev_warn(dev, "error %d: failed to map resource %pR\n",
	92	err, res);
	93	continue;
	94	}
	95	break;
	96	case IORESOURCE_MEM:
	97	parent = &iomem_resource;
	98	res_valid \|= !(res->flags & IORESOURCE_PREFETCH);
	99
	100	writel(res->start >> 28, PCI_IMAP(mem));
	101	writel(PHYS_OFFSET >> 28, PCI_SMAP(mem));
	102	mem++;
	103
	104	break;
	105	case IORESOURCE_BUS:
	106	default:
	107	continue;
	108	}
	109
	110	err = devm_request_resource(dev, parent, res);
	111	if (err)
	112	goto out_release_res;
	113	}
	114
	115	if (!res_valid) {
	116	dev_err(dev, "non-prefetchable memory resource required\n");
	117	err = -EINVAL;
	118	goto out_release_res;
	119	}
	120
	121	return 0;
	122
	123	out_release_res:
	124	pci_free_resource_list(res);
	125	return err;
	126	}
	127
b7e78170 RH	128	static int versatile_pci_probe(struct platform_device *pdev)
	129	{
	130	struct resource *res;
	131	int ret, i, myslot = -1;
	132	u32 val;
	133	void __iomem *local_pci_cfg_base;
	134	struct pci_bus *bus;
	135	LIST_HEAD(pci_res);
	136
	137	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
b7e78170	138	versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
87358169 JZ	139	if (IS_ERR(versatile_pci_base))
87358169 JZ	140	return PTR_ERR(versatile_pci_base);
b7e78170 RH	141
b7e78170 RH	142	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
b7e78170	143	versatile_cfg_base[0] = devm_ioremap_resource(&pdev->dev, res);
87358169 JZ	144	if (IS_ERR(versatile_cfg_base[0]))
87358169 JZ	145	return PTR_ERR(versatile_cfg_base[0]);
b7e78170 RH	146
b7e78170 RH	147	res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
b7e78170	148	versatile_cfg_base[1] = devm_ioremap_resource(&pdev->dev, res);
87358169 JZ	149	if (IS_ERR(versatile_cfg_base[1]))
87358169 JZ	150	return PTR_ERR(versatile_cfg_base[1]);
b7e78170 RH	151
	152	ret = versatile_pci_parse_request_of_pci_ranges(&pdev->dev, &pci_res);
	153	if (ret)
	154	return ret;
	155
	156	/*
	157	* We need to discover the PCI core first to configure itself
	158	* before the main PCI probing is performed
	159	*/
	160	for (i = 0; i < 32; i++) {
	161	if ((readl(versatile_cfg_base[0] + (i << 11) + PCI_VENDOR_ID) == VP_PCI_DEVICE_ID) &&
	162	(readl(versatile_cfg_base[0] + (i << 11) + PCI_CLASS_REVISION) == VP_PCI_CLASS_ID)) {
	163	myslot = i;
	164	break;
	165	}
	166	}
	167	if (myslot == -1) {
	168	dev_err(&pdev->dev, "Cannot find PCI core!\n");
	169	return -EIO;
	170	}
	171	/*
	172	* Do not to map Versatile FPGA PCI device into memory space
	173	*/
	174	pci_slot_ignore \|= (1 << myslot);
	175
	176	dev_info(&pdev->dev, "PCI core found (slot %d)\n", myslot);
	177
	178	writel(myslot, PCI_SELFID);
	179	local_pci_cfg_base = versatile_cfg_base[1] + (myslot << 11);
	180
	181	val = readl(local_pci_cfg_base + PCI_COMMAND);
	182	val \|= PCI_COMMAND_MEMORY \| PCI_COMMAND_MASTER \| PCI_COMMAND_INVALIDATE;
	183	writel(val, local_pci_cfg_base + PCI_COMMAND);
	184
	185	/*
	186	* Configure the PCI inbound memory windows to be 1:1 mapped to SDRAM
	187	*/
	188	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_0);
	189	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_1);
	190	writel(PHYS_OFFSET, local_pci_cfg_base + PCI_BASE_ADDRESS_2);
	191
	192	/*
	193	* For many years the kernel and QEMU were symbiotically buggy
	194	* in that they both assumed the same broken IRQ mapping.
	195	* QEMU therefore attempts to auto-detect old broken kernels
	196	* so that they still work on newer QEMU as they did on old
	197	* QEMU. Since we now use the correct (ie matching-hardware)
	198	* IRQ mapping we write a definitely different value to a
	199	* PCI_INTERRUPT_LINE register to tell QEMU that we expect
	200	* real hardware behaviour and it need not be backwards
	201	* compatible for us. This write is harmless on real hardware.
	202	*/
	203	writel(0, versatile_cfg_base[0] + PCI_INTERRUPT_LINE);
	204
	205	pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
	206	pci_add_flags(PCI_REASSIGN_ALL_BUS \| PCI_REASSIGN_ALL_RSRC);
	207
a574795b	208	bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, NULL, &pci_res);
b7e78170 RH	209	if (!bus)
	210	return -ENOMEM;
	211
	212	pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
	213	pci_assign_unassigned_bus_resources(bus);
b97ea289	214	pci_bus_add_devices(bus);
b7e78170 RH	215
	216	return 0;
	217	}
	218
	219	static const struct of_device_id versatile_pci_of_match[] = {
	220	{ .compatible = "arm,versatile-pci", },
	221	{ },
	222	};
	223	MODULE_DEVICE_TABLE(of, versatile_pci_of_match);
	224
	225	static struct platform_driver versatile_pci_driver = {
	226	.driver = {
	227	.name = "versatile-pci",
	228	.of_match_table = versatile_pci_of_match,
	229	},
	230	.probe = versatile_pci_probe,
	231	};
	232	module_platform_driver(versatile_pci_driver);
	233
	234	MODULE_DESCRIPTION("Versatile PCI driver");
	235	MODULE_LICENSE("GPL v2");