Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * IBM Hot Plug Controller Driver | |
f7625980 | 3 | * |
1da177e4 | 4 | * Written By: Irene Zubarev, IBM Corporation |
f7625980 | 5 | * |
1da177e4 LT |
6 | * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com) |
7 | * Copyright (C) 2001,2002 IBM Corp. | |
8 | * | |
9 | * All rights reserved. | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or (at | |
14 | * your option) any later version. | |
15 | * | |
16 | * This program is distributed in the hope that it will be useful, but | |
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | |
19 | * NON INFRINGEMENT. See the GNU General Public License for more | |
20 | * details. | |
21 | * | |
22 | * You should have received a copy of the GNU General Public License | |
23 | * along with this program; if not, write to the Free Software | |
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | * | |
26 | * Send feedback to <gregkh@us.ibm.com> | |
27 | * | |
28 | */ | |
29 | ||
30 | #include <linux/module.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/pci.h> | |
33 | #include <linux/list.h> | |
34 | #include "ibmphp.h" | |
35 | ||
36 | ||
37 | static int configure_device(struct pci_func *); | |
38 | static int configure_bridge(struct pci_func **, u8); | |
39 | static struct res_needed *scan_behind_bridge(struct pci_func *, u8); | |
ff3ce480 BS |
40 | static int add_new_bus(struct bus_node *, struct resource_node *, struct resource_node *, struct resource_node *, u8); |
41 | static u8 find_sec_number(u8 primary_busno, u8 slotno); | |
1da177e4 LT |
42 | |
43 | /* | |
44 | * NOTE..... If BIOS doesn't provide default routing, we assign: | |
f7625980 | 45 | * 9 for SCSI, 10 for LAN adapters, and 11 for everything else. |
1da177e4 LT |
46 | * If adapter is bridged, then we assign 11 to it and devices behind it. |
47 | * We also assign the same irq numbers for multi function devices. | |
48 | * These are PIC mode, so shouldn't matter n.e.ways (hopefully) | |
49 | */ | |
ff3ce480 | 50 | static void assign_alt_irq(struct pci_func *cur_func, u8 class_code) |
1da177e4 LT |
51 | { |
52 | int j; | |
53 | for (j = 0; j < 4; j++) { | |
54 | if (cur_func->irq[j] == 0xff) { | |
55 | switch (class_code) { | |
56 | case PCI_BASE_CLASS_STORAGE: | |
57 | cur_func->irq[j] = SCSI_IRQ; | |
58 | break; | |
59 | case PCI_BASE_CLASS_NETWORK: | |
60 | cur_func->irq[j] = LAN_IRQ; | |
61 | break; | |
62 | default: | |
63 | cur_func->irq[j] = OTHER_IRQ; | |
64 | break; | |
65 | } | |
66 | } | |
67 | } | |
68 | } | |
69 | ||
70 | /* | |
71 | * Configures the device to be added (will allocate needed resources if it | |
72 | * can), the device can be a bridge or a regular pci device, can also be | |
73 | * multi-functional | |
f7625980 | 74 | * |
1da177e4 | 75 | * Input: function to be added |
f7625980 | 76 | * |
1da177e4 | 77 | * TO DO: The error case with Multifunction device or multi function bridge, |
f7625980 | 78 | * if there is an error, will need to go through all previous functions and |
1da177e4 LT |
79 | * unconfigure....or can add some code into unconfigure_card.... |
80 | */ | |
ff3ce480 | 81 | int ibmphp_configure_card(struct pci_func *func, u8 slotno) |
1da177e4 LT |
82 | { |
83 | u16 vendor_id; | |
84 | u32 class; | |
85 | u8 class_code; | |
86 | u8 hdr_type, device, sec_number; | |
87 | u8 function; | |
88 | struct pci_func *newfunc; /* for multi devices */ | |
89 | struct pci_func *cur_func, *prev_func; | |
90 | int rc, i, j; | |
91 | int cleanup_count; | |
92 | u8 flag; | |
93 | u8 valid_device = 0x00; /* to see if we are able to read from card any device info at all */ | |
94 | ||
ff3ce480 | 95 | debug("inside configure_card, func->busno = %x\n", func->busno); |
1da177e4 LT |
96 | |
97 | device = func->device; | |
98 | cur_func = func; | |
99 | ||
100 | /* We only get bus and device from IRQ routing table. So at this point, | |
f7625980 | 101 | * func->busno is correct, and func->device contains only device (at the 5 |
1da177e4 LT |
102 | * highest bits) |
103 | */ | |
104 | ||
105 | /* For every function on the card */ | |
106 | for (function = 0x00; function < 0x08; function++) { | |
107 | unsigned int devfn = PCI_DEVFN(device, function); | |
108 | ibmphp_pci_bus->number = cur_func->busno; | |
109 | ||
110 | cur_func->function = function; | |
111 | ||
ff3ce480 | 112 | debug("inside the loop, cur_func->busno = %x, cur_func->device = %x, cur_func->function = %x\n", |
1da177e4 LT |
113 | cur_func->busno, cur_func->device, cur_func->function); |
114 | ||
ff3ce480 | 115 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); |
1da177e4 | 116 | |
ff3ce480 | 117 | debug("vendor_id is %x\n", vendor_id); |
1da177e4 LT |
118 | if (vendor_id != PCI_VENDOR_ID_NOTVALID) { |
119 | /* found correct device!!! */ | |
ff3ce480 | 120 | debug("found valid device, vendor_id = %x\n", vendor_id); |
1da177e4 LT |
121 | |
122 | ++valid_device; | |
123 | ||
124 | /* header: x x x x x x x x | |
125 | * | |___________|=> 1=PPB bridge, 0=normal device, 2=CardBus Bridge | |
126 | * |_=> 0 = single function device, 1 = multi-function device | |
127 | */ | |
128 | ||
ff3ce480 BS |
129 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); |
130 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); | |
1da177e4 LT |
131 | |
132 | class_code = class >> 24; | |
ff3ce480 | 133 | debug("hrd_type = %x, class = %x, class_code %x\n", hdr_type, class, class_code); |
1da177e4 LT |
134 | class >>= 8; /* to take revision out, class = class.subclass.prog i/f */ |
135 | if (class == PCI_CLASS_NOT_DEFINED_VGA) { | |
ff3ce480 | 136 | err("The device %x is VGA compatible and as is not supported for hot plugging. " |
1da177e4 LT |
137 | "Please choose another device.\n", cur_func->device); |
138 | return -ENODEV; | |
139 | } else if (class == PCI_CLASS_DISPLAY_VGA) { | |
ff3ce480 | 140 | err("The device %x is not supported for hot plugging. Please choose another device.\n", |
227f0647 | 141 | cur_func->device); |
1da177e4 LT |
142 | return -ENODEV; |
143 | } | |
144 | switch (hdr_type) { | |
145 | case PCI_HEADER_TYPE_NORMAL: | |
ff3ce480 BS |
146 | debug("single device case.... vendor id = %x, hdr_type = %x, class = %x\n", vendor_id, hdr_type, class); |
147 | assign_alt_irq(cur_func, class_code); | |
79e50e72 QL |
148 | rc = configure_device(cur_func); |
149 | if (rc < 0) { | |
1da177e4 | 150 | /* We need to do this in case some other BARs were properly inserted */ |
ff3ce480 | 151 | err("was not able to configure devfunc %x on bus %x.\n", |
1da177e4 LT |
152 | cur_func->device, cur_func->busno); |
153 | cleanup_count = 6; | |
154 | goto error; | |
f7625980 | 155 | } |
1da177e4 LT |
156 | cur_func->next = NULL; |
157 | function = 0x8; | |
158 | break; | |
159 | case PCI_HEADER_TYPE_MULTIDEVICE: | |
ff3ce480 | 160 | assign_alt_irq(cur_func, class_code); |
79e50e72 QL |
161 | rc = configure_device(cur_func); |
162 | if (rc < 0) { | |
1da177e4 | 163 | /* We need to do this in case some other BARs were properly inserted */ |
ff3ce480 | 164 | err("was not able to configure devfunc %x on bus %x...bailing out\n", |
1da177e4 LT |
165 | cur_func->device, cur_func->busno); |
166 | cleanup_count = 6; | |
167 | goto error; | |
168 | } | |
f5afe806 | 169 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
1da177e4 | 170 | if (!newfunc) { |
ff3ce480 | 171 | err("out of system memory\n"); |
1da177e4 LT |
172 | return -ENOMEM; |
173 | } | |
1da177e4 LT |
174 | newfunc->busno = cur_func->busno; |
175 | newfunc->device = device; | |
176 | cur_func->next = newfunc; | |
177 | cur_func = newfunc; | |
178 | for (j = 0; j < 4; j++) | |
179 | newfunc->irq[j] = cur_func->irq[j]; | |
180 | break; | |
181 | case PCI_HEADER_TYPE_MULTIBRIDGE: | |
182 | class >>= 8; | |
183 | if (class != PCI_CLASS_BRIDGE_PCI) { | |
ff3ce480 | 184 | err("This %x is not PCI-to-PCI bridge, and as is not supported for hot-plugging. Please insert another card.\n", |
227f0647 | 185 | cur_func->device); |
1da177e4 LT |
186 | return -ENODEV; |
187 | } | |
ff3ce480 BS |
188 | assign_alt_irq(cur_func, class_code); |
189 | rc = configure_bridge(&cur_func, slotno); | |
1da177e4 | 190 | if (rc == -ENODEV) { |
ff3ce480 BS |
191 | err("You chose to insert Single Bridge, or nested bridges, this is not supported...\n"); |
192 | err("Bus %x, devfunc %x\n", cur_func->busno, cur_func->device); | |
1da177e4 LT |
193 | return rc; |
194 | } | |
195 | if (rc) { | |
196 | /* We need to do this in case some other BARs were properly inserted */ | |
ff3ce480 | 197 | err("was not able to hot-add PPB properly.\n"); |
1da177e4 LT |
198 | func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ |
199 | cleanup_count = 2; | |
200 | goto error; | |
201 | } | |
202 | ||
ff3ce480 | 203 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); |
dc6712d1 | 204 | flag = 0; |
1da177e4 LT |
205 | for (i = 0; i < 32; i++) { |
206 | if (func->devices[i]) { | |
f5afe806 | 207 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
1da177e4 | 208 | if (!newfunc) { |
ff3ce480 | 209 | err("out of system memory\n"); |
1da177e4 LT |
210 | return -ENOMEM; |
211 | } | |
1da177e4 LT |
212 | newfunc->busno = sec_number; |
213 | newfunc->device = (u8) i; | |
214 | for (j = 0; j < 4; j++) | |
215 | newfunc->irq[j] = cur_func->irq[j]; | |
216 | ||
217 | if (flag) { | |
218 | for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next) ; | |
219 | prev_func->next = newfunc; | |
220 | } else | |
221 | cur_func->next = newfunc; | |
222 | ||
ff3ce480 | 223 | rc = ibmphp_configure_card(newfunc, slotno); |
1da177e4 LT |
224 | /* This could only happen if kmalloc failed */ |
225 | if (rc) { | |
226 | /* We need to do this in case bridge itself got configured properly, but devices behind it failed */ | |
227 | func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ | |
228 | cleanup_count = 2; | |
229 | goto error; | |
230 | } | |
dc6712d1 | 231 | flag = 1; |
1da177e4 LT |
232 | } |
233 | } | |
234 | ||
f5afe806 | 235 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
1da177e4 | 236 | if (!newfunc) { |
ff3ce480 | 237 | err("out of system memory\n"); |
1da177e4 LT |
238 | return -ENOMEM; |
239 | } | |
1da177e4 LT |
240 | newfunc->busno = cur_func->busno; |
241 | newfunc->device = device; | |
242 | for (j = 0; j < 4; j++) | |
243 | newfunc->irq[j] = cur_func->irq[j]; | |
ff3ce480 | 244 | for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next); |
1da177e4 LT |
245 | prev_func->next = newfunc; |
246 | cur_func = newfunc; | |
247 | break; | |
248 | case PCI_HEADER_TYPE_BRIDGE: | |
249 | class >>= 8; | |
ff3ce480 | 250 | debug("class now is %x\n", class); |
1da177e4 | 251 | if (class != PCI_CLASS_BRIDGE_PCI) { |
ff3ce480 | 252 | err("This %x is not PCI-to-PCI bridge, and as is not supported for hot-plugging. Please insert another card.\n", |
227f0647 | 253 | cur_func->device); |
1da177e4 LT |
254 | return -ENODEV; |
255 | } | |
256 | ||
ff3ce480 | 257 | assign_alt_irq(cur_func, class_code); |
1da177e4 | 258 | |
ff3ce480 BS |
259 | debug("cur_func->busno b4 configure_bridge is %x\n", cur_func->busno); |
260 | rc = configure_bridge(&cur_func, slotno); | |
1da177e4 | 261 | if (rc == -ENODEV) { |
ff3ce480 BS |
262 | err("You chose to insert Single Bridge, or nested bridges, this is not supported...\n"); |
263 | err("Bus %x, devfunc %x\n", cur_func->busno, cur_func->device); | |
1da177e4 LT |
264 | return rc; |
265 | } | |
266 | if (rc) { | |
267 | /* We need to do this in case some other BARs were properly inserted */ | |
268 | func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ | |
ff3ce480 | 269 | err("was not able to hot-add PPB properly.\n"); |
1da177e4 LT |
270 | cleanup_count = 2; |
271 | goto error; | |
272 | } | |
ff3ce480 | 273 | debug("cur_func->busno = %x, device = %x, function = %x\n", |
1da177e4 | 274 | cur_func->busno, device, function); |
ff3ce480 BS |
275 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); |
276 | debug("after configuring bridge..., sec_number = %x\n", sec_number); | |
dc6712d1 | 277 | flag = 0; |
1da177e4 LT |
278 | for (i = 0; i < 32; i++) { |
279 | if (func->devices[i]) { | |
ff3ce480 | 280 | debug("inside for loop, device is %x\n", i); |
f5afe806 | 281 | newfunc = kzalloc(sizeof(*newfunc), GFP_KERNEL); |
1da177e4 | 282 | if (!newfunc) { |
ff3ce480 | 283 | err(" out of system memory\n"); |
1da177e4 LT |
284 | return -ENOMEM; |
285 | } | |
1da177e4 LT |
286 | newfunc->busno = sec_number; |
287 | newfunc->device = (u8) i; | |
288 | for (j = 0; j < 4; j++) | |
289 | newfunc->irq[j] = cur_func->irq[j]; | |
290 | ||
291 | if (flag) { | |
ff3ce480 | 292 | for (prev_func = cur_func; prev_func->next; prev_func = prev_func->next); |
1da177e4 LT |
293 | prev_func->next = newfunc; |
294 | } else | |
295 | cur_func->next = newfunc; | |
296 | ||
ff3ce480 | 297 | rc = ibmphp_configure_card(newfunc, slotno); |
1da177e4 LT |
298 | |
299 | /* Again, this case should not happen... For complete paranoia, will need to call remove_bus */ | |
300 | if (rc) { | |
301 | /* We need to do this in case some other BARs were properly inserted */ | |
302 | func->bus = 1; /* To indicate to the unconfigure function that this is a PPB */ | |
303 | cleanup_count = 2; | |
304 | goto error; | |
305 | } | |
dc6712d1 | 306 | flag = 1; |
1da177e4 LT |
307 | } |
308 | } | |
309 | ||
310 | function = 0x8; | |
311 | break; | |
312 | default: | |
ff3ce480 | 313 | err("MAJOR PROBLEM!!!!, header type not supported? %x\n", hdr_type); |
1da177e4 LT |
314 | return -ENXIO; |
315 | break; | |
316 | } /* end of switch */ | |
317 | } /* end of valid device */ | |
318 | } /* end of for */ | |
319 | ||
320 | if (!valid_device) { | |
ff3ce480 | 321 | err("Cannot find any valid devices on the card. Or unable to read from card.\n"); |
1da177e4 LT |
322 | return -ENODEV; |
323 | } | |
324 | ||
325 | return 0; | |
326 | ||
327 | error: | |
328 | for (i = 0; i < cleanup_count; i++) { | |
329 | if (cur_func->io[i]) { | |
ff3ce480 | 330 | ibmphp_remove_resource(cur_func->io[i]); |
1da177e4 LT |
331 | cur_func->io[i] = NULL; |
332 | } else if (cur_func->pfmem[i]) { | |
ff3ce480 | 333 | ibmphp_remove_resource(cur_func->pfmem[i]); |
1da177e4 LT |
334 | cur_func->pfmem[i] = NULL; |
335 | } else if (cur_func->mem[i]) { | |
ff3ce480 | 336 | ibmphp_remove_resource(cur_func->mem[i]); |
1da177e4 LT |
337 | cur_func->mem[i] = NULL; |
338 | } | |
339 | } | |
340 | return rc; | |
341 | } | |
342 | ||
343 | /* | |
f7625980 | 344 | * This function configures the pci BARs of a single device. |
1da177e4 LT |
345 | * Input: pointer to the pci_func |
346 | * Output: configured PCI, 0, or error | |
347 | */ | |
ff3ce480 | 348 | static int configure_device(struct pci_func *func) |
1da177e4 LT |
349 | { |
350 | u32 bar[6]; | |
351 | u32 address[] = { | |
352 | PCI_BASE_ADDRESS_0, | |
353 | PCI_BASE_ADDRESS_1, | |
354 | PCI_BASE_ADDRESS_2, | |
355 | PCI_BASE_ADDRESS_3, | |
356 | PCI_BASE_ADDRESS_4, | |
357 | PCI_BASE_ADDRESS_5, | |
358 | 0 | |
359 | }; | |
360 | u8 irq; | |
361 | int count; | |
362 | int len[6]; | |
363 | struct resource_node *io[6]; | |
364 | struct resource_node *mem[6]; | |
365 | struct resource_node *mem_tmp; | |
366 | struct resource_node *pfmem[6]; | |
367 | unsigned int devfn; | |
368 | ||
ff3ce480 | 369 | debug("%s - inside\n", __func__); |
1da177e4 LT |
370 | |
371 | devfn = PCI_DEVFN(func->device, func->function); | |
372 | ibmphp_pci_bus->number = func->busno; | |
373 | ||
374 | for (count = 0; address[count]; count++) { /* for 6 BARs */ | |
375 | ||
f7625980 | 376 | /* not sure if i need this. per scott, said maybe need * something like this |
1da177e4 LT |
377 | if devices don't adhere 100% to the spec, so don't want to write |
378 | to the reserved bits | |
379 | ||
f7625980 | 380 | pcibios_read_config_byte(cur_func->busno, cur_func->device, |
1da177e4 LT |
381 | PCI_BASE_ADDRESS_0 + 4 * count, &tmp); |
382 | if (tmp & 0x01) // IO | |
f7625980 | 383 | pcibios_write_config_dword(cur_func->busno, cur_func->device, |
1da177e4 LT |
384 | PCI_BASE_ADDRESS_0 + 4 * count, 0xFFFFFFFD); |
385 | else // Memory | |
f7625980 | 386 | pcibios_write_config_dword(cur_func->busno, cur_func->device, |
1da177e4 LT |
387 | PCI_BASE_ADDRESS_0 + 4 * count, 0xFFFFFFFF); |
388 | */ | |
ff3ce480 BS |
389 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); |
390 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
1da177e4 LT |
391 | |
392 | if (!bar[count]) /* This BAR is not implemented */ | |
393 | continue; | |
394 | ||
ff3ce480 | 395 | debug("Device %x BAR %d wants %x\n", func->device, count, bar[count]); |
1da177e4 LT |
396 | |
397 | if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) { | |
398 | /* This is IO */ | |
ff3ce480 | 399 | debug("inside IO SPACE\n"); |
1da177e4 LT |
400 | |
401 | len[count] = bar[count] & 0xFFFFFFFC; | |
402 | len[count] = ~len[count] + 1; | |
403 | ||
ff3ce480 | 404 | debug("len[count] in IO %x, count %d\n", len[count], count); |
1da177e4 | 405 | |
f5afe806 | 406 | io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1da177e4 LT |
407 | |
408 | if (!io[count]) { | |
ff3ce480 | 409 | err("out of system memory\n"); |
1da177e4 LT |
410 | return -ENOMEM; |
411 | } | |
1da177e4 LT |
412 | io[count]->type = IO; |
413 | io[count]->busno = func->busno; | |
414 | io[count]->devfunc = PCI_DEVFN(func->device, func->function); | |
415 | io[count]->len = len[count]; | |
416 | if (ibmphp_check_resource(io[count], 0) == 0) { | |
ff3ce480 | 417 | ibmphp_add_resource(io[count]); |
1da177e4 LT |
418 | func->io[count] = io[count]; |
419 | } else { | |
ff3ce480 | 420 | err("cannot allocate requested io for bus %x device %x function %x len %x\n", |
1da177e4 | 421 | func->busno, func->device, func->function, len[count]); |
ff3ce480 | 422 | kfree(io[count]); |
1da177e4 LT |
423 | return -EIO; |
424 | } | |
ff3ce480 | 425 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->io[count]->start); |
f7625980 BH |
426 | |
427 | /* _______________This is for debugging purposes only_____________________ */ | |
ff3ce480 BS |
428 | debug("b4 writing, the IO address is %x\n", func->io[count]->start); |
429 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
430 | debug("after writing.... the start address is %x\n", bar[count]); | |
1da177e4 LT |
431 | /* _________________________________________________________________________*/ |
432 | ||
433 | } else { | |
434 | /* This is Memory */ | |
435 | if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) { | |
436 | /* pfmem */ | |
ff3ce480 | 437 | debug("PFMEM SPACE\n"); |
1da177e4 LT |
438 | |
439 | len[count] = bar[count] & 0xFFFFFFF0; | |
440 | len[count] = ~len[count] + 1; | |
441 | ||
ff3ce480 | 442 | debug("len[count] in PFMEM %x, count %d\n", len[count], count); |
1da177e4 | 443 | |
f5afe806 | 444 | pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1da177e4 | 445 | if (!pfmem[count]) { |
ff3ce480 | 446 | err("out of system memory\n"); |
1da177e4 LT |
447 | return -ENOMEM; |
448 | } | |
1da177e4 LT |
449 | pfmem[count]->type = PFMEM; |
450 | pfmem[count]->busno = func->busno; | |
451 | pfmem[count]->devfunc = PCI_DEVFN(func->device, | |
452 | func->function); | |
453 | pfmem[count]->len = len[count]; | |
dc6712d1 | 454 | pfmem[count]->fromMem = 0; |
ff3ce480 BS |
455 | if (ibmphp_check_resource(pfmem[count], 0) == 0) { |
456 | ibmphp_add_resource(pfmem[count]); | |
1da177e4 LT |
457 | func->pfmem[count] = pfmem[count]; |
458 | } else { | |
f5afe806 | 459 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
1da177e4 | 460 | if (!mem_tmp) { |
ff3ce480 BS |
461 | err("out of system memory\n"); |
462 | kfree(pfmem[count]); | |
1da177e4 LT |
463 | return -ENOMEM; |
464 | } | |
1da177e4 LT |
465 | mem_tmp->type = MEM; |
466 | mem_tmp->busno = pfmem[count]->busno; | |
467 | mem_tmp->devfunc = pfmem[count]->devfunc; | |
468 | mem_tmp->len = pfmem[count]->len; | |
ff3ce480 BS |
469 | debug("there's no pfmem... going into mem.\n"); |
470 | if (ibmphp_check_resource(mem_tmp, 0) == 0) { | |
471 | ibmphp_add_resource(mem_tmp); | |
dc6712d1 | 472 | pfmem[count]->fromMem = 1; |
1da177e4 LT |
473 | pfmem[count]->rangeno = mem_tmp->rangeno; |
474 | pfmem[count]->start = mem_tmp->start; | |
475 | pfmem[count]->end = mem_tmp->end; | |
ff3ce480 | 476 | ibmphp_add_pfmem_from_mem(pfmem[count]); |
1da177e4 LT |
477 | func->pfmem[count] = pfmem[count]; |
478 | } else { | |
ff3ce480 | 479 | err("cannot allocate requested pfmem for bus %x, device %x, len %x\n", |
1da177e4 | 480 | func->busno, func->device, len[count]); |
ff3ce480 BS |
481 | kfree(mem_tmp); |
482 | kfree(pfmem[count]); | |
1da177e4 LT |
483 | return -EIO; |
484 | } | |
485 | } | |
486 | ||
ff3ce480 | 487 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start); |
1da177e4 | 488 | |
f7625980 | 489 | /*_______________This is for debugging purposes only______________________________*/ |
ff3ce480 BS |
490 | debug("b4 writing, start address is %x\n", func->pfmem[count]->start); |
491 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
492 | debug("after writing, start address is %x\n", bar[count]); | |
1da177e4 LT |
493 | /*_________________________________________________________________________________*/ |
494 | ||
495 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { /* takes up another dword */ | |
ff3ce480 | 496 | debug("inside the mem 64 case, count %d\n", count); |
1da177e4 LT |
497 | count += 1; |
498 | /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ | |
ff3ce480 | 499 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000); |
1da177e4 LT |
500 | } |
501 | } else { | |
502 | /* regular memory */ | |
ff3ce480 | 503 | debug("REGULAR MEM SPACE\n"); |
1da177e4 LT |
504 | |
505 | len[count] = bar[count] & 0xFFFFFFF0; | |
506 | len[count] = ~len[count] + 1; | |
507 | ||
ff3ce480 | 508 | debug("len[count] in Mem %x, count %d\n", len[count], count); |
1da177e4 | 509 | |
f5afe806 | 510 | mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1da177e4 | 511 | if (!mem[count]) { |
ff3ce480 | 512 | err("out of system memory\n"); |
1da177e4 LT |
513 | return -ENOMEM; |
514 | } | |
1da177e4 LT |
515 | mem[count]->type = MEM; |
516 | mem[count]->busno = func->busno; | |
517 | mem[count]->devfunc = PCI_DEVFN(func->device, | |
518 | func->function); | |
519 | mem[count]->len = len[count]; | |
ff3ce480 BS |
520 | if (ibmphp_check_resource(mem[count], 0) == 0) { |
521 | ibmphp_add_resource(mem[count]); | |
1da177e4 LT |
522 | func->mem[count] = mem[count]; |
523 | } else { | |
ff3ce480 | 524 | err("cannot allocate requested mem for bus %x, device %x, len %x\n", |
1da177e4 | 525 | func->busno, func->device, len[count]); |
ff3ce480 | 526 | kfree(mem[count]); |
1da177e4 LT |
527 | return -EIO; |
528 | } | |
ff3ce480 | 529 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->mem[count]->start); |
1da177e4 | 530 | /* _______________________This is for debugging purposes only _______________________*/ |
ff3ce480 BS |
531 | debug("b4 writing, start address is %x\n", func->mem[count]->start); |
532 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
533 | debug("after writing, the address is %x\n", bar[count]); | |
1da177e4 LT |
534 | /* __________________________________________________________________________________*/ |
535 | ||
536 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
537 | /* takes up another dword */ | |
ff3ce480 | 538 | debug("inside mem 64 case, reg. mem, count %d\n", count); |
1da177e4 LT |
539 | count += 1; |
540 | /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ | |
ff3ce480 | 541 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000); |
1da177e4 LT |
542 | } |
543 | } | |
544 | } /* end of mem */ | |
545 | } /* end of for */ | |
546 | ||
547 | func->bus = 0; /* To indicate that this is not a PPB */ | |
ff3ce480 | 548 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq); |
1da177e4 | 549 | if ((irq > 0x00) && (irq < 0x05)) |
ff3ce480 | 550 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]); |
1da177e4 | 551 | |
ff3ce480 BS |
552 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE); |
553 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY); | |
1da177e4 | 554 | |
ff3ce480 BS |
555 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_ROM_ADDRESS, 0x00L); |
556 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE); | |
1da177e4 LT |
557 | |
558 | return 0; | |
559 | } | |
560 | ||
561 | /****************************************************************************** | |
562 | * This routine configures a PCI-2-PCI bridge and the functions behind it | |
563 | * Parameters: pci_func | |
f7625980 | 564 | * Returns: |
1da177e4 | 565 | ******************************************************************************/ |
ff3ce480 | 566 | static int configure_bridge(struct pci_func **func_passed, u8 slotno) |
1da177e4 LT |
567 | { |
568 | int count; | |
569 | int i; | |
570 | int rc; | |
571 | u8 sec_number; | |
572 | u8 io_base; | |
573 | u16 pfmem_base; | |
574 | u32 bar[2]; | |
575 | u32 len[2]; | |
dc6712d1 KA |
576 | u8 flag_io = 0; |
577 | u8 flag_mem = 0; | |
578 | u8 flag_pfmem = 0; | |
579 | u8 need_io_upper = 0; | |
580 | u8 need_pfmem_upper = 0; | |
1da177e4 LT |
581 | struct res_needed *amount_needed = NULL; |
582 | struct resource_node *io = NULL; | |
583 | struct resource_node *bus_io[2] = {NULL, NULL}; | |
584 | struct resource_node *mem = NULL; | |
585 | struct resource_node *bus_mem[2] = {NULL, NULL}; | |
586 | struct resource_node *mem_tmp = NULL; | |
587 | struct resource_node *pfmem = NULL; | |
588 | struct resource_node *bus_pfmem[2] = {NULL, NULL}; | |
589 | struct bus_node *bus; | |
590 | u32 address[] = { | |
591 | PCI_BASE_ADDRESS_0, | |
592 | PCI_BASE_ADDRESS_1, | |
593 | 0 | |
594 | }; | |
595 | struct pci_func *func = *func_passed; | |
596 | unsigned int devfn; | |
597 | u8 irq; | |
598 | int retval; | |
599 | ||
ff3ce480 | 600 | debug("%s - enter\n", __func__); |
1da177e4 LT |
601 | |
602 | devfn = PCI_DEVFN(func->function, func->device); | |
603 | ibmphp_pci_bus->number = func->busno; | |
604 | ||
605 | /* Configuring necessary info for the bridge so that we could see the devices | |
606 | * behind it | |
607 | */ | |
608 | ||
ff3ce480 | 609 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, func->busno); |
1da177e4 LT |
610 | |
611 | /* _____________________For debugging purposes only __________________________ | |
ff3ce480 BS |
612 | pci_bus_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number); |
613 | debug("primary # written into the bridge is %x\n", pri_number); | |
1da177e4 LT |
614 | ___________________________________________________________________________*/ |
615 | ||
616 | /* in EBDA, only get allocated 1 additional bus # per slot */ | |
ff3ce480 | 617 | sec_number = find_sec_number(func->busno, slotno); |
1da177e4 | 618 | if (sec_number == 0xff) { |
ff3ce480 | 619 | err("cannot allocate secondary bus number for the bridged device\n"); |
1da177e4 LT |
620 | return -EINVAL; |
621 | } | |
622 | ||
ff3ce480 BS |
623 | debug("after find_sec_number, the number we got is %x\n", sec_number); |
624 | debug("AFTER FIND_SEC_NUMBER, func->busno IS %x\n", func->busno); | |
1da177e4 | 625 | |
ff3ce480 | 626 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, sec_number); |
f7625980 | 627 | |
1da177e4 | 628 | /* __________________For debugging purposes only __________________________________ |
ff3ce480 BS |
629 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); |
630 | debug("sec_number after write/read is %x\n", sec_number); | |
1da177e4 LT |
631 | ________________________________________________________________________________*/ |
632 | ||
ff3ce480 | 633 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, sec_number); |
1da177e4 LT |
634 | |
635 | /* __________________For debugging purposes only ____________________________________ | |
ff3ce480 BS |
636 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sec_number); |
637 | debug("subordinate number after write/read is %x\n", sec_number); | |
1da177e4 LT |
638 | __________________________________________________________________________________*/ |
639 | ||
ff3ce480 BS |
640 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE); |
641 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY); | |
642 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_SEC_LATENCY_TIMER, LATENCY); | |
1da177e4 | 643 | |
ff3ce480 BS |
644 | debug("func->busno is %x\n", func->busno); |
645 | debug("sec_number after writing is %x\n", sec_number); | |
1da177e4 LT |
646 | |
647 | ||
648 | /* !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
f7625980 | 649 | !!!!!!!!!!!!!!!NEED TO ADD!!! FAST BACK-TO-BACK ENABLE!!!!!!!!!!!!!!!!!!!! |
1da177e4 LT |
650 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!*/ |
651 | ||
652 | ||
653 | /* First we need to allocate mem/io for the bridge itself in case it needs it */ | |
654 | for (count = 0; address[count]; count++) { /* for 2 BARs */ | |
ff3ce480 BS |
655 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); |
656 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
1da177e4 LT |
657 | |
658 | if (!bar[count]) { | |
659 | /* This BAR is not implemented */ | |
ff3ce480 | 660 | debug("so we come here then, eh?, count = %d\n", count); |
1da177e4 LT |
661 | continue; |
662 | } | |
663 | // tmp_bar = bar[count]; | |
664 | ||
ff3ce480 | 665 | debug("Bar %d wants %x\n", count, bar[count]); |
1da177e4 LT |
666 | |
667 | if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) { | |
668 | /* This is IO */ | |
669 | len[count] = bar[count] & 0xFFFFFFFC; | |
670 | len[count] = ~len[count] + 1; | |
671 | ||
ff3ce480 | 672 | debug("len[count] in IO = %x\n", len[count]); |
1da177e4 | 673 | |
f5afe806 | 674 | bus_io[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
f7625980 | 675 | |
1da177e4 | 676 | if (!bus_io[count]) { |
ff3ce480 | 677 | err("out of system memory\n"); |
1da177e4 LT |
678 | retval = -ENOMEM; |
679 | goto error; | |
680 | } | |
1da177e4 LT |
681 | bus_io[count]->type = IO; |
682 | bus_io[count]->busno = func->busno; | |
683 | bus_io[count]->devfunc = PCI_DEVFN(func->device, | |
684 | func->function); | |
685 | bus_io[count]->len = len[count]; | |
ff3ce480 BS |
686 | if (ibmphp_check_resource(bus_io[count], 0) == 0) { |
687 | ibmphp_add_resource(bus_io[count]); | |
1da177e4 LT |
688 | func->io[count] = bus_io[count]; |
689 | } else { | |
ff3ce480 | 690 | err("cannot allocate requested io for bus %x, device %x, len %x\n", |
1da177e4 | 691 | func->busno, func->device, len[count]); |
ff3ce480 | 692 | kfree(bus_io[count]); |
1da177e4 LT |
693 | return -EIO; |
694 | } | |
695 | ||
ff3ce480 | 696 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->io[count]->start); |
1da177e4 LT |
697 | |
698 | } else { | |
699 | /* This is Memory */ | |
700 | if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) { | |
701 | /* pfmem */ | |
702 | len[count] = bar[count] & 0xFFFFFFF0; | |
703 | len[count] = ~len[count] + 1; | |
704 | ||
ff3ce480 | 705 | debug("len[count] in PFMEM = %x\n", len[count]); |
1da177e4 | 706 | |
f5afe806 | 707 | bus_pfmem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1da177e4 | 708 | if (!bus_pfmem[count]) { |
ff3ce480 | 709 | err("out of system memory\n"); |
1da177e4 LT |
710 | retval = -ENOMEM; |
711 | goto error; | |
712 | } | |
1da177e4 LT |
713 | bus_pfmem[count]->type = PFMEM; |
714 | bus_pfmem[count]->busno = func->busno; | |
715 | bus_pfmem[count]->devfunc = PCI_DEVFN(func->device, | |
716 | func->function); | |
717 | bus_pfmem[count]->len = len[count]; | |
dc6712d1 | 718 | bus_pfmem[count]->fromMem = 0; |
ff3ce480 BS |
719 | if (ibmphp_check_resource(bus_pfmem[count], 0) == 0) { |
720 | ibmphp_add_resource(bus_pfmem[count]); | |
1da177e4 LT |
721 | func->pfmem[count] = bus_pfmem[count]; |
722 | } else { | |
f5afe806 | 723 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
1da177e4 | 724 | if (!mem_tmp) { |
ff3ce480 | 725 | err("out of system memory\n"); |
1da177e4 LT |
726 | retval = -ENOMEM; |
727 | goto error; | |
728 | } | |
1da177e4 LT |
729 | mem_tmp->type = MEM; |
730 | mem_tmp->busno = bus_pfmem[count]->busno; | |
731 | mem_tmp->devfunc = bus_pfmem[count]->devfunc; | |
732 | mem_tmp->len = bus_pfmem[count]->len; | |
ff3ce480 BS |
733 | if (ibmphp_check_resource(mem_tmp, 0) == 0) { |
734 | ibmphp_add_resource(mem_tmp); | |
dc6712d1 | 735 | bus_pfmem[count]->fromMem = 1; |
1da177e4 | 736 | bus_pfmem[count]->rangeno = mem_tmp->rangeno; |
ff3ce480 | 737 | ibmphp_add_pfmem_from_mem(bus_pfmem[count]); |
1da177e4 LT |
738 | func->pfmem[count] = bus_pfmem[count]; |
739 | } else { | |
ff3ce480 | 740 | err("cannot allocate requested pfmem for bus %x, device %x, len %x\n", |
1da177e4 | 741 | func->busno, func->device, len[count]); |
ff3ce480 BS |
742 | kfree(mem_tmp); |
743 | kfree(bus_pfmem[count]); | |
1da177e4 LT |
744 | return -EIO; |
745 | } | |
746 | } | |
747 | ||
ff3ce480 | 748 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start); |
1da177e4 LT |
749 | |
750 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
751 | /* takes up another dword */ | |
752 | count += 1; | |
753 | /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ | |
ff3ce480 | 754 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000); |
1da177e4 LT |
755 | |
756 | } | |
757 | } else { | |
758 | /* regular memory */ | |
759 | len[count] = bar[count] & 0xFFFFFFF0; | |
760 | len[count] = ~len[count] + 1; | |
761 | ||
ff3ce480 | 762 | debug("len[count] in Memory is %x\n", len[count]); |
1da177e4 | 763 | |
f5afe806 | 764 | bus_mem[count] = kzalloc(sizeof(struct resource_node), GFP_KERNEL); |
1da177e4 | 765 | if (!bus_mem[count]) { |
ff3ce480 | 766 | err("out of system memory\n"); |
1da177e4 LT |
767 | retval = -ENOMEM; |
768 | goto error; | |
769 | } | |
1da177e4 LT |
770 | bus_mem[count]->type = MEM; |
771 | bus_mem[count]->busno = func->busno; | |
772 | bus_mem[count]->devfunc = PCI_DEVFN(func->device, | |
773 | func->function); | |
774 | bus_mem[count]->len = len[count]; | |
ff3ce480 BS |
775 | if (ibmphp_check_resource(bus_mem[count], 0) == 0) { |
776 | ibmphp_add_resource(bus_mem[count]); | |
1da177e4 LT |
777 | func->mem[count] = bus_mem[count]; |
778 | } else { | |
ff3ce480 | 779 | err("cannot allocate requested mem for bus %x, device %x, len %x\n", |
1da177e4 | 780 | func->busno, func->device, len[count]); |
ff3ce480 | 781 | kfree(bus_mem[count]); |
1da177e4 LT |
782 | return -EIO; |
783 | } | |
784 | ||
ff3ce480 | 785 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], func->mem[count]->start); |
1da177e4 LT |
786 | |
787 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
788 | /* takes up another dword */ | |
789 | count += 1; | |
790 | /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ | |
ff3ce480 | 791 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0x00000000); |
1da177e4 LT |
792 | |
793 | } | |
794 | } | |
795 | } /* end of mem */ | |
796 | } /* end of for */ | |
797 | ||
798 | /* Now need to see how much space the devices behind the bridge needed */ | |
ff3ce480 | 799 | amount_needed = scan_behind_bridge(func, sec_number); |
1da177e4 LT |
800 | if (amount_needed == NULL) |
801 | return -ENOMEM; | |
802 | ||
803 | ibmphp_pci_bus->number = func->busno; | |
ff3ce480 BS |
804 | debug("after coming back from scan_behind_bridge\n"); |
805 | debug("amount_needed->not_correct = %x\n", amount_needed->not_correct); | |
806 | debug("amount_needed->io = %x\n", amount_needed->io); | |
807 | debug("amount_needed->mem = %x\n", amount_needed->mem); | |
808 | debug("amount_needed->pfmem = %x\n", amount_needed->pfmem); | |
1da177e4 | 809 | |
f7625980 | 810 | if (amount_needed->not_correct) { |
ff3ce480 | 811 | debug("amount_needed is not correct\n"); |
1da177e4 LT |
812 | for (count = 0; address[count]; count++) { |
813 | /* for 2 BARs */ | |
814 | if (bus_io[count]) { | |
ff3ce480 | 815 | ibmphp_remove_resource(bus_io[count]); |
1da177e4 LT |
816 | func->io[count] = NULL; |
817 | } else if (bus_pfmem[count]) { | |
ff3ce480 | 818 | ibmphp_remove_resource(bus_pfmem[count]); |
1da177e4 LT |
819 | func->pfmem[count] = NULL; |
820 | } else if (bus_mem[count]) { | |
ff3ce480 | 821 | ibmphp_remove_resource(bus_mem[count]); |
1da177e4 LT |
822 | func->mem[count] = NULL; |
823 | } | |
824 | } | |
ff3ce480 | 825 | kfree(amount_needed); |
1da177e4 LT |
826 | return -ENODEV; |
827 | } | |
828 | ||
829 | if (!amount_needed->io) { | |
ff3ce480 | 830 | debug("it doesn't want IO?\n"); |
dc6712d1 | 831 | flag_io = 1; |
1da177e4 | 832 | } else { |
ff3ce480 | 833 | debug("it wants %x IO behind the bridge\n", amount_needed->io); |
f5afe806 | 834 | io = kzalloc(sizeof(*io), GFP_KERNEL); |
f7625980 | 835 | |
1da177e4 | 836 | if (!io) { |
ff3ce480 | 837 | err("out of system memory\n"); |
1da177e4 LT |
838 | retval = -ENOMEM; |
839 | goto error; | |
840 | } | |
1da177e4 LT |
841 | io->type = IO; |
842 | io->busno = func->busno; | |
843 | io->devfunc = PCI_DEVFN(func->device, func->function); | |
844 | io->len = amount_needed->io; | |
ff3ce480 BS |
845 | if (ibmphp_check_resource(io, 1) == 0) { |
846 | debug("were we able to add io\n"); | |
847 | ibmphp_add_resource(io); | |
dc6712d1 | 848 | flag_io = 1; |
1da177e4 LT |
849 | } |
850 | } | |
851 | ||
852 | if (!amount_needed->mem) { | |
ff3ce480 | 853 | debug("it doesn't want n.e.memory?\n"); |
dc6712d1 | 854 | flag_mem = 1; |
1da177e4 | 855 | } else { |
ff3ce480 | 856 | debug("it wants %x memory behind the bridge\n", amount_needed->mem); |
f5afe806 | 857 | mem = kzalloc(sizeof(*mem), GFP_KERNEL); |
1da177e4 | 858 | if (!mem) { |
ff3ce480 | 859 | err("out of system memory\n"); |
1da177e4 LT |
860 | retval = -ENOMEM; |
861 | goto error; | |
862 | } | |
1da177e4 LT |
863 | mem->type = MEM; |
864 | mem->busno = func->busno; | |
865 | mem->devfunc = PCI_DEVFN(func->device, func->function); | |
866 | mem->len = amount_needed->mem; | |
ff3ce480 BS |
867 | if (ibmphp_check_resource(mem, 1) == 0) { |
868 | ibmphp_add_resource(mem); | |
dc6712d1 | 869 | flag_mem = 1; |
ff3ce480 | 870 | debug("were we able to add mem\n"); |
1da177e4 LT |
871 | } |
872 | } | |
873 | ||
874 | if (!amount_needed->pfmem) { | |
ff3ce480 | 875 | debug("it doesn't want n.e.pfmem mem?\n"); |
dc6712d1 | 876 | flag_pfmem = 1; |
1da177e4 | 877 | } else { |
ff3ce480 | 878 | debug("it wants %x pfmemory behind the bridge\n", amount_needed->pfmem); |
f5afe806 | 879 | pfmem = kzalloc(sizeof(*pfmem), GFP_KERNEL); |
1da177e4 | 880 | if (!pfmem) { |
ff3ce480 | 881 | err("out of system memory\n"); |
1da177e4 LT |
882 | retval = -ENOMEM; |
883 | goto error; | |
884 | } | |
1da177e4 LT |
885 | pfmem->type = PFMEM; |
886 | pfmem->busno = func->busno; | |
887 | pfmem->devfunc = PCI_DEVFN(func->device, func->function); | |
888 | pfmem->len = amount_needed->pfmem; | |
dc6712d1 | 889 | pfmem->fromMem = 0; |
ff3ce480 BS |
890 | if (ibmphp_check_resource(pfmem, 1) == 0) { |
891 | ibmphp_add_resource(pfmem); | |
dc6712d1 | 892 | flag_pfmem = 1; |
1da177e4 | 893 | } else { |
f5afe806 | 894 | mem_tmp = kzalloc(sizeof(*mem_tmp), GFP_KERNEL); |
1da177e4 | 895 | if (!mem_tmp) { |
ff3ce480 | 896 | err("out of system memory\n"); |
1da177e4 LT |
897 | retval = -ENOMEM; |
898 | goto error; | |
899 | } | |
1da177e4 LT |
900 | mem_tmp->type = MEM; |
901 | mem_tmp->busno = pfmem->busno; | |
902 | mem_tmp->devfunc = pfmem->devfunc; | |
903 | mem_tmp->len = pfmem->len; | |
ff3ce480 BS |
904 | if (ibmphp_check_resource(mem_tmp, 1) == 0) { |
905 | ibmphp_add_resource(mem_tmp); | |
dc6712d1 | 906 | pfmem->fromMem = 1; |
1da177e4 | 907 | pfmem->rangeno = mem_tmp->rangeno; |
ff3ce480 | 908 | ibmphp_add_pfmem_from_mem(pfmem); |
dc6712d1 | 909 | flag_pfmem = 1; |
1da177e4 LT |
910 | } |
911 | } | |
912 | } | |
913 | ||
ff3ce480 BS |
914 | debug("b4 if (flag_io && flag_mem && flag_pfmem)\n"); |
915 | debug("flag_io = %x, flag_mem = %x, flag_pfmem = %x\n", flag_io, flag_mem, flag_pfmem); | |
1da177e4 LT |
916 | |
917 | if (flag_io && flag_mem && flag_pfmem) { | |
918 | /* If on bootup, there was a bridged card in this slot, | |
919 | * then card was removed and ibmphp got unloaded and loaded | |
920 | * back again, there's no way for us to remove the bus | |
921 | * struct, so no need to kmalloc, can use existing node | |
922 | */ | |
ff3ce480 | 923 | bus = ibmphp_find_res_bus(sec_number); |
1da177e4 | 924 | if (!bus) { |
f5afe806 | 925 | bus = kzalloc(sizeof(*bus), GFP_KERNEL); |
1da177e4 | 926 | if (!bus) { |
ff3ce480 | 927 | err("out of system memory\n"); |
1da177e4 LT |
928 | retval = -ENOMEM; |
929 | goto error; | |
930 | } | |
1da177e4 | 931 | bus->busno = sec_number; |
ff3ce480 BS |
932 | debug("b4 adding new bus\n"); |
933 | rc = add_new_bus(bus, io, mem, pfmem, func->busno); | |
1da177e4 | 934 | } else if (!(bus->rangeIO) && !(bus->rangeMem) && !(bus->rangePFMem)) |
ff3ce480 | 935 | rc = add_new_bus(bus, io, mem, pfmem, 0xFF); |
1da177e4 | 936 | else { |
ff3ce480 | 937 | err("expected bus structure not empty?\n"); |
1da177e4 LT |
938 | retval = -EIO; |
939 | goto error; | |
940 | } | |
941 | if (rc) { | |
942 | if (rc == -ENOMEM) { | |
ff3ce480 BS |
943 | ibmphp_remove_bus(bus, func->busno); |
944 | kfree(amount_needed); | |
1da177e4 LT |
945 | return rc; |
946 | } | |
947 | retval = rc; | |
948 | goto error; | |
949 | } | |
ff3ce480 BS |
950 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, &io_base); |
951 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &pfmem_base); | |
1da177e4 LT |
952 | |
953 | if ((io_base & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) { | |
ff3ce480 | 954 | debug("io 32\n"); |
dc6712d1 | 955 | need_io_upper = 1; |
1da177e4 | 956 | } |
88d69a1d | 957 | if ((pfmem_base & PCI_PREF_RANGE_TYPE_MASK) == PCI_PREF_RANGE_TYPE_64) { |
ff3ce480 | 958 | debug("pfmem 64\n"); |
dc6712d1 | 959 | need_pfmem_upper = 1; |
1da177e4 LT |
960 | } |
961 | ||
962 | if (bus->noIORanges) { | |
ff3ce480 BS |
963 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00 | bus->rangeIO->start >> 8); |
964 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00 | bus->rangeIO->end >> 8); | |
1da177e4 LT |
965 | |
966 | /* _______________This is for debugging purposes only ____________________ | |
ff3ce480 BS |
967 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, &temp); |
968 | debug("io_base = %x\n", (temp & PCI_IO_RANGE_TYPE_MASK) << 8); | |
969 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, &temp); | |
970 | debug("io_limit = %x\n", (temp & PCI_IO_RANGE_TYPE_MASK) << 8); | |
1da177e4 LT |
971 | ________________________________________________________________________*/ |
972 | ||
973 | if (need_io_upper) { /* since can't support n.e.ways */ | |
ff3ce480 BS |
974 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_IO_BASE_UPPER16, 0x0000); |
975 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_IO_LIMIT_UPPER16, 0x0000); | |
1da177e4 LT |
976 | } |
977 | } else { | |
ff3ce480 BS |
978 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00); |
979 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00); | |
1da177e4 LT |
980 | } |
981 | ||
982 | if (bus->noMemRanges) { | |
ff3ce480 BS |
983 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0x0000 | bus->rangeMem->start >> 16); |
984 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000 | bus->rangeMem->end >> 16); | |
f7625980 | 985 | |
1da177e4 | 986 | /* ____________________This is for debugging purposes only ________________________ |
ff3ce480 BS |
987 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, &temp); |
988 | debug("mem_base = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16); | |
989 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, &temp); | |
990 | debug("mem_limit = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16); | |
1da177e4 LT |
991 | __________________________________________________________________________________*/ |
992 | ||
993 | } else { | |
ff3ce480 BS |
994 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0xffff); |
995 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000); | |
1da177e4 LT |
996 | } |
997 | if (bus->noPFMemRanges) { | |
ff3ce480 BS |
998 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0x0000 | bus->rangePFMem->start >> 16); |
999 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000 | bus->rangePFMem->end >> 16); | |
1da177e4 LT |
1000 | |
1001 | /* __________________________This is for debugging purposes only _______________________ | |
ff3ce480 BS |
1002 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &temp); |
1003 | debug("pfmem_base = %x", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16); | |
1004 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &temp); | |
1005 | debug("pfmem_limit = %x\n", (temp & PCI_MEMORY_RANGE_TYPE_MASK) << 16); | |
1da177e4 LT |
1006 | ______________________________________________________________________________________*/ |
1007 | ||
1008 | if (need_pfmem_upper) { /* since can't support n.e.ways */ | |
ff3ce480 BS |
1009 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, 0x00000000); |
1010 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, PCI_PREF_LIMIT_UPPER32, 0x00000000); | |
1da177e4 LT |
1011 | } |
1012 | } else { | |
ff3ce480 BS |
1013 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0xffff); |
1014 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000); | |
1da177e4 LT |
1015 | } |
1016 | ||
ff3ce480 | 1017 | debug("b4 writing control information\n"); |
1da177e4 | 1018 | |
ff3ce480 | 1019 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq); |
1da177e4 | 1020 | if ((irq > 0x00) && (irq < 0x05)) |
ff3ce480 | 1021 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]); |
f7625980 | 1022 | /* |
ff3ce480 BS |
1023 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, ctrl); |
1024 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY); | |
1025 | pci_bus_write_config_byte(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_SERR); | |
1da177e4 LT |
1026 | */ |
1027 | ||
ff3ce480 BS |
1028 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE); |
1029 | pci_bus_write_config_word(ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, 0x07); | |
1da177e4 LT |
1030 | for (i = 0; i < 32; i++) { |
1031 | if (amount_needed->devices[i]) { | |
ff3ce480 | 1032 | debug("device where devices[i] is 1 = %x\n", i); |
1da177e4 LT |
1033 | func->devices[i] = 1; |
1034 | } | |
1035 | } | |
1036 | func->bus = 1; /* For unconfiguring, to indicate it's PPB */ | |
1037 | func_passed = &func; | |
ff3ce480 BS |
1038 | debug("func->busno b4 returning is %x\n", func->busno); |
1039 | debug("func->busno b4 returning in the other structure is %x\n", (*func_passed)->busno); | |
1040 | kfree(amount_needed); | |
1da177e4 LT |
1041 | return 0; |
1042 | } else { | |
ff3ce480 | 1043 | err("Configuring bridge was unsuccessful...\n"); |
1da177e4 LT |
1044 | mem_tmp = NULL; |
1045 | retval = -EIO; | |
1046 | goto error; | |
1047 | } | |
1048 | ||
1049 | error: | |
1050 | kfree(amount_needed); | |
1051 | if (pfmem) | |
ff3ce480 | 1052 | ibmphp_remove_resource(pfmem); |
1da177e4 | 1053 | if (io) |
ff3ce480 | 1054 | ibmphp_remove_resource(io); |
1da177e4 | 1055 | if (mem) |
ff3ce480 | 1056 | ibmphp_remove_resource(mem); |
1da177e4 LT |
1057 | for (i = 0; i < 2; i++) { /* for 2 BARs */ |
1058 | if (bus_io[i]) { | |
ff3ce480 | 1059 | ibmphp_remove_resource(bus_io[i]); |
1da177e4 LT |
1060 | func->io[i] = NULL; |
1061 | } else if (bus_pfmem[i]) { | |
ff3ce480 | 1062 | ibmphp_remove_resource(bus_pfmem[i]); |
1da177e4 LT |
1063 | func->pfmem[i] = NULL; |
1064 | } else if (bus_mem[i]) { | |
ff3ce480 | 1065 | ibmphp_remove_resource(bus_mem[i]); |
1da177e4 LT |
1066 | func->mem[i] = NULL; |
1067 | } | |
1068 | } | |
1069 | return retval; | |
1070 | } | |
1071 | ||
1072 | /***************************************************************************** | |
1073 | * This function adds up the amount of resources needed behind the PPB bridge | |
1074 | * and passes it to the configure_bridge function | |
1075 | * Input: bridge function | |
f7625980 | 1076 | * Output: amount of resources needed |
1da177e4 | 1077 | *****************************************************************************/ |
ff3ce480 | 1078 | static struct res_needed *scan_behind_bridge(struct pci_func *func, u8 busno) |
1da177e4 LT |
1079 | { |
1080 | int count, len[6]; | |
1081 | u16 vendor_id; | |
1082 | u8 hdr_type; | |
1083 | u8 device, function; | |
1084 | unsigned int devfn; | |
1085 | int howmany = 0; /*this is to see if there are any devices behind the bridge */ | |
1086 | ||
1087 | u32 bar[6], class; | |
1088 | u32 address[] = { | |
1089 | PCI_BASE_ADDRESS_0, | |
1090 | PCI_BASE_ADDRESS_1, | |
1091 | PCI_BASE_ADDRESS_2, | |
1092 | PCI_BASE_ADDRESS_3, | |
1093 | PCI_BASE_ADDRESS_4, | |
1094 | PCI_BASE_ADDRESS_5, | |
1095 | 0 | |
1096 | }; | |
1097 | struct res_needed *amount; | |
1098 | ||
f5afe806 | 1099 | amount = kzalloc(sizeof(*amount), GFP_KERNEL); |
1da177e4 LT |
1100 | if (amount == NULL) |
1101 | return NULL; | |
1da177e4 LT |
1102 | |
1103 | ibmphp_pci_bus->number = busno; | |
1104 | ||
ff3ce480 BS |
1105 | debug("the bus_no behind the bridge is %x\n", busno); |
1106 | debug("scanning devices behind the bridge...\n"); | |
1da177e4 LT |
1107 | for (device = 0; device < 32; device++) { |
1108 | amount->devices[device] = 0; | |
1109 | for (function = 0; function < 8; function++) { | |
1110 | devfn = PCI_DEVFN(device, function); | |
1111 | ||
ff3ce480 | 1112 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); |
1da177e4 LT |
1113 | |
1114 | if (vendor_id != PCI_VENDOR_ID_NOTVALID) { | |
1115 | /* found correct device!!! */ | |
1116 | howmany++; | |
1117 | ||
ff3ce480 BS |
1118 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); |
1119 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); | |
1da177e4 | 1120 | |
ff3ce480 | 1121 | debug("hdr_type behind the bridge is %x\n", hdr_type); |
93de6901 | 1122 | if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) { |
ff3ce480 | 1123 | err("embedded bridges not supported for hot-plugging.\n"); |
dc6712d1 | 1124 | amount->not_correct = 1; |
1da177e4 LT |
1125 | return amount; |
1126 | } | |
1127 | ||
1128 | class >>= 8; /* to take revision out, class = class.subclass.prog i/f */ | |
1129 | if (class == PCI_CLASS_NOT_DEFINED_VGA) { | |
ff3ce480 | 1130 | err("The device %x is VGA compatible and as is not supported for hot plugging. Please choose another device.\n", device); |
dc6712d1 | 1131 | amount->not_correct = 1; |
1da177e4 LT |
1132 | return amount; |
1133 | } else if (class == PCI_CLASS_DISPLAY_VGA) { | |
ff3ce480 | 1134 | err("The device %x is not supported for hot plugging. Please choose another device.\n", device); |
dc6712d1 | 1135 | amount->not_correct = 1; |
1da177e4 LT |
1136 | return amount; |
1137 | } | |
1138 | ||
1139 | amount->devices[device] = 1; | |
1140 | ||
1141 | for (count = 0; address[count]; count++) { | |
1142 | /* for 6 BARs */ | |
1143 | /* | |
ff3ce480 | 1144 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, address[count], &tmp); |
1da177e4 | 1145 | if (tmp & 0x01) // IO |
ff3ce480 | 1146 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFD); |
1da177e4 | 1147 | else // MEMORY |
ff3ce480 | 1148 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); |
1da177e4 | 1149 | */ |
ff3ce480 BS |
1150 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); |
1151 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &bar[count]); | |
1da177e4 | 1152 | |
ff3ce480 | 1153 | debug("what is bar[count]? %x, count = %d\n", bar[count], count); |
1da177e4 LT |
1154 | |
1155 | if (!bar[count]) /* This BAR is not implemented */ | |
1156 | continue; | |
1157 | ||
1158 | //tmp_bar = bar[count]; | |
1159 | ||
ff3ce480 | 1160 | debug("count %d device %x function %x wants %x resources\n", count, device, function, bar[count]); |
1da177e4 LT |
1161 | |
1162 | if (bar[count] & PCI_BASE_ADDRESS_SPACE_IO) { | |
1163 | /* This is IO */ | |
1164 | len[count] = bar[count] & 0xFFFFFFFC; | |
1165 | len[count] = ~len[count] + 1; | |
1166 | amount->io += len[count]; | |
1167 | } else { | |
1168 | /* This is Memory */ | |
1169 | if (bar[count] & PCI_BASE_ADDRESS_MEM_PREFETCH) { | |
1170 | /* pfmem */ | |
1171 | len[count] = bar[count] & 0xFFFFFFF0; | |
1172 | len[count] = ~len[count] + 1; | |
1173 | amount->pfmem += len[count]; | |
1174 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) | |
1175 | /* takes up another dword */ | |
1176 | count += 1; | |
1177 | ||
1178 | } else { | |
1179 | /* regular memory */ | |
1180 | len[count] = bar[count] & 0xFFFFFFF0; | |
1181 | len[count] = ~len[count] + 1; | |
1182 | amount->mem += len[count]; | |
1183 | if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
1184 | /* takes up another dword */ | |
1185 | count += 1; | |
1186 | } | |
1187 | } | |
1188 | } | |
1189 | } /* end for */ | |
1190 | } /* end if (valid) */ | |
1191 | } /* end for */ | |
1192 | } /* end for */ | |
1193 | ||
1194 | if (!howmany) | |
dc6712d1 | 1195 | amount->not_correct = 1; |
1da177e4 | 1196 | else |
dc6712d1 | 1197 | amount->not_correct = 0; |
1da177e4 LT |
1198 | if ((amount->io) && (amount->io < IOBRIDGE)) |
1199 | amount->io = IOBRIDGE; | |
1200 | if ((amount->mem) && (amount->mem < MEMBRIDGE)) | |
1201 | amount->mem = MEMBRIDGE; | |
1202 | if ((amount->pfmem) && (amount->pfmem < MEMBRIDGE)) | |
1203 | amount->pfmem = MEMBRIDGE; | |
1204 | return amount; | |
1205 | } | |
1206 | ||
f7625980 BH |
1207 | /* The following 3 unconfigure_boot_ routines deal with the case when we had the card |
1208 | * upon bootup in the system, since we don't allocate func to such case, we need to read | |
1209 | * the start addresses from pci config space and then find the corresponding entries in | |
1da177e4 LT |
1210 | * our resource lists. The functions return either 0, -ENODEV, or -1 (general failure) |
1211 | * Change: we also call these functions even if we configured the card ourselves (i.e., not | |
1212 | * the bootup case), since it should work same way | |
1213 | */ | |
ff3ce480 | 1214 | static int unconfigure_boot_device(u8 busno, u8 device, u8 function) |
1da177e4 LT |
1215 | { |
1216 | u32 start_address; | |
1217 | u32 address[] = { | |
1218 | PCI_BASE_ADDRESS_0, | |
1219 | PCI_BASE_ADDRESS_1, | |
1220 | PCI_BASE_ADDRESS_2, | |
1221 | PCI_BASE_ADDRESS_3, | |
1222 | PCI_BASE_ADDRESS_4, | |
1223 | PCI_BASE_ADDRESS_5, | |
1224 | 0 | |
1225 | }; | |
1226 | int count; | |
1227 | struct resource_node *io; | |
1228 | struct resource_node *mem; | |
1229 | struct resource_node *pfmem; | |
1230 | struct bus_node *bus; | |
1231 | u32 end_address; | |
1232 | u32 temp_end; | |
1233 | u32 size; | |
1234 | u32 tmp_address; | |
1235 | unsigned int devfn; | |
1236 | ||
ff3ce480 | 1237 | debug("%s - enter\n", __func__); |
1da177e4 | 1238 | |
ff3ce480 | 1239 | bus = ibmphp_find_res_bus(busno); |
1da177e4 | 1240 | if (!bus) { |
ff3ce480 | 1241 | debug("cannot find corresponding bus.\n"); |
1da177e4 LT |
1242 | return -EINVAL; |
1243 | } | |
1244 | ||
1245 | devfn = PCI_DEVFN(device, function); | |
1246 | ibmphp_pci_bus->number = busno; | |
1247 | for (count = 0; address[count]; count++) { /* for 6 BARs */ | |
ff3ce480 | 1248 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &start_address); |
1da177e4 LT |
1249 | |
1250 | /* We can do this here, b/c by that time the device driver of the card has been stopped */ | |
1251 | ||
ff3ce480 BS |
1252 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); |
1253 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &size); | |
1254 | pci_bus_write_config_dword(ibmphp_pci_bus, devfn, address[count], start_address); | |
1da177e4 | 1255 | |
ff3ce480 BS |
1256 | debug("start_address is %x\n", start_address); |
1257 | debug("busno, device, function %x %x %x\n", busno, device, function); | |
1da177e4 LT |
1258 | if (!size) { |
1259 | /* This BAR is not implemented */ | |
ff3ce480 | 1260 | debug("is this bar no implemented?, count = %d\n", count); |
1da177e4 LT |
1261 | continue; |
1262 | } | |
1263 | tmp_address = start_address; | |
1264 | if (start_address & PCI_BASE_ADDRESS_SPACE_IO) { | |
1265 | /* This is IO */ | |
1266 | start_address &= PCI_BASE_ADDRESS_IO_MASK; | |
1267 | size = size & 0xFFFFFFFC; | |
1268 | size = ~size + 1; | |
1269 | end_address = start_address + size - 1; | |
ff3ce480 BS |
1270 | if (ibmphp_find_resource(bus, start_address, &io, IO) < 0) { |
1271 | err("cannot find corresponding IO resource to remove\n"); | |
1da177e4 LT |
1272 | return -EIO; |
1273 | } | |
ff3ce480 | 1274 | debug("io->start = %x\n", io->start); |
1da177e4 LT |
1275 | temp_end = io->end; |
1276 | start_address = io->end + 1; | |
ff3ce480 | 1277 | ibmphp_remove_resource(io); |
1da177e4 LT |
1278 | /* This is needed b/c of the old I/O restrictions in the BIOS */ |
1279 | while (temp_end < end_address) { | |
ff3ce480 BS |
1280 | if (ibmphp_find_resource(bus, start_address, &io, IO) < 0) { |
1281 | err("cannot find corresponding IO resource to remove\n"); | |
1da177e4 LT |
1282 | return -EIO; |
1283 | } | |
ff3ce480 | 1284 | debug("io->start = %x\n", io->start); |
1da177e4 LT |
1285 | temp_end = io->end; |
1286 | start_address = io->end + 1; | |
ff3ce480 | 1287 | ibmphp_remove_resource(io); |
1da177e4 LT |
1288 | } |
1289 | ||
1290 | /* ????????? DO WE NEED TO WRITE ANYTHING INTO THE PCI CONFIG SPACE BACK ?????????? */ | |
1291 | } else { | |
1292 | /* This is Memory */ | |
1da177e4 LT |
1293 | if (start_address & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
1294 | /* pfmem */ | |
ff3ce480 | 1295 | debug("start address of pfmem is %x\n", start_address); |
034ecc72 | 1296 | start_address &= PCI_BASE_ADDRESS_MEM_MASK; |
1da177e4 | 1297 | |
ff3ce480 BS |
1298 | if (ibmphp_find_resource(bus, start_address, &pfmem, PFMEM) < 0) { |
1299 | err("cannot find corresponding PFMEM resource to remove\n"); | |
1da177e4 LT |
1300 | return -EIO; |
1301 | } | |
1302 | if (pfmem) { | |
ff3ce480 | 1303 | debug("pfmem->start = %x\n", pfmem->start); |
1da177e4 LT |
1304 | |
1305 | ibmphp_remove_resource(pfmem); | |
1306 | } | |
1307 | } else { | |
1308 | /* regular memory */ | |
ff3ce480 | 1309 | debug("start address of mem is %x\n", start_address); |
034ecc72 REB |
1310 | start_address &= PCI_BASE_ADDRESS_MEM_MASK; |
1311 | ||
ff3ce480 BS |
1312 | if (ibmphp_find_resource(bus, start_address, &mem, MEM) < 0) { |
1313 | err("cannot find corresponding MEM resource to remove\n"); | |
1da177e4 LT |
1314 | return -EIO; |
1315 | } | |
1316 | if (mem) { | |
ff3ce480 | 1317 | debug("mem->start = %x\n", mem->start); |
1da177e4 LT |
1318 | |
1319 | ibmphp_remove_resource(mem); | |
1320 | } | |
1321 | } | |
1322 | if (tmp_address & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
1323 | /* takes up another dword */ | |
1324 | count += 1; | |
1325 | } | |
1326 | } /* end of mem */ | |
1327 | } /* end of for */ | |
1328 | ||
1329 | return 0; | |
1330 | } | |
1331 | ||
ff3ce480 | 1332 | static int unconfigure_boot_bridge(u8 busno, u8 device, u8 function) |
1da177e4 LT |
1333 | { |
1334 | int count; | |
1335 | int bus_no, pri_no, sub_no, sec_no = 0; | |
1336 | u32 start_address, tmp_address; | |
1337 | u8 sec_number, sub_number, pri_number; | |
1338 | struct resource_node *io = NULL; | |
1339 | struct resource_node *mem = NULL; | |
1340 | struct resource_node *pfmem = NULL; | |
1341 | struct bus_node *bus; | |
1342 | u32 address[] = { | |
1343 | PCI_BASE_ADDRESS_0, | |
1344 | PCI_BASE_ADDRESS_1, | |
1345 | 0 | |
1346 | }; | |
1347 | unsigned int devfn; | |
1348 | ||
1349 | devfn = PCI_DEVFN(device, function); | |
1350 | ibmphp_pci_bus->number = busno; | |
1351 | bus_no = (int) busno; | |
ff3ce480 BS |
1352 | debug("busno is %x\n", busno); |
1353 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number); | |
1354 | debug("%s - busno = %x, primary_number = %x\n", __func__, busno, pri_number); | |
1da177e4 | 1355 | |
ff3ce480 BS |
1356 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); |
1357 | debug("sec_number is %x\n", sec_number); | |
1da177e4 LT |
1358 | sec_no = (int) sec_number; |
1359 | pri_no = (int) pri_number; | |
1360 | if (pri_no != bus_no) { | |
ff3ce480 | 1361 | err("primary numbers in our structures and pci config space don't match.\n"); |
1da177e4 LT |
1362 | return -EINVAL; |
1363 | } | |
1364 | ||
ff3ce480 | 1365 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sub_number); |
1da177e4 | 1366 | sub_no = (int) sub_number; |
ff3ce480 | 1367 | debug("sub_no is %d, sec_no is %d\n", sub_no, sec_no); |
1da177e4 | 1368 | if (sec_no != sub_number) { |
ff3ce480 | 1369 | err("there're more buses behind this bridge. Hot removal is not supported. Please choose another card\n"); |
1da177e4 LT |
1370 | return -ENODEV; |
1371 | } | |
1372 | ||
ff3ce480 | 1373 | bus = ibmphp_find_res_bus(sec_number); |
1da177e4 | 1374 | if (!bus) { |
ff3ce480 | 1375 | err("cannot find Bus structure for the bridged device\n"); |
1da177e4 LT |
1376 | return -EINVAL; |
1377 | } | |
b0d974e9 AB |
1378 | debug("bus->busno is %x\n", bus->busno); |
1379 | debug("sec_number is %x\n", sec_number); | |
1da177e4 | 1380 | |
ff3ce480 | 1381 | ibmphp_remove_bus(bus, busno); |
1da177e4 LT |
1382 | |
1383 | for (count = 0; address[count]; count++) { | |
1384 | /* for 2 BARs */ | |
ff3ce480 | 1385 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, address[count], &start_address); |
1da177e4 LT |
1386 | |
1387 | if (!start_address) { | |
1388 | /* This BAR is not implemented */ | |
1389 | continue; | |
1390 | } | |
1391 | ||
1392 | tmp_address = start_address; | |
1393 | ||
1394 | if (start_address & PCI_BASE_ADDRESS_SPACE_IO) { | |
1395 | /* This is IO */ | |
1396 | start_address &= PCI_BASE_ADDRESS_IO_MASK; | |
ff3ce480 BS |
1397 | if (ibmphp_find_resource(bus, start_address, &io, IO) < 0) { |
1398 | err("cannot find corresponding IO resource to remove\n"); | |
1da177e4 LT |
1399 | return -EIO; |
1400 | } | |
1401 | if (io) | |
ff3ce480 | 1402 | debug("io->start = %x\n", io->start); |
1da177e4 | 1403 | |
ff3ce480 | 1404 | ibmphp_remove_resource(io); |
1da177e4 LT |
1405 | |
1406 | /* ????????? DO WE NEED TO WRITE ANYTHING INTO THE PCI CONFIG SPACE BACK ?????????? */ | |
1407 | } else { | |
1408 | /* This is Memory */ | |
1da177e4 LT |
1409 | if (start_address & PCI_BASE_ADDRESS_MEM_PREFETCH) { |
1410 | /* pfmem */ | |
034ecc72 | 1411 | start_address &= PCI_BASE_ADDRESS_MEM_MASK; |
ff3ce480 BS |
1412 | if (ibmphp_find_resource(bus, start_address, &pfmem, PFMEM) < 0) { |
1413 | err("cannot find corresponding PFMEM resource to remove\n"); | |
1da177e4 LT |
1414 | return -EINVAL; |
1415 | } | |
1416 | if (pfmem) { | |
ff3ce480 | 1417 | debug("pfmem->start = %x\n", pfmem->start); |
1da177e4 LT |
1418 | |
1419 | ibmphp_remove_resource(pfmem); | |
1420 | } | |
1421 | } else { | |
1422 | /* regular memory */ | |
034ecc72 | 1423 | start_address &= PCI_BASE_ADDRESS_MEM_MASK; |
ff3ce480 BS |
1424 | if (ibmphp_find_resource(bus, start_address, &mem, MEM) < 0) { |
1425 | err("cannot find corresponding MEM resource to remove\n"); | |
1da177e4 LT |
1426 | return -EINVAL; |
1427 | } | |
1428 | if (mem) { | |
ff3ce480 | 1429 | debug("mem->start = %x\n", mem->start); |
1da177e4 LT |
1430 | |
1431 | ibmphp_remove_resource(mem); | |
1432 | } | |
1433 | } | |
1434 | if (tmp_address & PCI_BASE_ADDRESS_MEM_TYPE_64) { | |
1435 | /* takes up another dword */ | |
1436 | count += 1; | |
1437 | } | |
1438 | } /* end of mem */ | |
1439 | } /* end of for */ | |
ff3ce480 | 1440 | debug("%s - exiting, returning success\n", __func__); |
1da177e4 LT |
1441 | return 0; |
1442 | } | |
1443 | ||
ff3ce480 | 1444 | static int unconfigure_boot_card(struct slot *slot_cur) |
1da177e4 LT |
1445 | { |
1446 | u16 vendor_id; | |
1447 | u32 class; | |
1448 | u8 hdr_type; | |
1449 | u8 device; | |
1450 | u8 busno; | |
1451 | u8 function; | |
1452 | int rc; | |
1453 | unsigned int devfn; | |
1454 | u8 valid_device = 0x00; /* To see if we are ever able to find valid device and read it */ | |
1455 | ||
ff3ce480 | 1456 | debug("%s - enter\n", __func__); |
1da177e4 LT |
1457 | |
1458 | device = slot_cur->device; | |
1459 | busno = slot_cur->bus; | |
1460 | ||
ff3ce480 | 1461 | debug("b4 for loop, device is %x\n", device); |
1da177e4 LT |
1462 | /* For every function on the card */ |
1463 | for (function = 0x0; function < 0x08; function++) { | |
1464 | devfn = PCI_DEVFN(device, function); | |
1465 | ibmphp_pci_bus->number = busno; | |
1466 | ||
ff3ce480 | 1467 | pci_bus_read_config_word(ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); |
1da177e4 LT |
1468 | |
1469 | if (vendor_id != PCI_VENDOR_ID_NOTVALID) { | |
1470 | /* found correct device!!! */ | |
1471 | ++valid_device; | |
1472 | ||
ff3ce480 | 1473 | debug("%s - found correct device\n", __func__); |
1da177e4 LT |
1474 | |
1475 | /* header: x x x x x x x x | |
1476 | * | |___________|=> 1=PPB bridge, 0=normal device, 2=CardBus Bridge | |
1477 | * |_=> 0 = single function device, 1 = multi-function device | |
1478 | */ | |
1479 | ||
ff3ce480 BS |
1480 | pci_bus_read_config_byte(ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); |
1481 | pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); | |
1da177e4 | 1482 | |
ff3ce480 | 1483 | debug("hdr_type %x, class %x\n", hdr_type, class); |
1da177e4 LT |
1484 | class >>= 8; /* to take revision out, class = class.subclass.prog i/f */ |
1485 | if (class == PCI_CLASS_NOT_DEFINED_VGA) { | |
ff3ce480 | 1486 | err("The device %x function %x is VGA compatible and is not supported for hot removing. Please choose another device.\n", device, function); |
1da177e4 LT |
1487 | return -ENODEV; |
1488 | } else if (class == PCI_CLASS_DISPLAY_VGA) { | |
ff3ce480 | 1489 | err("The device %x function %x is not supported for hot removing. Please choose another device.\n", device, function); |
1da177e4 LT |
1490 | return -ENODEV; |
1491 | } | |
1492 | ||
1493 | switch (hdr_type) { | |
1494 | case PCI_HEADER_TYPE_NORMAL: | |
ff3ce480 | 1495 | rc = unconfigure_boot_device(busno, device, function); |
1da177e4 | 1496 | if (rc) { |
ff3ce480 | 1497 | err("was not able to unconfigure device %x func %x on bus %x. bailing out...\n", |
1da177e4 LT |
1498 | device, function, busno); |
1499 | return rc; | |
1500 | } | |
1501 | function = 0x8; | |
1502 | break; | |
1503 | case PCI_HEADER_TYPE_MULTIDEVICE: | |
ff3ce480 | 1504 | rc = unconfigure_boot_device(busno, device, function); |
1da177e4 | 1505 | if (rc) { |
ff3ce480 | 1506 | err("was not able to unconfigure device %x func %x on bus %x. bailing out...\n", |
1da177e4 LT |
1507 | device, function, busno); |
1508 | return rc; | |
1509 | } | |
1510 | break; | |
1511 | case PCI_HEADER_TYPE_BRIDGE: | |
1512 | class >>= 8; | |
1513 | if (class != PCI_CLASS_BRIDGE_PCI) { | |
ff3ce480 | 1514 | err("This device %x function %x is not PCI-to-PCI bridge, and is not supported for hot-removing. Please try another card.\n", device, function); |
1da177e4 LT |
1515 | return -ENODEV; |
1516 | } | |
ff3ce480 | 1517 | rc = unconfigure_boot_bridge(busno, device, function); |
1da177e4 | 1518 | if (rc != 0) { |
ff3ce480 | 1519 | err("was not able to hot-remove PPB properly.\n"); |
1da177e4 LT |
1520 | return rc; |
1521 | } | |
1522 | ||
1523 | function = 0x8; | |
1524 | break; | |
1525 | case PCI_HEADER_TYPE_MULTIBRIDGE: | |
1526 | class >>= 8; | |
1527 | if (class != PCI_CLASS_BRIDGE_PCI) { | |
ff3ce480 | 1528 | err("This device %x function %x is not PCI-to-PCI bridge, and is not supported for hot-removing. Please try another card.\n", device, function); |
1da177e4 LT |
1529 | return -ENODEV; |
1530 | } | |
ff3ce480 | 1531 | rc = unconfigure_boot_bridge(busno, device, function); |
1da177e4 | 1532 | if (rc != 0) { |
ff3ce480 | 1533 | err("was not able to hot-remove PPB properly.\n"); |
1da177e4 LT |
1534 | return rc; |
1535 | } | |
1536 | break; | |
1537 | default: | |
ff3ce480 | 1538 | err("MAJOR PROBLEM!!!! Cannot read device's header\n"); |
1da177e4 LT |
1539 | return -1; |
1540 | break; | |
1541 | } /* end of switch */ | |
1542 | } /* end of valid device */ | |
1543 | } /* end of for */ | |
1544 | ||
1545 | if (!valid_device) { | |
ff3ce480 | 1546 | err("Could not find device to unconfigure. Or could not read the card.\n"); |
1da177e4 LT |
1547 | return -1; |
1548 | } | |
1549 | return 0; | |
1550 | } | |
1551 | ||
1552 | /* | |
1553 | * free the resources of the card (multi, single, or bridged) | |
1554 | * Parameters: slot, flag to say if this is for removing entire module or just | |
1555 | * unconfiguring the device | |
1556 | * TO DO: will probably need to add some code in case there was some resource, | |
1557 | * to remove it... this is from when we have errors in the configure_card... | |
f7625980 BH |
1558 | * !!!!!!!!!!!!!!!!!!!!!!!!!FOR BUSES!!!!!!!!!!!! |
1559 | * Returns: 0, -1, -ENODEV | |
1da177e4 | 1560 | */ |
ff3ce480 | 1561 | int ibmphp_unconfigure_card(struct slot **slot_cur, int the_end) |
1da177e4 LT |
1562 | { |
1563 | int i; | |
1564 | int count; | |
1565 | int rc; | |
1566 | struct slot *sl = *slot_cur; | |
1567 | struct pci_func *cur_func = NULL; | |
1568 | struct pci_func *temp_func; | |
1569 | ||
ff3ce480 | 1570 | debug("%s - enter\n", __func__); |
1da177e4 LT |
1571 | |
1572 | if (!the_end) { | |
1573 | /* Need to unconfigure the card */ | |
ff3ce480 | 1574 | rc = unconfigure_boot_card(sl); |
1da177e4 LT |
1575 | if ((rc == -ENODEV) || (rc == -EIO) || (rc == -EINVAL)) { |
1576 | /* In all other cases, will still need to get rid of func structure if it exists */ | |
1577 | return rc; | |
1578 | } | |
1579 | } | |
1580 | ||
1581 | if (sl->func) { | |
1582 | cur_func = sl->func; | |
1583 | while (cur_func) { | |
1584 | /* TO DO: WILL MOST LIKELY NEED TO GET RID OF THE BUS STRUCTURE FROM RESOURCES AS WELL */ | |
1585 | if (cur_func->bus) { | |
1586 | /* in other words, it's a PPB */ | |
1587 | count = 2; | |
1588 | } else { | |
1589 | count = 6; | |
1590 | } | |
1591 | ||
1592 | for (i = 0; i < count; i++) { | |
1593 | if (cur_func->io[i]) { | |
ff3ce480 | 1594 | debug("io[%d] exists\n", i); |
1da177e4 | 1595 | if (the_end > 0) |
ff3ce480 | 1596 | ibmphp_remove_resource(cur_func->io[i]); |
1da177e4 LT |
1597 | cur_func->io[i] = NULL; |
1598 | } | |
1599 | if (cur_func->mem[i]) { | |
ff3ce480 | 1600 | debug("mem[%d] exists\n", i); |
1da177e4 | 1601 | if (the_end > 0) |
ff3ce480 | 1602 | ibmphp_remove_resource(cur_func->mem[i]); |
1da177e4 LT |
1603 | cur_func->mem[i] = NULL; |
1604 | } | |
1605 | if (cur_func->pfmem[i]) { | |
ff3ce480 | 1606 | debug("pfmem[%d] exists\n", i); |
1da177e4 | 1607 | if (the_end > 0) |
ff3ce480 | 1608 | ibmphp_remove_resource(cur_func->pfmem[i]); |
1da177e4 LT |
1609 | cur_func->pfmem[i] = NULL; |
1610 | } | |
1611 | } | |
1612 | ||
1613 | temp_func = cur_func->next; | |
ff3ce480 | 1614 | kfree(cur_func); |
1da177e4 LT |
1615 | cur_func = temp_func; |
1616 | } | |
1617 | } | |
1618 | ||
1619 | sl->func = NULL; | |
1620 | *slot_cur = sl; | |
ff3ce480 | 1621 | debug("%s - exit\n", __func__); |
1da177e4 LT |
1622 | return 0; |
1623 | } | |
1624 | ||
1625 | /* | |
1626 | * add a new bus resulting from hot-plugging a PPB bridge with devices | |
1627 | * | |
1628 | * Input: bus and the amount of resources needed (we know we can assign those, | |
1629 | * since they've been checked already | |
1630 | * Output: bus added to the correct spot | |
f7625980 | 1631 | * 0, -1, error |
1da177e4 | 1632 | */ |
ff3ce480 | 1633 | static int add_new_bus(struct bus_node *bus, struct resource_node *io, struct resource_node *mem, struct resource_node *pfmem, u8 parent_busno) |
1da177e4 LT |
1634 | { |
1635 | struct range_node *io_range = NULL; | |
1636 | struct range_node *mem_range = NULL; | |
1637 | struct range_node *pfmem_range = NULL; | |
1638 | struct bus_node *cur_bus = NULL; | |
1639 | ||
1640 | /* Trying to find the parent bus number */ | |
1641 | if (parent_busno != 0xFF) { | |
ff3ce480 | 1642 | cur_bus = ibmphp_find_res_bus(parent_busno); |
1da177e4 | 1643 | if (!cur_bus) { |
ff3ce480 | 1644 | err("strange, cannot find bus which is supposed to be at the system... something is terribly wrong...\n"); |
1da177e4 LT |
1645 | return -ENODEV; |
1646 | } | |
f7625980 | 1647 | |
ff3ce480 | 1648 | list_add(&bus->bus_list, &cur_bus->bus_list); |
1da177e4 LT |
1649 | } |
1650 | if (io) { | |
f5afe806 | 1651 | io_range = kzalloc(sizeof(*io_range), GFP_KERNEL); |
1da177e4 | 1652 | if (!io_range) { |
ff3ce480 | 1653 | err("out of system memory\n"); |
1da177e4 LT |
1654 | return -ENOMEM; |
1655 | } | |
1da177e4 LT |
1656 | io_range->start = io->start; |
1657 | io_range->end = io->end; | |
1658 | io_range->rangeno = 1; | |
1659 | bus->noIORanges = 1; | |
1660 | bus->rangeIO = io_range; | |
1661 | } | |
1662 | if (mem) { | |
f5afe806 | 1663 | mem_range = kzalloc(sizeof(*mem_range), GFP_KERNEL); |
1da177e4 | 1664 | if (!mem_range) { |
ff3ce480 | 1665 | err("out of system memory\n"); |
1da177e4 LT |
1666 | return -ENOMEM; |
1667 | } | |
1da177e4 LT |
1668 | mem_range->start = mem->start; |
1669 | mem_range->end = mem->end; | |
1670 | mem_range->rangeno = 1; | |
1671 | bus->noMemRanges = 1; | |
1672 | bus->rangeMem = mem_range; | |
1673 | } | |
1674 | if (pfmem) { | |
f5afe806 | 1675 | pfmem_range = kzalloc(sizeof(*pfmem_range), GFP_KERNEL); |
f7625980 | 1676 | if (!pfmem_range) { |
ff3ce480 | 1677 | err("out of system memory\n"); |
1da177e4 LT |
1678 | return -ENOMEM; |
1679 | } | |
1da177e4 LT |
1680 | pfmem_range->start = pfmem->start; |
1681 | pfmem_range->end = pfmem->end; | |
1682 | pfmem_range->rangeno = 1; | |
1683 | bus->noPFMemRanges = 1; | |
1684 | bus->rangePFMem = pfmem_range; | |
1685 | } | |
1686 | return 0; | |
1687 | } | |
1688 | ||
1689 | /* | |
1690 | * find the 1st available bus number for PPB to set as its secondary bus | |
1691 | * Parameters: bus_number of the primary bus | |
1692 | * Returns: bus_number of the secondary bus or 0xff in case of failure | |
1693 | */ | |
ff3ce480 | 1694 | static u8 find_sec_number(u8 primary_busno, u8 slotno) |
1da177e4 LT |
1695 | { |
1696 | int min, max; | |
1697 | u8 busno; | |
1698 | struct bus_info *bus; | |
1699 | struct bus_node *bus_cur; | |
1700 | ||
ff3ce480 | 1701 | bus = ibmphp_find_same_bus_num(primary_busno); |
1da177e4 | 1702 | if (!bus) { |
ff3ce480 | 1703 | err("cannot get slot range of the bus from the BIOS\n"); |
1da177e4 LT |
1704 | return 0xff; |
1705 | } | |
1706 | max = bus->slot_max; | |
1707 | min = bus->slot_min; | |
1708 | if ((slotno > max) || (slotno < min)) { | |
ff3ce480 | 1709 | err("got the wrong range\n"); |
1da177e4 LT |
1710 | return 0xff; |
1711 | } | |
1712 | busno = (u8) (slotno - (u8) min); | |
1713 | busno += primary_busno + 0x01; | |
ff3ce480 | 1714 | bus_cur = ibmphp_find_res_bus(busno); |
1da177e4 LT |
1715 | /* either there is no such bus number, or there are no ranges, which |
1716 | * can only happen if we removed the bridged device in previous load | |
1717 | * of the driver, and now only have the skeleton bus struct | |
1718 | */ | |
1719 | if ((!bus_cur) || (!(bus_cur->rangeIO) && !(bus_cur->rangeMem) && !(bus_cur->rangePFMem))) | |
1720 | return busno; | |
1721 | return 0xff; | |
1722 | } |