PCI: Calculate maximum number of buses required for VFs
[deliverable/linux.git] / drivers / pci / iov.c
CommitLineData
d1b054da
YZ
1/*
2 * drivers/pci/iov.c
3 *
4 * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com>
5 *
6 * PCI Express I/O Virtualization (IOV) support.
7 * Single Root IOV 1.0
302b4215 8 * Address Translation Service 1.0
d1b054da
YZ
9 */
10
11#include <linux/pci.h>
5a0e3ad6 12#include <linux/slab.h>
d1b054da 13#include <linux/mutex.h>
363c75db 14#include <linux/export.h>
d1b054da
YZ
15#include <linux/string.h>
16#include <linux/delay.h>
5cdede24 17#include <linux/pci-ats.h>
d1b054da
YZ
18#include "pci.h"
19
dd7cc44d 20#define VIRTFN_ID_LEN 16
d1b054da 21
a28724b0
YZ
22static inline u8 virtfn_bus(struct pci_dev *dev, int id)
23{
24 return dev->bus->number + ((dev->devfn + dev->sriov->offset +
25 dev->sriov->stride * id) >> 8);
26}
27
28static inline u8 virtfn_devfn(struct pci_dev *dev, int id)
29{
30 return (dev->devfn + dev->sriov->offset +
31 dev->sriov->stride * id) & 0xff;
32}
33
f59dca27
WY
34/*
35 * Per SR-IOV spec sec 3.3.10 and 3.3.11, First VF Offset and VF Stride may
36 * change when NumVFs changes.
37 *
38 * Update iov->offset and iov->stride when NumVFs is written.
39 */
40static inline void pci_iov_set_numvfs(struct pci_dev *dev, int nr_virtfn)
41{
42 struct pci_sriov *iov = dev->sriov;
43
44 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn);
45 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
46 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
47}
48
4449f079
WY
49/*
50 * The PF consumes one bus number. NumVFs, First VF Offset, and VF Stride
51 * determine how many additional bus numbers will be consumed by VFs.
52 *
53 * Iterate over all valid NumVFs and calculate the maximum number of bus
54 * numbers that could ever be required.
55 */
56static inline u8 virtfn_max_buses(struct pci_dev *dev)
57{
58 struct pci_sriov *iov = dev->sriov;
59 int nr_virtfn;
60 u8 max = 0;
61 u8 busnr;
62
63 for (nr_virtfn = 1; nr_virtfn <= iov->total_VFs; nr_virtfn++) {
64 pci_iov_set_numvfs(dev, nr_virtfn);
65 busnr = virtfn_bus(dev, nr_virtfn - 1);
66 if (busnr > max)
67 max = busnr;
68 }
69
70 return max;
71}
72
dd7cc44d
YZ
73static struct pci_bus *virtfn_add_bus(struct pci_bus *bus, int busnr)
74{
dd7cc44d
YZ
75 struct pci_bus *child;
76
77 if (bus->number == busnr)
78 return bus;
79
80 child = pci_find_bus(pci_domain_nr(bus), busnr);
81 if (child)
82 return child;
83
84 child = pci_add_new_bus(bus, NULL, busnr);
85 if (!child)
86 return NULL;
87
b7eac055 88 pci_bus_insert_busn_res(child, busnr, busnr);
dd7cc44d
YZ
89
90 return child;
91}
92
dc087f2f 93static void virtfn_remove_bus(struct pci_bus *physbus, struct pci_bus *virtbus)
dd7cc44d 94{
dc087f2f
JL
95 if (physbus != virtbus && list_empty(&virtbus->devices))
96 pci_remove_bus(virtbus);
dd7cc44d
YZ
97}
98
0e6c9122
WY
99resource_size_t pci_iov_resource_size(struct pci_dev *dev, int resno)
100{
101 if (!dev->is_physfn)
102 return 0;
103
104 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES];
105}
106
dd7cc44d
YZ
107static int virtfn_add(struct pci_dev *dev, int id, int reset)
108{
109 int i;
dc087f2f 110 int rc = -ENOMEM;
dd7cc44d
YZ
111 u64 size;
112 char buf[VIRTFN_ID_LEN];
113 struct pci_dev *virtfn;
114 struct resource *res;
115 struct pci_sriov *iov = dev->sriov;
8b1fce04 116 struct pci_bus *bus;
dd7cc44d 117
dd7cc44d 118 mutex_lock(&iov->dev->sriov->lock);
8b1fce04 119 bus = virtfn_add_bus(dev->bus, virtfn_bus(dev, id));
dc087f2f
JL
120 if (!bus)
121 goto failed;
122
123 virtfn = pci_alloc_dev(bus);
dd7cc44d 124 if (!virtfn)
dc087f2f 125 goto failed0;
dd7cc44d 126
dd7cc44d
YZ
127 virtfn->devfn = virtfn_devfn(dev, id);
128 virtfn->vendor = dev->vendor;
129 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device);
130 pci_setup_device(virtfn);
131 virtfn->dev.parent = dev->dev.parent;
fbf33f51
XH
132 virtfn->physfn = pci_dev_get(dev);
133 virtfn->is_virtfn = 1;
aa931977 134 virtfn->multifunction = 0;
dd7cc44d
YZ
135
136 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 137 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
138 if (!res->parent)
139 continue;
140 virtfn->resource[i].name = pci_name(virtfn);
141 virtfn->resource[i].flags = res->flags;
0e6c9122 142 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES);
dd7cc44d
YZ
143 virtfn->resource[i].start = res->start + size * id;
144 virtfn->resource[i].end = virtfn->resource[i].start + size - 1;
145 rc = request_resource(res, &virtfn->resource[i]);
146 BUG_ON(rc);
147 }
148
149 if (reset)
8c1c699f 150 __pci_reset_function(virtfn);
dd7cc44d
YZ
151
152 pci_device_add(virtfn, virtfn->bus);
153 mutex_unlock(&iov->dev->sriov->lock);
154
c893d133 155 pci_bus_add_device(virtfn);
dd7cc44d
YZ
156 sprintf(buf, "virtfn%u", id);
157 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf);
158 if (rc)
159 goto failed1;
160 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn");
161 if (rc)
162 goto failed2;
163
164 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE);
165
166 return 0;
167
168failed2:
169 sysfs_remove_link(&dev->dev.kobj, buf);
170failed1:
171 pci_dev_put(dev);
172 mutex_lock(&iov->dev->sriov->lock);
210647af 173 pci_stop_and_remove_bus_device(virtfn);
dc087f2f
JL
174failed0:
175 virtfn_remove_bus(dev->bus, bus);
176failed:
dd7cc44d
YZ
177 mutex_unlock(&iov->dev->sriov->lock);
178
179 return rc;
180}
181
182static void virtfn_remove(struct pci_dev *dev, int id, int reset)
183{
184 char buf[VIRTFN_ID_LEN];
dd7cc44d
YZ
185 struct pci_dev *virtfn;
186 struct pci_sriov *iov = dev->sriov;
187
dc087f2f
JL
188 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus),
189 virtfn_bus(dev, id),
190 virtfn_devfn(dev, id));
dd7cc44d
YZ
191 if (!virtfn)
192 return;
193
dd7cc44d
YZ
194 if (reset) {
195 device_release_driver(&virtfn->dev);
8c1c699f 196 __pci_reset_function(virtfn);
dd7cc44d
YZ
197 }
198
199 sprintf(buf, "virtfn%u", id);
200 sysfs_remove_link(&dev->dev.kobj, buf);
09cedbef
YL
201 /*
202 * pci_stop_dev() could have been called for this virtfn already,
203 * so the directory for the virtfn may have been removed before.
204 * Double check to avoid spurious sysfs warnings.
205 */
206 if (virtfn->dev.kobj.sd)
207 sysfs_remove_link(&virtfn->dev.kobj, "physfn");
dd7cc44d
YZ
208
209 mutex_lock(&iov->dev->sriov->lock);
210647af 210 pci_stop_and_remove_bus_device(virtfn);
dc087f2f 211 virtfn_remove_bus(dev->bus, virtfn->bus);
dd7cc44d
YZ
212 mutex_unlock(&iov->dev->sriov->lock);
213
dc087f2f
JL
214 /* balance pci_get_domain_bus_and_slot() */
215 pci_dev_put(virtfn);
dd7cc44d
YZ
216 pci_dev_put(dev);
217}
218
219static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
220{
221 int rc;
222 int i, j;
223 int nres;
224 u16 offset, stride, initial;
225 struct resource *res;
226 struct pci_dev *pdev;
227 struct pci_sriov *iov = dev->sriov;
bbef98ab 228 int bars = 0;
68f8e9fa 229 u8 bus;
dd7cc44d
YZ
230
231 if (!nr_virtfn)
232 return 0;
233
6b136724 234 if (iov->num_VFs)
dd7cc44d
YZ
235 return -EINVAL;
236
237 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial);
6b136724
BH
238 if (initial > iov->total_VFs ||
239 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (initial != iov->total_VFs)))
dd7cc44d
YZ
240 return -EIO;
241
6b136724 242 if (nr_virtfn < 0 || nr_virtfn > iov->total_VFs ||
dd7cc44d
YZ
243 (!(iov->cap & PCI_SRIOV_CAP_VFM) && (nr_virtfn > initial)))
244 return -EINVAL;
245
dd7cc44d
YZ
246 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset);
247 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride);
248 if (!offset || (nr_virtfn > 1 && !stride))
249 return -EIO;
250
251 nres = 0;
252 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
bbef98ab 253 bars |= (1 << (i + PCI_IOV_RESOURCES));
c1fe1f96 254 res = &dev->resource[i + PCI_IOV_RESOURCES];
dd7cc44d
YZ
255 if (res->parent)
256 nres++;
257 }
258 if (nres != iov->nres) {
259 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n");
260 return -ENOMEM;
261 }
262
263 iov->offset = offset;
264 iov->stride = stride;
265
68f8e9fa
BH
266 bus = virtfn_bus(dev, nr_virtfn - 1);
267 if (bus > dev->bus->busn_res.end) {
268 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n",
269 nr_virtfn, bus, &dev->bus->busn_res);
dd7cc44d
YZ
270 return -ENOMEM;
271 }
272
bbef98ab
RP
273 if (pci_enable_resources(dev, bars)) {
274 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n");
275 return -ENOMEM;
276 }
277
dd7cc44d
YZ
278 if (iov->link != dev->devfn) {
279 pdev = pci_get_slot(dev->bus, iov->link);
280 if (!pdev)
281 return -ENODEV;
282
dc087f2f
JL
283 if (!pdev->is_physfn) {
284 pci_dev_put(pdev);
652d1100 285 return -ENOSYS;
dc087f2f 286 }
dd7cc44d
YZ
287
288 rc = sysfs_create_link(&dev->dev.kobj,
289 &pdev->dev.kobj, "dep_link");
dc087f2f 290 pci_dev_put(pdev);
dd7cc44d
YZ
291 if (rc)
292 return rc;
293 }
294
f59dca27 295 pci_iov_set_numvfs(dev, nr_virtfn);
dd7cc44d 296 iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
fb51ccbf 297 pci_cfg_access_lock(dev);
dd7cc44d
YZ
298 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
299 msleep(100);
fb51ccbf 300 pci_cfg_access_unlock(dev);
dd7cc44d 301
6b136724 302 iov->initial_VFs = initial;
dd7cc44d
YZ
303 if (nr_virtfn < initial)
304 initial = nr_virtfn;
305
306 for (i = 0; i < initial; i++) {
307 rc = virtfn_add(dev, i, 0);
308 if (rc)
309 goto failed;
310 }
311
312 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE);
6b136724 313 iov->num_VFs = nr_virtfn;
dd7cc44d
YZ
314
315 return 0;
316
317failed:
318 for (j = 0; j < i; j++)
319 virtfn_remove(dev, j, 0);
320
321 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 322 pci_cfg_access_lock(dev);
dd7cc44d 323 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
f59dca27 324 pci_iov_set_numvfs(dev, 0);
dd7cc44d 325 ssleep(1);
fb51ccbf 326 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
327
328 if (iov->link != dev->devfn)
329 sysfs_remove_link(&dev->dev.kobj, "dep_link");
330
331 return rc;
332}
333
334static void sriov_disable(struct pci_dev *dev)
335{
336 int i;
337 struct pci_sriov *iov = dev->sriov;
338
6b136724 339 if (!iov->num_VFs)
dd7cc44d
YZ
340 return;
341
6b136724 342 for (i = 0; i < iov->num_VFs; i++)
dd7cc44d
YZ
343 virtfn_remove(dev, i, 0);
344
345 iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
fb51ccbf 346 pci_cfg_access_lock(dev);
dd7cc44d
YZ
347 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
348 ssleep(1);
fb51ccbf 349 pci_cfg_access_unlock(dev);
dd7cc44d
YZ
350
351 if (iov->link != dev->devfn)
352 sysfs_remove_link(&dev->dev.kobj, "dep_link");
353
6b136724 354 iov->num_VFs = 0;
f59dca27 355 pci_iov_set_numvfs(dev, 0);
dd7cc44d
YZ
356}
357
d1b054da
YZ
358static int sriov_init(struct pci_dev *dev, int pos)
359{
0e6c9122 360 int i, bar64;
d1b054da
YZ
361 int rc;
362 int nres;
363 u32 pgsz;
364 u16 ctrl, total, offset, stride;
365 struct pci_sriov *iov;
366 struct resource *res;
367 struct pci_dev *pdev;
368
62f87c0e
YW
369 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
370 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
d1b054da
YZ
371 return -ENODEV;
372
373 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
374 if (ctrl & PCI_SRIOV_CTRL_VFE) {
375 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
376 ssleep(1);
377 }
378
379 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total);
380 if (!total)
381 return 0;
382
383 ctrl = 0;
384 list_for_each_entry(pdev, &dev->bus->devices, bus_list)
385 if (pdev->is_physfn)
386 goto found;
387
388 pdev = NULL;
389 if (pci_ari_enabled(dev->bus))
390 ctrl |= PCI_SRIOV_CTRL_ARI;
391
392found:
393 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl);
045cc22e 394 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0);
d1b054da
YZ
395 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
396 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
397 if (!offset || (total > 1 && !stride))
398 return -EIO;
399
400 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz);
401 i = PAGE_SHIFT > 12 ? PAGE_SHIFT - 12 : 0;
402 pgsz &= ~((1 << i) - 1);
403 if (!pgsz)
404 return -EIO;
405
406 pgsz &= ~(pgsz - 1);
8161fe91 407 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz);
d1b054da 408
0e6c9122
WY
409 iov = kzalloc(sizeof(*iov), GFP_KERNEL);
410 if (!iov)
411 return -ENOMEM;
412
d1b054da
YZ
413 nres = 0;
414 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 415 res = &dev->resource[i + PCI_IOV_RESOURCES];
0e6c9122
WY
416 bar64 = __pci_read_base(dev, pci_bar_unknown, res,
417 pos + PCI_SRIOV_BAR + i * 4);
d1b054da
YZ
418 if (!res->flags)
419 continue;
420 if (resource_size(res) & (PAGE_SIZE - 1)) {
421 rc = -EIO;
422 goto failed;
423 }
0e6c9122 424 iov->barsz[i] = resource_size(res);
d1b054da 425 res->end = res->start + resource_size(res) * total - 1;
e88ae01d
WY
426 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n",
427 i, res, i, total);
0e6c9122 428 i += bar64;
d1b054da
YZ
429 nres++;
430 }
431
d1b054da
YZ
432 iov->pos = pos;
433 iov->nres = nres;
434 iov->ctrl = ctrl;
6b136724 435 iov->total_VFs = total;
d1b054da
YZ
436 iov->offset = offset;
437 iov->stride = stride;
438 iov->pgsz = pgsz;
439 iov->self = dev;
440 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
441 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
62f87c0e 442 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
4d135dbe 443 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link);
d1b054da
YZ
444
445 if (pdev)
446 iov->dev = pci_dev_get(pdev);
e277d2fc 447 else
d1b054da 448 iov->dev = dev;
e277d2fc
YZ
449
450 mutex_init(&iov->lock);
d1b054da
YZ
451
452 dev->sriov = iov;
453 dev->is_physfn = 1;
4449f079 454 iov->max_VF_buses = virtfn_max_buses(dev);
d1b054da
YZ
455
456 return 0;
457
458failed:
459 for (i = 0; i < PCI_SRIOV_NUM_BARS; i++) {
c1fe1f96 460 res = &dev->resource[i + PCI_IOV_RESOURCES];
d1b054da
YZ
461 res->flags = 0;
462 }
463
0e6c9122 464 kfree(iov);
d1b054da
YZ
465 return rc;
466}
467
468static void sriov_release(struct pci_dev *dev)
469{
6b136724 470 BUG_ON(dev->sriov->num_VFs);
dd7cc44d 471
e277d2fc 472 if (dev != dev->sriov->dev)
d1b054da
YZ
473 pci_dev_put(dev->sriov->dev);
474
e277d2fc
YZ
475 mutex_destroy(&dev->sriov->lock);
476
d1b054da
YZ
477 kfree(dev->sriov);
478 dev->sriov = NULL;
479}
480
8c5cdb6a
YZ
481static void sriov_restore_state(struct pci_dev *dev)
482{
483 int i;
484 u16 ctrl;
485 struct pci_sriov *iov = dev->sriov;
486
487 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl);
488 if (ctrl & PCI_SRIOV_CTRL_VFE)
489 return;
490
491 for (i = PCI_IOV_RESOURCES; i <= PCI_IOV_RESOURCE_END; i++)
492 pci_update_resource(dev, i);
493
494 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz);
f59dca27 495 pci_iov_set_numvfs(dev, iov->num_VFs);
8c5cdb6a
YZ
496 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
497 if (iov->ctrl & PCI_SRIOV_CTRL_VFE)
498 msleep(100);
499}
500
d1b054da
YZ
501/**
502 * pci_iov_init - initialize the IOV capability
503 * @dev: the PCI device
504 *
505 * Returns 0 on success, or negative on failure.
506 */
507int pci_iov_init(struct pci_dev *dev)
508{
509 int pos;
510
5f4d91a1 511 if (!pci_is_pcie(dev))
d1b054da
YZ
512 return -ENODEV;
513
514 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
515 if (pos)
516 return sriov_init(dev, pos);
517
518 return -ENODEV;
519}
520
521/**
522 * pci_iov_release - release resources used by the IOV capability
523 * @dev: the PCI device
524 */
525void pci_iov_release(struct pci_dev *dev)
526{
527 if (dev->is_physfn)
528 sriov_release(dev);
529}
530
531/**
532 * pci_iov_resource_bar - get position of the SR-IOV BAR
533 * @dev: the PCI device
534 * @resno: the resource number
d1b054da
YZ
535 *
536 * Returns position of the BAR encapsulated in the SR-IOV capability.
537 */
26ff46c6 538int pci_iov_resource_bar(struct pci_dev *dev, int resno)
d1b054da
YZ
539{
540 if (resno < PCI_IOV_RESOURCES || resno > PCI_IOV_RESOURCE_END)
541 return 0;
542
543 BUG_ON(!dev->is_physfn);
544
d1b054da
YZ
545 return dev->sriov->pos + PCI_SRIOV_BAR +
546 4 * (resno - PCI_IOV_RESOURCES);
547}
8c5cdb6a 548
6faf17f6
CW
549/**
550 * pci_sriov_resource_alignment - get resource alignment for VF BAR
551 * @dev: the PCI device
552 * @resno: the resource number
553 *
554 * Returns the alignment of the VF BAR found in the SR-IOV capability.
555 * This is not the same as the resource size which is defined as
556 * the VF BAR size multiplied by the number of VFs. The alignment
557 * is just the VF BAR size.
558 */
0e52247a 559resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno)
6faf17f6 560{
0e6c9122 561 return pci_iov_resource_size(dev, resno);
6faf17f6
CW
562}
563
8c5cdb6a
YZ
564/**
565 * pci_restore_iov_state - restore the state of the IOV capability
566 * @dev: the PCI device
567 */
568void pci_restore_iov_state(struct pci_dev *dev)
569{
570 if (dev->is_physfn)
571 sriov_restore_state(dev);
572}
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573
574/**
575 * pci_iov_bus_range - find bus range used by Virtual Function
576 * @bus: the PCI bus
577 *
578 * Returns max number of buses (exclude current one) used by Virtual
579 * Functions.
580 */
581int pci_iov_bus_range(struct pci_bus *bus)
582{
583 int max = 0;
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584 struct pci_dev *dev;
585
586 list_for_each_entry(dev, &bus->devices, bus_list) {
587 if (!dev->is_physfn)
588 continue;
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589 if (dev->sriov->max_VF_buses > max)
590 max = dev->sriov->max_VF_buses;
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591 }
592
593 return max ? max - bus->number : 0;
594}
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595
596/**
597 * pci_enable_sriov - enable the SR-IOV capability
598 * @dev: the PCI device
52a8873b 599 * @nr_virtfn: number of virtual functions to enable
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600 *
601 * Returns 0 on success, or negative on failure.
602 */
603int pci_enable_sriov(struct pci_dev *dev, int nr_virtfn)
604{
605 might_sleep();
606
607 if (!dev->is_physfn)
652d1100 608 return -ENOSYS;
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609
610 return sriov_enable(dev, nr_virtfn);
611}
612EXPORT_SYMBOL_GPL(pci_enable_sriov);
613
614/**
615 * pci_disable_sriov - disable the SR-IOV capability
616 * @dev: the PCI device
617 */
618void pci_disable_sriov(struct pci_dev *dev)
619{
620 might_sleep();
621
622 if (!dev->is_physfn)
623 return;
624
625 sriov_disable(dev);
626}
627EXPORT_SYMBOL_GPL(pci_disable_sriov);
74bb1bcc 628
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629/**
630 * pci_num_vf - return number of VFs associated with a PF device_release_driver
631 * @dev: the PCI device
632 *
633 * Returns number of VFs, or 0 if SR-IOV is not enabled.
634 */
635int pci_num_vf(struct pci_dev *dev)
636{
1452cd76 637 if (!dev->is_physfn)
fb8a0d9d 638 return 0;
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639
640 return dev->sriov->num_VFs;
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641}
642EXPORT_SYMBOL_GPL(pci_num_vf);
bff73156 643
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644/**
645 * pci_vfs_assigned - returns number of VFs are assigned to a guest
646 * @dev: the PCI device
647 *
648 * Returns number of VFs belonging to this device that are assigned to a guest.
652d1100 649 * If device is not a physical function returns 0.
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650 */
651int pci_vfs_assigned(struct pci_dev *dev)
652{
653 struct pci_dev *vfdev;
654 unsigned int vfs_assigned = 0;
655 unsigned short dev_id;
656
657 /* only search if we are a PF */
658 if (!dev->is_physfn)
659 return 0;
660
661 /*
662 * determine the device ID for the VFs, the vendor ID will be the
663 * same as the PF so there is no need to check for that one
664 */
665 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id);
666
667 /* loop through all the VFs to see if we own any that are assigned */
668 vfdev = pci_get_device(dev->vendor, dev_id, NULL);
669 while (vfdev) {
670 /*
671 * It is considered assigned if it is a virtual function with
672 * our dev as the physical function and the assigned bit is set
673 */
674 if (vfdev->is_virtfn && (vfdev->physfn == dev) &&
be63497c 675 pci_is_dev_assigned(vfdev))
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676 vfs_assigned++;
677
678 vfdev = pci_get_device(dev->vendor, dev_id, vfdev);
679 }
680
681 return vfs_assigned;
682}
683EXPORT_SYMBOL_GPL(pci_vfs_assigned);
684
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685/**
686 * pci_sriov_set_totalvfs -- reduce the TotalVFs available
687 * @dev: the PCI PF device
2094f167 688 * @numvfs: number that should be used for TotalVFs supported
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689 *
690 * Should be called from PF driver's probe routine with
691 * device's mutex held.
692 *
693 * Returns 0 if PF is an SRIOV-capable device and
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694 * value of numvfs valid. If not a PF return -ENOSYS;
695 * if numvfs is invalid return -EINVAL;
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696 * if VFs already enabled, return -EBUSY.
697 */
698int pci_sriov_set_totalvfs(struct pci_dev *dev, u16 numvfs)
699{
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700 if (!dev->is_physfn)
701 return -ENOSYS;
702 if (numvfs > dev->sriov->total_VFs)
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703 return -EINVAL;
704
705 /* Shouldn't change if VFs already enabled */
706 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE)
707 return -EBUSY;
708 else
6b136724 709 dev->sriov->driver_max_VFs = numvfs;
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710
711 return 0;
712}
713EXPORT_SYMBOL_GPL(pci_sriov_set_totalvfs);
714
715/**
ddc191f5 716 * pci_sriov_get_totalvfs -- get total VFs supported on this device
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717 * @dev: the PCI PF device
718 *
719 * For a PCIe device with SRIOV support, return the PCIe
6b136724 720 * SRIOV capability value of TotalVFs or the value of driver_max_VFs
652d1100 721 * if the driver reduced it. Otherwise 0.
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722 */
723int pci_sriov_get_totalvfs(struct pci_dev *dev)
724{
1452cd76 725 if (!dev->is_physfn)
652d1100 726 return 0;
bff73156 727
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728 if (dev->sriov->driver_max_VFs)
729 return dev->sriov->driver_max_VFs;
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730
731 return dev->sriov->total_VFs;
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732}
733EXPORT_SYMBOL_GPL(pci_sriov_get_totalvfs);
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