[deliverable/linux.git] / drivers / pci / msi.h

/*
 * Copyright (C) 2003-2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#ifndef MSI_H
#define MSI_H

#define PCI_MSIX_ENTRY_SIZE			16
#define  PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET	0
#define  PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET	4
#define  PCI_MSIX_ENTRY_DATA_OFFSET		8
#define  PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET	12

#define msi_control_reg(base)		(base + PCI_MSI_FLAGS)
#define msi_lower_address_reg(base)	(base + PCI_MSI_ADDRESS_LO)
#define msi_upper_address_reg(base)	(base + PCI_MSI_ADDRESS_HI)
#define msi_data_reg(base, is64bit)	\
	( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 )
#define msi_mask_bits_reg(base, is64bit) \
	( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
#define is_64bit_address(control)	(!!(control & PCI_MSI_FLAGS_64BIT))
#define is_mask_bit_support(control)	(!!(control & PCI_MSI_FLAGS_MASKBIT))

#define msix_table_offset_reg(base)	(base + 0x04)
#define msix_pba_offset_reg(base)	(base + 0x08)
#define msix_table_size(control) 	((control & PCI_MSIX_FLAGS_QSIZE)+1)
#define multi_msix_capable(control)	msix_table_size((control))

#endif /* MSI_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* Copyright (C) 2003-2004 Intel
	3	* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
	4	*/
	5
	6	#ifndef MSI_H
	7	#define MSI_H
	8
1da177e4	9	#define PCI_MSIX_ENTRY_SIZE 16
70549ad9 GKH	10	#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0
	11	#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4
	12	#define PCI_MSIX_ENTRY_DATA_OFFSET 8
	13	#define PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET 12
1da177e4 LT	14
	15	#define msi_control_reg(base) (base + PCI_MSI_FLAGS)
	16	#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO)
	17	#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI)
	18	#define msi_data_reg(base, is64bit) \
	19	( (is64bit == 1) ? base+PCI_MSI_DATA_64 : base+PCI_MSI_DATA_32 )
	20	#define msi_mask_bits_reg(base, is64bit) \
	21	( (is64bit == 1) ? base+PCI_MSI_MASK_BIT : base+PCI_MSI_MASK_BIT-4)
dd159eec EB	22	#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT))
dd159eec EB	23	#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT))
1da177e4	24
1da177e4 LT	25	#define msix_table_offset_reg(base) (base + 0x04)
1da177e4 LT	26	#define msix_pba_offset_reg(base) (base + 0x08)
1da177e4	27	#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1)
04846b5b	28	#define multi_msix_capable(control) msix_table_size((control))
1da177e4	29
1da177e4	30	#endif /* MSI_H */