PCI: expose boot VGA device via sysfs.
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
1da177e4
LT
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
e404e274 33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
bdee9d98
DT
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 61 unsigned long val;
bdee9d98 62
92425a40
TP
63 if (strict_strtoul(buf, 0, &val) < 0)
64 return -EINVAL;
65
66 pdev->broken_parity_status = !!val;
67
68 return count;
bdee9d98
DT
69}
70
4327edf6
AC
71static ssize_t local_cpus_show(struct device *dev,
72 struct device_attribute *attr, char *buf)
1da177e4 73{
3be83050 74 const struct cpumask *mask;
4327edf6
AC
75 int len;
76
3be83050
MT
77 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
78 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
79 buf[len++] = '\n';
80 buf[len] = '\0';
81 return len;
82}
83
84
85static ssize_t local_cpulist_show(struct device *dev,
86 struct device_attribute *attr, char *buf)
87{
3be83050 88 const struct cpumask *mask;
39106dcf
MT
89 int len;
90
3be83050
MT
91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
92 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
93 buf[len++] = '\n';
94 buf[len] = '\0';
95 return len;
1da177e4
LT
96}
97
98/* show resources */
99static ssize_t
e404e274 100resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
101{
102 struct pci_dev * pci_dev = to_pci_dev(dev);
103 char * str = buf;
104 int i;
fde09c6d 105 int max;
e31dd6e4 106 resource_size_t start, end;
1da177e4
LT
107
108 if (pci_dev->subordinate)
109 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
110 else
111 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
112
113 for (i = 0; i < max; i++) {
2311b1f2
ME
114 struct resource *res = &pci_dev->resource[i];
115 pci_resource_to_user(pci_dev, i, res, &start, &end);
116 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
117 (unsigned long long)start,
118 (unsigned long long)end,
119 (unsigned long long)res->flags);
1da177e4
LT
120 }
121 return (str - buf);
122}
123
87c8a443 124static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
125{
126 struct pci_dev *pci_dev = to_pci_dev(dev);
127
128 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
129 pci_dev->vendor, pci_dev->device,
130 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
131 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
132 (u8)(pci_dev->class));
133}
bae94d02
IPG
134
135static ssize_t is_enabled_store(struct device *dev,
136 struct device_attribute *attr, const char *buf,
137 size_t count)
9f125d30
AV
138{
139 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
140 unsigned long val;
141 ssize_t result = strict_strtoul(buf, 0, &val);
142
143 if (result < 0)
144 return result;
9f125d30
AV
145
146 /* this can crash the machine when done on the "wrong" device */
147 if (!capable(CAP_SYS_ADMIN))
92425a40 148 return -EPERM;
9f125d30 149
92425a40 150 if (!val) {
bae94d02
IPG
151 if (atomic_read(&pdev->enable_cnt) != 0)
152 pci_disable_device(pdev);
153 else
154 result = -EIO;
92425a40 155 } else
bae94d02 156 result = pci_enable_device(pdev);
9f125d30 157
bae94d02
IPG
158 return result < 0 ? result : count;
159}
160
161static ssize_t is_enabled_show(struct device *dev,
162 struct device_attribute *attr, char *buf)
163{
164 struct pci_dev *pdev;
9f125d30 165
bae94d02
IPG
166 pdev = to_pci_dev (dev);
167 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
168}
169
81bb0e19
BG
170#ifdef CONFIG_NUMA
171static ssize_t
172numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
173{
174 return sprintf (buf, "%d\n", dev->numa_node);
175}
176#endif
177
fe97064c
BG
178static ssize_t
179msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
180{
181 struct pci_dev *pdev = to_pci_dev(dev);
182
183 if (!pdev->subordinate)
184 return 0;
185
186 return sprintf (buf, "%u\n",
187 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
188}
189
190static ssize_t
191msi_bus_store(struct device *dev, struct device_attribute *attr,
192 const char *buf, size_t count)
193{
194 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
195 unsigned long val;
196
197 if (strict_strtoul(buf, 0, &val) < 0)
198 return -EINVAL;
fe97064c
BG
199
200 /* bad things may happen if the no_msi flag is changed
201 * while some drivers are loaded */
202 if (!capable(CAP_SYS_ADMIN))
92425a40 203 return -EPERM;
fe97064c 204
92425a40
TP
205 /* Maybe pci devices without subordinate busses shouldn't even have this
206 * attribute in the first place? */
fe97064c
BG
207 if (!pdev->subordinate)
208 return count;
209
92425a40
TP
210 /* Is the flag going to change, or keep the value it already had? */
211 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
212 !!val) {
213 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 214
92425a40
TP
215 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
216 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
217 }
218
219 return count;
220}
9888549e 221
1da177e4
LT
222struct device_attribute pci_dev_attrs[] = {
223 __ATTR_RO(resource),
224 __ATTR_RO(vendor),
225 __ATTR_RO(device),
226 __ATTR_RO(subsystem_vendor),
227 __ATTR_RO(subsystem_device),
228 __ATTR_RO(class),
229 __ATTR_RO(irq),
230 __ATTR_RO(local_cpus),
39106dcf 231 __ATTR_RO(local_cpulist),
9888549e 232 __ATTR_RO(modalias),
81bb0e19
BG
233#ifdef CONFIG_NUMA
234 __ATTR_RO(numa_node),
235#endif
9f125d30 236 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
237 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
238 broken_parity_status_show,broken_parity_status_store),
fe97064c 239 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
240 __ATTR_NULL,
241};
242
217f45de
DA
243static ssize_t
244boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
245{
246 struct pci_dev *pdev = to_pci_dev(dev);
247
248 return sprintf(buf, "%u\n",
249 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
250 IORESOURCE_ROM_SHADOW));
251}
252struct device_attribute vga_attr = __ATTR_RO(boot_vga);
253
1da177e4 254static ssize_t
91a69029
ZR
255pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
256 char *buf, loff_t off, size_t count)
1da177e4
LT
257{
258 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
259 unsigned int size = 64;
260 loff_t init_off = off;
4c0619ad 261 u8 *data = (u8*) buf;
1da177e4
LT
262
263 /* Several chips lock up trying to read undefined config space */
264 if (capable(CAP_SYS_ADMIN)) {
265 size = dev->cfg_size;
266 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
267 size = 128;
268 }
269
270 if (off > size)
271 return 0;
272 if (off + count > size) {
273 size -= off;
274 count = size;
275 } else {
276 size = count;
277 }
278
4c0619ad 279 if ((off & 1) && size) {
280 u8 val;
e04b0ea2 281 pci_user_read_config_byte(dev, off, &val);
4c0619ad 282 data[off - init_off] = val;
1da177e4 283 off++;
4c0619ad 284 size--;
285 }
286
287 if ((off & 3) && size > 2) {
288 u16 val;
e04b0ea2 289 pci_user_read_config_word(dev, off, &val);
4c0619ad 290 data[off - init_off] = val & 0xff;
291 data[off - init_off + 1] = (val >> 8) & 0xff;
292 off += 2;
293 size -= 2;
1da177e4
LT
294 }
295
296 while (size > 3) {
4c0619ad 297 u32 val;
e04b0ea2 298 pci_user_read_config_dword(dev, off, &val);
4c0619ad 299 data[off - init_off] = val & 0xff;
300 data[off - init_off + 1] = (val >> 8) & 0xff;
301 data[off - init_off + 2] = (val >> 16) & 0xff;
302 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
303 off += 4;
304 size -= 4;
305 }
306
4c0619ad 307 if (size >= 2) {
308 u16 val;
e04b0ea2 309 pci_user_read_config_word(dev, off, &val);
4c0619ad 310 data[off - init_off] = val & 0xff;
311 data[off - init_off + 1] = (val >> 8) & 0xff;
312 off += 2;
313 size -= 2;
314 }
315
316 if (size > 0) {
317 u8 val;
e04b0ea2 318 pci_user_read_config_byte(dev, off, &val);
4c0619ad 319 data[off - init_off] = val;
1da177e4
LT
320 off++;
321 --size;
322 }
323
324 return count;
325}
326
327static ssize_t
91a69029
ZR
328pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
329 char *buf, loff_t off, size_t count)
1da177e4
LT
330{
331 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
332 unsigned int size = count;
333 loff_t init_off = off;
4c0619ad 334 u8 *data = (u8*) buf;
1da177e4
LT
335
336 if (off > dev->cfg_size)
337 return 0;
338 if (off + count > dev->cfg_size) {
339 size = dev->cfg_size - off;
340 count = size;
341 }
4c0619ad 342
343 if ((off & 1) && size) {
e04b0ea2 344 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 345 off++;
4c0619ad 346 size--;
1da177e4 347 }
4c0619ad 348
349 if ((off & 3) && size > 2) {
350 u16 val = data[off - init_off];
351 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 352 pci_user_write_config_word(dev, off, val);
4c0619ad 353 off += 2;
354 size -= 2;
355 }
1da177e4
LT
356
357 while (size > 3) {
4c0619ad 358 u32 val = data[off - init_off];
359 val |= (u32) data[off - init_off + 1] << 8;
360 val |= (u32) data[off - init_off + 2] << 16;
361 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 362 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
363 off += 4;
364 size -= 4;
365 }
4c0619ad 366
367 if (size >= 2) {
368 u16 val = data[off - init_off];
369 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 370 pci_user_write_config_word(dev, off, val);
4c0619ad 371 off += 2;
372 size -= 2;
373 }
1da177e4 374
4c0619ad 375 if (size) {
e04b0ea2 376 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
377 off++;
378 --size;
379 }
380
381 return count;
382}
383
94e61088 384static ssize_t
287d19ce
SH
385read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
386 char *buf, loff_t off, size_t count)
94e61088
BH
387{
388 struct pci_dev *dev =
389 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
390
391 if (off > bin_attr->size)
392 count = 0;
393 else if (count > bin_attr->size - off)
394 count = bin_attr->size - off;
94e61088 395
287d19ce 396 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
397}
398
399static ssize_t
287d19ce
SH
400write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
401 char *buf, loff_t off, size_t count)
94e61088
BH
402{
403 struct pci_dev *dev =
404 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
405
406 if (off > bin_attr->size)
407 count = 0;
408 else if (count > bin_attr->size - off)
409 count = bin_attr->size - off;
94e61088 410
287d19ce 411 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
412}
413
1da177e4
LT
414#ifdef HAVE_PCI_LEGACY
415/**
416 * pci_read_legacy_io - read byte(s) from legacy I/O port space
417 * @kobj: kobject corresponding to file to read from
418 * @buf: buffer to store results
419 * @off: offset into legacy I/O port space
420 * @count: number of bytes to read
421 *
422 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
423 * callback routine (pci_legacy_read).
424 */
f19aeb1f 425static ssize_t
91a69029
ZR
426pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
427 char *buf, loff_t off, size_t count)
1da177e4
LT
428{
429 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 430 struct device,
1da177e4
LT
431 kobj));
432
433 /* Only support 1, 2 or 4 byte accesses */
434 if (count != 1 && count != 2 && count != 4)
435 return -EINVAL;
436
437 return pci_legacy_read(bus, off, (u32 *)buf, count);
438}
439
440/**
441 * pci_write_legacy_io - write byte(s) to legacy I/O port space
442 * @kobj: kobject corresponding to file to read from
443 * @buf: buffer containing value to be written
444 * @off: offset into legacy I/O port space
445 * @count: number of bytes to write
446 *
447 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
448 * callback routine (pci_legacy_write).
449 */
f19aeb1f 450static ssize_t
91a69029
ZR
451pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
452 char *buf, loff_t off, size_t count)
1da177e4
LT
453{
454 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 455 struct device,
1da177e4
LT
456 kobj));
457 /* Only support 1, 2 or 4 byte accesses */
458 if (count != 1 && count != 2 && count != 4)
459 return -EINVAL;
460
461 return pci_legacy_write(bus, off, *(u32 *)buf, count);
462}
463
464/**
465 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
466 * @kobj: kobject corresponding to device to be mapped
467 * @attr: struct bin_attribute for this file
468 * @vma: struct vm_area_struct passed to mmap
469 *
f19aeb1f 470 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
471 * legacy memory space (first meg of bus space) into application virtual
472 * memory space.
473 */
f19aeb1f 474static int
1da177e4
LT
475pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
476 struct vm_area_struct *vma)
477{
478 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 479 struct device,
1da177e4
LT
480 kobj));
481
f19aeb1f
BH
482 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
483}
484
485/**
486 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
487 * @kobj: kobject corresponding to device to be mapped
488 * @attr: struct bin_attribute for this file
489 * @vma: struct vm_area_struct passed to mmap
490 *
491 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
492 * legacy IO space (first meg of bus space) into application virtual
493 * memory space. Returns -ENOSYS if the operation isn't supported
494 */
495static int
496pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
497 struct vm_area_struct *vma)
498{
499 struct pci_bus *bus = to_pci_bus(container_of(kobj,
500 struct device,
501 kobj));
502
503 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
504}
505
10a0ef39
IK
506/**
507 * pci_adjust_legacy_attr - adjustment of legacy file attributes
508 * @b: bus to create files under
509 * @mmap_type: I/O port or memory
510 *
511 * Stub implementation. Can be overridden by arch if necessary.
512 */
513void __weak
514pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
515{
516 return;
517}
518
f19aeb1f
BH
519/**
520 * pci_create_legacy_files - create legacy I/O port and memory files
521 * @b: bus to create files under
522 *
523 * Some platforms allow access to legacy I/O port and ISA memory space on
524 * a per-bus basis. This routine creates the files and ties them into
525 * their associated read, write and mmap files from pci-sysfs.c
526 *
527 * On error unwind, but don't propogate the error to the caller
528 * as it is ok to set up the PCI bus without these files.
529 */
530void pci_create_legacy_files(struct pci_bus *b)
531{
532 int error;
533
534 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
535 GFP_ATOMIC);
536 if (!b->legacy_io)
537 goto kzalloc_err;
538
539 b->legacy_io->attr.name = "legacy_io";
540 b->legacy_io->size = 0xffff;
541 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
542 b->legacy_io->read = pci_read_legacy_io;
543 b->legacy_io->write = pci_write_legacy_io;
544 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 545 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
546 error = device_create_bin_file(&b->dev, b->legacy_io);
547 if (error)
548 goto legacy_io_err;
549
550 /* Allocated above after the legacy_io struct */
551 b->legacy_mem = b->legacy_io + 1;
552 b->legacy_mem->attr.name = "legacy_mem";
553 b->legacy_mem->size = 1024*1024;
554 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
555 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 556 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
557 error = device_create_bin_file(&b->dev, b->legacy_mem);
558 if (error)
559 goto legacy_mem_err;
560
561 return;
562
563legacy_mem_err:
564 device_remove_bin_file(&b->dev, b->legacy_io);
565legacy_io_err:
566 kfree(b->legacy_io);
567 b->legacy_io = NULL;
568kzalloc_err:
569 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
570 "and ISA memory resources to sysfs\n");
571 return;
572}
573
574void pci_remove_legacy_files(struct pci_bus *b)
575{
576 if (b->legacy_io) {
577 device_remove_bin_file(&b->dev, b->legacy_io);
578 device_remove_bin_file(&b->dev, b->legacy_mem);
579 kfree(b->legacy_io); /* both are allocated here */
580 }
1da177e4
LT
581}
582#endif /* HAVE_PCI_LEGACY */
583
584#ifdef HAVE_PCI_MMAP
b5ff7df3 585
9eff02e2 586int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
b5ff7df3
LT
587{
588 unsigned long nr, start, size;
589
590 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
591 start = vma->vm_pgoff;
88e7df0b 592 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
593 if (start < size && size - start >= nr)
594 return 1;
595 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
596 current->comm, start, start+nr, pci_name(pdev), resno, size);
597 return 0;
598}
599
1da177e4
LT
600/**
601 * pci_mmap_resource - map a PCI resource into user memory space
602 * @kobj: kobject for mapping
603 * @attr: struct bin_attribute for the file being mapped
604 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 605 * @write_combine: 1 for write_combine mapping
1da177e4
LT
606 *
607 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
608 */
609static int
610pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 611 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
612{
613 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
614 struct device, kobj));
615 struct resource *res = (struct resource *)attr->private;
616 enum pci_mmap_state mmap_type;
e31dd6e4 617 resource_size_t start, end;
2311b1f2 618 int i;
1da177e4 619
2311b1f2
ME
620 for (i = 0; i < PCI_ROM_RESOURCE; i++)
621 if (res == &pdev->resource[i])
622 break;
623 if (i >= PCI_ROM_RESOURCE)
624 return -ENODEV;
625
b5ff7df3
LT
626 if (!pci_mmap_fits(pdev, i, vma))
627 return -EINVAL;
628
2311b1f2
ME
629 /* pci_mmap_page_range() expects the same kind of entry as coming
630 * from /proc/bus/pci/ which is a "user visible" value. If this is
631 * different from the resource itself, arch will do necessary fixup.
632 */
633 pci_resource_to_user(pdev, i, res, &start, &end);
634 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
635 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
636
e8de1481
AV
637 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
638 return -EINVAL;
639
45aec1ae 640 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
641}
642
643static int
644pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
645 struct vm_area_struct *vma)
646{
647 return pci_mmap_resource(kobj, attr, vma, 0);
648}
649
650static int
651pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
652 struct vm_area_struct *vma)
653{
654 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
655}
656
b19441af
GKH
657/**
658 * pci_remove_resource_files - cleanup resource files
659 * @dev: dev to cleanup
660 *
661 * If we created resource files for @dev, remove them from sysfs and
662 * free their resources.
663 */
664static void
665pci_remove_resource_files(struct pci_dev *pdev)
666{
667 int i;
668
669 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
670 struct bin_attribute *res_attr;
671
672 res_attr = pdev->res_attr[i];
673 if (res_attr) {
674 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
675 kfree(res_attr);
676 }
45aec1ae 677
678 res_attr = pdev->res_attr_wc[i];
679 if (res_attr) {
680 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
681 kfree(res_attr);
682 }
b19441af
GKH
683 }
684}
685
45aec1ae 686static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
687{
688 /* allocate attribute structure, piggyback attribute name */
689 int name_len = write_combine ? 13 : 10;
690 struct bin_attribute *res_attr;
691 int retval;
692
693 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
694 if (res_attr) {
695 char *res_attr_name = (char *)(res_attr + 1);
696
697 if (write_combine) {
698 pdev->res_attr_wc[num] = res_attr;
699 sprintf(res_attr_name, "resource%d_wc", num);
700 res_attr->mmap = pci_mmap_resource_wc;
701 } else {
702 pdev->res_attr[num] = res_attr;
703 sprintf(res_attr_name, "resource%d", num);
704 res_attr->mmap = pci_mmap_resource_uc;
705 }
706 res_attr->attr.name = res_attr_name;
707 res_attr->attr.mode = S_IRUSR | S_IWUSR;
708 res_attr->size = pci_resource_len(pdev, num);
709 res_attr->private = &pdev->resource[num];
710 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
711 } else
712 retval = -ENOMEM;
713
714 return retval;
715}
716
1da177e4
LT
717/**
718 * pci_create_resource_files - create resource files in sysfs for @dev
719 * @dev: dev in question
720 *
721 * Walk the resources in @dev creating files for each resource available.
722 */
b19441af 723static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
724{
725 int i;
b19441af 726 int retval;
1da177e4
LT
727
728 /* Expose the PCI resources from this device as files */
729 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
730
731 /* skip empty resources */
732 if (!pci_resource_len(pdev, i))
733 continue;
734
45aec1ae 735 retval = pci_create_attr(pdev, i, 0);
736 /* for prefetchable resources, create a WC mappable file */
737 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
738 retval = pci_create_attr(pdev, i, 1);
739
740 if (retval) {
741 pci_remove_resource_files(pdev);
742 return retval;
1da177e4
LT
743 }
744 }
b19441af 745 return 0;
1da177e4
LT
746}
747#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
748int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
749void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
750#endif /* HAVE_PCI_MMAP */
751
752/**
753 * pci_write_rom - used to enable access to the PCI ROM display
754 * @kobj: kernel object handle
755 * @buf: user input
756 * @off: file offset
757 * @count: number of byte in input
758 *
759 * writing anything except 0 enables it
760 */
761static ssize_t
91a69029
ZR
762pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
763 char *buf, loff_t off, size_t count)
1da177e4
LT
764{
765 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
766
767 if ((off == 0) && (*buf == '0') && (count == 2))
768 pdev->rom_attr_enabled = 0;
769 else
770 pdev->rom_attr_enabled = 1;
771
772 return count;
773}
774
775/**
776 * pci_read_rom - read a PCI ROM
777 * @kobj: kernel object handle
778 * @buf: where to put the data we read from the ROM
779 * @off: file offset
780 * @count: number of bytes to read
781 *
782 * Put @count bytes starting at @off into @buf from the ROM in the PCI
783 * device corresponding to @kobj.
784 */
785static ssize_t
91a69029
ZR
786pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
787 char *buf, loff_t off, size_t count)
1da177e4
LT
788{
789 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
790 void __iomem *rom;
791 size_t size;
792
793 if (!pdev->rom_attr_enabled)
794 return -EINVAL;
795
796 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
797 if (!rom || !size)
798 return -EIO;
1da177e4
LT
799
800 if (off >= size)
801 count = 0;
802 else {
803 if (off + count > size)
804 count = size - off;
805
806 memcpy_fromio(buf, rom + off, count);
807 }
808 pci_unmap_rom(pdev, rom);
809
810 return count;
811}
812
813static struct bin_attribute pci_config_attr = {
814 .attr = {
815 .name = "config",
816 .mode = S_IRUGO | S_IWUSR,
1da177e4 817 },
557848c3 818 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
819 .read = pci_read_config,
820 .write = pci_write_config,
821};
822
823static struct bin_attribute pcie_config_attr = {
824 .attr = {
825 .name = "config",
826 .mode = S_IRUGO | S_IWUSR,
1da177e4 827 },
557848c3 828 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
829 .read = pci_read_config,
830 .write = pci_write_config,
831};
832
a2cd52ca 833int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 834{
a2cd52ca 835 return 0;
575e3348
ME
836}
837
280c73d3
ZY
838static int pci_create_capabilities_sysfs(struct pci_dev *dev)
839{
840 int retval;
841 struct bin_attribute *attr;
842
843 /* If the device has VPD, try to expose it in sysfs. */
844 if (dev->vpd) {
845 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
846 if (!attr)
847 return -ENOMEM;
848
849 attr->size = dev->vpd->len;
850 attr->attr.name = "vpd";
851 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
852 attr->read = read_vpd_attr;
853 attr->write = write_vpd_attr;
280c73d3
ZY
854 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
855 if (retval) {
856 kfree(dev->vpd->attr);
857 return retval;
858 }
859 dev->vpd->attr = attr;
860 }
861
862 /* Active State Power Management */
863 pcie_aspm_create_sysfs_dev_files(dev);
864
865 return 0;
866}
867
b19441af 868int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 869{
b19441af 870 int retval;
280c73d3
ZY
871 int rom_size = 0;
872 struct bin_attribute *attr;
b19441af 873
1da177e4
LT
874 if (!sysfs_initialized)
875 return -EACCES;
876
557848c3 877 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 878 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 879 else
b19441af
GKH
880 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
881 if (retval)
882 goto err;
1da177e4 883
b19441af
GKH
884 retval = pci_create_resource_files(pdev);
885 if (retval)
280c73d3
ZY
886 goto err_config_file;
887
888 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
889 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
890 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
891 rom_size = 0x20000;
1da177e4
LT
892
893 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 894 if (rom_size) {
94e61088 895 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 896 if (!attr) {
b19441af 897 retval = -ENOMEM;
9890b12a 898 goto err_resource_files;
1da177e4 899 }
280c73d3
ZY
900 attr->size = rom_size;
901 attr->attr.name = "rom";
902 attr->attr.mode = S_IRUSR;
903 attr->read = pci_read_rom;
904 attr->write = pci_write_rom;
905 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
906 if (retval) {
907 kfree(attr);
908 goto err_resource_files;
909 }
910 pdev->rom_attr = attr;
1da177e4 911 }
280c73d3 912
217f45de
DA
913 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
914 retval = device_create_file(&pdev->dev, &vga_attr);
915 if (retval)
916 goto err_rom_file;
917 }
918
1da177e4 919 /* add platform-specific attributes */
280c73d3
ZY
920 retval = pcibios_add_platform_entries(pdev);
921 if (retval)
217f45de 922 goto err_vga_file;
b19441af 923
280c73d3
ZY
924 /* add sysfs entries for various capabilities */
925 retval = pci_create_capabilities_sysfs(pdev);
926 if (retval)
217f45de 927 goto err_vga_file;
7d715a6c 928
1da177e4 929 return 0;
b19441af 930
217f45de
DA
931err_vga_file:
932 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
933 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 934err_rom_file:
280c73d3 935 if (rom_size) {
94e61088 936 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
937 kfree(pdev->rom_attr);
938 pdev->rom_attr = NULL;
939 }
9890b12a
ME
940err_resource_files:
941 pci_remove_resource_files(pdev);
94e61088 942err_config_file:
557848c3 943 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
944 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
945 else
946 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
947err:
948 return retval;
1da177e4
LT
949}
950
280c73d3
ZY
951static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
952{
953 if (dev->vpd && dev->vpd->attr) {
954 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
955 kfree(dev->vpd->attr);
956 }
957
958 pcie_aspm_remove_sysfs_dev_files(dev);
959}
960
1da177e4
LT
961/**
962 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
963 * @pdev: device whose entries we should free
964 *
965 * Cleanup when @pdev is removed from sysfs.
966 */
967void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
968{
280c73d3
ZY
969 int rom_size = 0;
970
d67afe5e
DM
971 if (!sysfs_initialized)
972 return;
973
280c73d3 974 pci_remove_capabilities_sysfs(pdev);
7d715a6c 975
557848c3 976 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
977 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
978 else
979 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
980
981 pci_remove_resource_files(pdev);
982
280c73d3
ZY
983 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
984 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
985 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
986 rom_size = 0x20000;
987
988 if (rom_size && pdev->rom_attr) {
989 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
990 kfree(pdev->rom_attr);
1da177e4
LT
991 }
992}
993
994static int __init pci_sysfs_init(void)
995{
996 struct pci_dev *pdev = NULL;
b19441af
GKH
997 int retval;
998
1da177e4 999 sysfs_initialized = 1;
b19441af
GKH
1000 for_each_pci_dev(pdev) {
1001 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1002 if (retval) {
1003 pci_dev_put(pdev);
b19441af 1004 return retval;
151fc5df 1005 }
b19441af 1006 }
1da177e4
LT
1007
1008 return 0;
1009}
1010
40ee9e9f 1011late_initcall(pci_sysfs_init);
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