Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/pci/pci-sysfs.c | |
3 | * | |
4 | * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com> | |
5 | * (C) Copyright 2002-2004 IBM Corp. | |
6 | * (C) Copyright 2003 Matthew Wilcox | |
7 | * (C) Copyright 2003 Hewlett-Packard | |
8 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
9 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
10 | * | |
11 | * File attributes for PCI devices | |
12 | * | |
13 | * Modeled after usb's driverfs.c | |
14 | * | |
15 | */ | |
16 | ||
17 | ||
1da177e4 | 18 | #include <linux/kernel.h> |
b5ff7df3 | 19 | #include <linux/sched.h> |
1da177e4 LT |
20 | #include <linux/pci.h> |
21 | #include <linux/stat.h> | |
363c75db | 22 | #include <linux/export.h> |
1da177e4 LT |
23 | #include <linux/topology.h> |
24 | #include <linux/mm.h> | |
de139a33 | 25 | #include <linux/fs.h> |
aa0ac365 | 26 | #include <linux/capability.h> |
a628e7b8 | 27 | #include <linux/security.h> |
7d715a6c | 28 | #include <linux/pci-aspm.h> |
5a0e3ad6 | 29 | #include <linux/slab.h> |
1a39b310 | 30 | #include <linux/vgaarb.h> |
448bd857 | 31 | #include <linux/pm_runtime.h> |
1da177e4 LT |
32 | #include "pci.h" |
33 | ||
34 | static int sysfs_initialized; /* = 0 */ | |
35 | ||
36 | /* show configuration fields */ | |
37 | #define pci_config_attr(field, format_string) \ | |
38 | static ssize_t \ | |
e404e274 | 39 | field##_show(struct device *dev, struct device_attribute *attr, char *buf) \ |
1da177e4 LT |
40 | { \ |
41 | struct pci_dev *pdev; \ | |
42 | \ | |
43 | pdev = to_pci_dev (dev); \ | |
44 | return sprintf (buf, format_string, pdev->field); \ | |
5136b2da GKH |
45 | } \ |
46 | static DEVICE_ATTR_RO(field) | |
1da177e4 LT |
47 | |
48 | pci_config_attr(vendor, "0x%04x\n"); | |
49 | pci_config_attr(device, "0x%04x\n"); | |
50 | pci_config_attr(subsystem_vendor, "0x%04x\n"); | |
51 | pci_config_attr(subsystem_device, "0x%04x\n"); | |
52 | pci_config_attr(class, "0x%06x\n"); | |
53 | pci_config_attr(irq, "%u\n"); | |
54 | ||
bdee9d98 DT |
55 | static ssize_t broken_parity_status_show(struct device *dev, |
56 | struct device_attribute *attr, | |
57 | char *buf) | |
58 | { | |
59 | struct pci_dev *pdev = to_pci_dev(dev); | |
60 | return sprintf (buf, "%u\n", pdev->broken_parity_status); | |
61 | } | |
62 | ||
63 | static ssize_t broken_parity_status_store(struct device *dev, | |
64 | struct device_attribute *attr, | |
65 | const char *buf, size_t count) | |
66 | { | |
67 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 68 | unsigned long val; |
bdee9d98 | 69 | |
9a994e8e | 70 | if (kstrtoul(buf, 0, &val) < 0) |
92425a40 TP |
71 | return -EINVAL; |
72 | ||
73 | pdev->broken_parity_status = !!val; | |
74 | ||
75 | return count; | |
bdee9d98 | 76 | } |
5136b2da | 77 | static DEVICE_ATTR_RW(broken_parity_status); |
bdee9d98 | 78 | |
c489f5fb YW |
79 | static ssize_t pci_dev_show_local_cpu(struct device *dev, |
80 | int type, | |
81 | struct device_attribute *attr, | |
82 | char *buf) | |
83 | { | |
3be83050 | 84 | const struct cpumask *mask; |
4327edf6 AC |
85 | int len; |
86 | ||
e0cd5160 | 87 | #ifdef CONFIG_NUMA |
6be954d1 DJ |
88 | mask = (dev_to_node(dev) == -1) ? cpu_online_mask : |
89 | cpumask_of_node(dev_to_node(dev)); | |
e0cd5160 | 90 | #else |
3be83050 | 91 | mask = cpumask_of_pcibus(to_pci_dev(dev)->bus); |
e0cd5160 | 92 | #endif |
c489f5fb YW |
93 | len = type ? |
94 | cpumask_scnprintf(buf, PAGE_SIZE-2, mask) : | |
95 | cpulist_scnprintf(buf, PAGE_SIZE-2, mask); | |
96 | ||
39106dcf MT |
97 | buf[len++] = '\n'; |
98 | buf[len] = '\0'; | |
99 | return len; | |
100 | } | |
101 | ||
c489f5fb YW |
102 | static ssize_t local_cpus_show(struct device *dev, |
103 | struct device_attribute *attr, char *buf) | |
104 | { | |
105 | return pci_dev_show_local_cpu(dev, 1, attr, buf); | |
106 | } | |
5136b2da | 107 | static DEVICE_ATTR_RO(local_cpus); |
39106dcf MT |
108 | |
109 | static ssize_t local_cpulist_show(struct device *dev, | |
110 | struct device_attribute *attr, char *buf) | |
111 | { | |
c489f5fb | 112 | return pci_dev_show_local_cpu(dev, 0, attr, buf); |
1da177e4 | 113 | } |
5136b2da | 114 | static DEVICE_ATTR_RO(local_cpulist); |
1da177e4 | 115 | |
dc2c2c9d YL |
116 | /* |
117 | * PCI Bus Class Devices | |
118 | */ | |
119 | static ssize_t pci_bus_show_cpuaffinity(struct device *dev, | |
120 | int type, | |
121 | struct device_attribute *attr, | |
122 | char *buf) | |
123 | { | |
124 | int ret; | |
125 | const struct cpumask *cpumask; | |
126 | ||
127 | cpumask = cpumask_of_pcibus(to_pci_bus(dev)); | |
128 | ret = type ? | |
129 | cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) : | |
130 | cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask); | |
131 | buf[ret++] = '\n'; | |
132 | buf[ret] = '\0'; | |
133 | return ret; | |
134 | } | |
135 | ||
56039e65 GKH |
136 | static ssize_t cpuaffinity_show(struct device *dev, |
137 | struct device_attribute *attr, char *buf) | |
dc2c2c9d YL |
138 | { |
139 | return pci_bus_show_cpuaffinity(dev, 0, attr, buf); | |
140 | } | |
56039e65 | 141 | static DEVICE_ATTR_RO(cpuaffinity); |
dc2c2c9d | 142 | |
56039e65 GKH |
143 | static ssize_t cpulistaffinity_show(struct device *dev, |
144 | struct device_attribute *attr, char *buf) | |
dc2c2c9d YL |
145 | { |
146 | return pci_bus_show_cpuaffinity(dev, 1, attr, buf); | |
147 | } | |
56039e65 | 148 | static DEVICE_ATTR_RO(cpulistaffinity); |
dc2c2c9d | 149 | |
1da177e4 LT |
150 | /* show resources */ |
151 | static ssize_t | |
e404e274 | 152 | resource_show(struct device * dev, struct device_attribute *attr, char * buf) |
1da177e4 LT |
153 | { |
154 | struct pci_dev * pci_dev = to_pci_dev(dev); | |
155 | char * str = buf; | |
156 | int i; | |
fde09c6d | 157 | int max; |
e31dd6e4 | 158 | resource_size_t start, end; |
1da177e4 LT |
159 | |
160 | if (pci_dev->subordinate) | |
161 | max = DEVICE_COUNT_RESOURCE; | |
fde09c6d YZ |
162 | else |
163 | max = PCI_BRIDGE_RESOURCES; | |
1da177e4 LT |
164 | |
165 | for (i = 0; i < max; i++) { | |
2311b1f2 ME |
166 | struct resource *res = &pci_dev->resource[i]; |
167 | pci_resource_to_user(pci_dev, i, res, &start, &end); | |
168 | str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n", | |
169 | (unsigned long long)start, | |
170 | (unsigned long long)end, | |
171 | (unsigned long long)res->flags); | |
1da177e4 LT |
172 | } |
173 | return (str - buf); | |
174 | } | |
5136b2da | 175 | static DEVICE_ATTR_RO(resource); |
1da177e4 | 176 | |
87c8a443 | 177 | static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf) |
9888549e GK |
178 | { |
179 | struct pci_dev *pci_dev = to_pci_dev(dev); | |
180 | ||
181 | return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n", | |
182 | pci_dev->vendor, pci_dev->device, | |
183 | pci_dev->subsystem_vendor, pci_dev->subsystem_device, | |
184 | (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), | |
185 | (u8)(pci_dev->class)); | |
186 | } | |
5136b2da | 187 | static DEVICE_ATTR_RO(modalias); |
bae94d02 | 188 | |
5136b2da GKH |
189 | static ssize_t enabled_store(struct device *dev, |
190 | struct device_attribute *attr, const char *buf, | |
191 | size_t count) | |
9f125d30 AV |
192 | { |
193 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 | 194 | unsigned long val; |
9a994e8e | 195 | ssize_t result = kstrtoul(buf, 0, &val); |
92425a40 TP |
196 | |
197 | if (result < 0) | |
198 | return result; | |
9f125d30 AV |
199 | |
200 | /* this can crash the machine when done on the "wrong" device */ | |
201 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 202 | return -EPERM; |
9f125d30 | 203 | |
92425a40 | 204 | if (!val) { |
296ccb08 | 205 | if (pci_is_enabled(pdev)) |
bae94d02 IPG |
206 | pci_disable_device(pdev); |
207 | else | |
208 | result = -EIO; | |
92425a40 | 209 | } else |
bae94d02 | 210 | result = pci_enable_device(pdev); |
9f125d30 | 211 | |
bae94d02 IPG |
212 | return result < 0 ? result : count; |
213 | } | |
214 | ||
5136b2da GKH |
215 | static ssize_t enabled_show(struct device *dev, |
216 | struct device_attribute *attr, char *buf) | |
bae94d02 IPG |
217 | { |
218 | struct pci_dev *pdev; | |
9f125d30 | 219 | |
bae94d02 IPG |
220 | pdev = to_pci_dev (dev); |
221 | return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt)); | |
9f125d30 | 222 | } |
5136b2da | 223 | static DEVICE_ATTR_RW(enabled); |
9f125d30 | 224 | |
81bb0e19 BG |
225 | #ifdef CONFIG_NUMA |
226 | static ssize_t | |
227 | numa_node_show(struct device *dev, struct device_attribute *attr, char *buf) | |
228 | { | |
229 | return sprintf (buf, "%d\n", dev->numa_node); | |
230 | } | |
5136b2da | 231 | static DEVICE_ATTR_RO(numa_node); |
81bb0e19 BG |
232 | #endif |
233 | ||
bb965401 YL |
234 | static ssize_t |
235 | dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf) | |
236 | { | |
237 | struct pci_dev *pdev = to_pci_dev(dev); | |
238 | ||
239 | return sprintf (buf, "%d\n", fls64(pdev->dma_mask)); | |
240 | } | |
5136b2da | 241 | static DEVICE_ATTR_RO(dma_mask_bits); |
bb965401 YL |
242 | |
243 | static ssize_t | |
244 | consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr, | |
245 | char *buf) | |
246 | { | |
247 | return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask)); | |
248 | } | |
5136b2da | 249 | static DEVICE_ATTR_RO(consistent_dma_mask_bits); |
bb965401 | 250 | |
fe97064c BG |
251 | static ssize_t |
252 | msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf) | |
253 | { | |
254 | struct pci_dev *pdev = to_pci_dev(dev); | |
255 | ||
256 | if (!pdev->subordinate) | |
257 | return 0; | |
258 | ||
259 | return sprintf (buf, "%u\n", | |
260 | !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)); | |
261 | } | |
262 | ||
263 | static ssize_t | |
264 | msi_bus_store(struct device *dev, struct device_attribute *attr, | |
265 | const char *buf, size_t count) | |
266 | { | |
267 | struct pci_dev *pdev = to_pci_dev(dev); | |
92425a40 TP |
268 | unsigned long val; |
269 | ||
9a994e8e | 270 | if (kstrtoul(buf, 0, &val) < 0) |
92425a40 | 271 | return -EINVAL; |
fe97064c BG |
272 | |
273 | /* bad things may happen if the no_msi flag is changed | |
274 | * while some drivers are loaded */ | |
275 | if (!capable(CAP_SYS_ADMIN)) | |
92425a40 | 276 | return -EPERM; |
fe97064c | 277 | |
92425a40 TP |
278 | /* Maybe pci devices without subordinate busses shouldn't even have this |
279 | * attribute in the first place? */ | |
fe97064c BG |
280 | if (!pdev->subordinate) |
281 | return count; | |
282 | ||
92425a40 TP |
283 | /* Is the flag going to change, or keep the value it already had? */ |
284 | if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^ | |
285 | !!val) { | |
286 | pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI; | |
fe97064c | 287 | |
92425a40 TP |
288 | dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI," |
289 | " bad things could happen\n", val ? "" : " not"); | |
fe97064c BG |
290 | } |
291 | ||
292 | return count; | |
293 | } | |
5136b2da | 294 | static DEVICE_ATTR_RW(msi_bus); |
9888549e | 295 | |
705b1aaa AC |
296 | static DEFINE_MUTEX(pci_remove_rescan_mutex); |
297 | static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf, | |
298 | size_t count) | |
299 | { | |
300 | unsigned long val; | |
301 | struct pci_bus *b = NULL; | |
302 | ||
9a994e8e | 303 | if (kstrtoul(buf, 0, &val) < 0) |
705b1aaa AC |
304 | return -EINVAL; |
305 | ||
306 | if (val) { | |
307 | mutex_lock(&pci_remove_rescan_mutex); | |
308 | while ((b = pci_find_next_bus(b)) != NULL) | |
309 | pci_rescan_bus(b); | |
310 | mutex_unlock(&pci_remove_rescan_mutex); | |
311 | } | |
312 | return count; | |
313 | } | |
0f49ba55 | 314 | static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store); |
705b1aaa | 315 | |
bf22c90f | 316 | static struct attribute *pci_bus_attrs[] = { |
0f49ba55 GKH |
317 | &bus_attr_rescan.attr, |
318 | NULL, | |
319 | }; | |
320 | ||
321 | static const struct attribute_group pci_bus_group = { | |
322 | .attrs = pci_bus_attrs, | |
323 | }; | |
324 | ||
325 | const struct attribute_group *pci_bus_groups[] = { | |
326 | &pci_bus_group, | |
327 | NULL, | |
705b1aaa | 328 | }; |
77c27c7b | 329 | |
738a6396 AC |
330 | static ssize_t |
331 | dev_rescan_store(struct device *dev, struct device_attribute *attr, | |
332 | const char *buf, size_t count) | |
333 | { | |
334 | unsigned long val; | |
335 | struct pci_dev *pdev = to_pci_dev(dev); | |
336 | ||
9a994e8e | 337 | if (kstrtoul(buf, 0, &val) < 0) |
738a6396 AC |
338 | return -EINVAL; |
339 | ||
340 | if (val) { | |
341 | mutex_lock(&pci_remove_rescan_mutex); | |
342 | pci_rescan_bus(pdev->bus); | |
343 | mutex_unlock(&pci_remove_rescan_mutex); | |
344 | } | |
345 | return count; | |
346 | } | |
bf22c90f SK |
347 | static struct device_attribute dev_rescan_attr = __ATTR(rescan, |
348 | (S_IWUSR|S_IWGRP), | |
349 | NULL, dev_rescan_store); | |
738a6396 | 350 | |
77c27c7b AC |
351 | static void remove_callback(struct device *dev) |
352 | { | |
353 | struct pci_dev *pdev = to_pci_dev(dev); | |
354 | ||
355 | mutex_lock(&pci_remove_rescan_mutex); | |
210647af | 356 | pci_stop_and_remove_bus_device(pdev); |
77c27c7b AC |
357 | mutex_unlock(&pci_remove_rescan_mutex); |
358 | } | |
359 | ||
360 | static ssize_t | |
361 | remove_store(struct device *dev, struct device_attribute *dummy, | |
362 | const char *buf, size_t count) | |
363 | { | |
364 | int ret = 0; | |
365 | unsigned long val; | |
77c27c7b | 366 | |
9a994e8e | 367 | if (kstrtoul(buf, 0, &val) < 0) |
77c27c7b AC |
368 | return -EINVAL; |
369 | ||
77c27c7b AC |
370 | /* An attribute cannot be unregistered by one of its own methods, |
371 | * so we have to use this roundabout approach. | |
372 | */ | |
373 | if (val) | |
374 | ret = device_schedule_callback(dev, remove_callback); | |
375 | if (ret) | |
376 | count = ret; | |
377 | return count; | |
378 | } | |
bf22c90f SK |
379 | static struct device_attribute dev_remove_attr = __ATTR(remove, |
380 | (S_IWUSR|S_IWGRP), | |
381 | NULL, remove_store); | |
b9d320fc YL |
382 | |
383 | static ssize_t | |
384 | dev_bus_rescan_store(struct device *dev, struct device_attribute *attr, | |
385 | const char *buf, size_t count) | |
386 | { | |
387 | unsigned long val; | |
388 | struct pci_bus *bus = to_pci_bus(dev); | |
389 | ||
9a994e8e | 390 | if (kstrtoul(buf, 0, &val) < 0) |
b9d320fc YL |
391 | return -EINVAL; |
392 | ||
393 | if (val) { | |
394 | mutex_lock(&pci_remove_rescan_mutex); | |
2f320521 YL |
395 | if (!pci_is_root_bus(bus) && list_empty(&bus->devices)) |
396 | pci_rescan_bus_bridge_resize(bus->self); | |
397 | else | |
398 | pci_rescan_bus(bus); | |
b9d320fc YL |
399 | mutex_unlock(&pci_remove_rescan_mutex); |
400 | } | |
401 | return count; | |
402 | } | |
56039e65 | 403 | static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store); |
b9d320fc | 404 | |
448bd857 HY |
405 | #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) |
406 | static ssize_t d3cold_allowed_store(struct device *dev, | |
407 | struct device_attribute *attr, | |
408 | const char *buf, size_t count) | |
409 | { | |
410 | struct pci_dev *pdev = to_pci_dev(dev); | |
411 | unsigned long val; | |
412 | ||
9a994e8e | 413 | if (kstrtoul(buf, 0, &val) < 0) |
448bd857 HY |
414 | return -EINVAL; |
415 | ||
416 | pdev->d3cold_allowed = !!val; | |
417 | pm_runtime_resume(dev); | |
418 | ||
419 | return count; | |
420 | } | |
421 | ||
422 | static ssize_t d3cold_allowed_show(struct device *dev, | |
423 | struct device_attribute *attr, char *buf) | |
424 | { | |
425 | struct pci_dev *pdev = to_pci_dev(dev); | |
426 | return sprintf (buf, "%u\n", pdev->d3cold_allowed); | |
427 | } | |
5136b2da | 428 | static DEVICE_ATTR_RW(d3cold_allowed); |
448bd857 HY |
429 | #endif |
430 | ||
1789382a DD |
431 | #ifdef CONFIG_PCI_IOV |
432 | static ssize_t sriov_totalvfs_show(struct device *dev, | |
433 | struct device_attribute *attr, | |
434 | char *buf) | |
435 | { | |
436 | struct pci_dev *pdev = to_pci_dev(dev); | |
437 | ||
bff73156 | 438 | return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev)); |
1789382a DD |
439 | } |
440 | ||
441 | ||
442 | static ssize_t sriov_numvfs_show(struct device *dev, | |
443 | struct device_attribute *attr, | |
444 | char *buf) | |
445 | { | |
446 | struct pci_dev *pdev = to_pci_dev(dev); | |
447 | ||
6b136724 | 448 | return sprintf(buf, "%u\n", pdev->sriov->num_VFs); |
1789382a DD |
449 | } |
450 | ||
451 | /* | |
faa48a50 BH |
452 | * num_vfs > 0; number of VFs to enable |
453 | * num_vfs = 0; disable all VFs | |
1789382a DD |
454 | * |
455 | * Note: SRIOV spec doesn't allow partial VF | |
faa48a50 | 456 | * disable, so it's all or none. |
1789382a DD |
457 | */ |
458 | static ssize_t sriov_numvfs_store(struct device *dev, | |
459 | struct device_attribute *attr, | |
460 | const char *buf, size_t count) | |
461 | { | |
462 | struct pci_dev *pdev = to_pci_dev(dev); | |
faa48a50 BH |
463 | int ret; |
464 | u16 num_vfs; | |
1789382a | 465 | |
faa48a50 BH |
466 | ret = kstrtou16(buf, 0, &num_vfs); |
467 | if (ret < 0) | |
468 | return ret; | |
469 | ||
470 | if (num_vfs > pci_sriov_get_totalvfs(pdev)) | |
471 | return -ERANGE; | |
472 | ||
473 | if (num_vfs == pdev->sriov->num_VFs) | |
474 | return count; /* no change */ | |
1789382a DD |
475 | |
476 | /* is PF driver loaded w/callback */ | |
477 | if (!pdev->driver || !pdev->driver->sriov_configure) { | |
faa48a50 | 478 | dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n"); |
1789382a DD |
479 | return -ENOSYS; |
480 | } | |
481 | ||
faa48a50 BH |
482 | if (num_vfs == 0) { |
483 | /* disable VFs */ | |
484 | ret = pdev->driver->sriov_configure(pdev, 0); | |
485 | if (ret < 0) | |
486 | return ret; | |
487 | return count; | |
1789382a DD |
488 | } |
489 | ||
faa48a50 BH |
490 | /* enable VFs */ |
491 | if (pdev->sriov->num_VFs) { | |
492 | dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n", | |
493 | pdev->sriov->num_VFs, num_vfs); | |
494 | return -EBUSY; | |
1789382a DD |
495 | } |
496 | ||
faa48a50 BH |
497 | ret = pdev->driver->sriov_configure(pdev, num_vfs); |
498 | if (ret < 0) | |
499 | return ret; | |
1789382a | 500 | |
faa48a50 BH |
501 | if (ret != num_vfs) |
502 | dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n", | |
503 | num_vfs, ret); | |
504 | ||
505 | return count; | |
1789382a DD |
506 | } |
507 | ||
508 | static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs); | |
509 | static struct device_attribute sriov_numvfs_attr = | |
510 | __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP), | |
511 | sriov_numvfs_show, sriov_numvfs_store); | |
512 | #endif /* CONFIG_PCI_IOV */ | |
513 | ||
bf22c90f | 514 | static struct attribute *pci_dev_attrs[] = { |
5136b2da GKH |
515 | &dev_attr_resource.attr, |
516 | &dev_attr_vendor.attr, | |
517 | &dev_attr_device.attr, | |
518 | &dev_attr_subsystem_vendor.attr, | |
519 | &dev_attr_subsystem_device.attr, | |
520 | &dev_attr_class.attr, | |
521 | &dev_attr_irq.attr, | |
522 | &dev_attr_local_cpus.attr, | |
523 | &dev_attr_local_cpulist.attr, | |
524 | &dev_attr_modalias.attr, | |
81bb0e19 | 525 | #ifdef CONFIG_NUMA |
5136b2da | 526 | &dev_attr_numa_node.attr, |
81bb0e19 | 527 | #endif |
5136b2da GKH |
528 | &dev_attr_dma_mask_bits.attr, |
529 | &dev_attr_consistent_dma_mask_bits.attr, | |
530 | &dev_attr_enabled.attr, | |
531 | &dev_attr_broken_parity_status.attr, | |
532 | &dev_attr_msi_bus.attr, | |
448bd857 | 533 | #if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI) |
5136b2da | 534 | &dev_attr_d3cold_allowed.attr, |
77c27c7b | 535 | #endif |
5136b2da GKH |
536 | NULL, |
537 | }; | |
538 | ||
539 | static const struct attribute_group pci_dev_group = { | |
540 | .attrs = pci_dev_attrs, | |
541 | }; | |
542 | ||
543 | const struct attribute_group *pci_dev_groups[] = { | |
544 | &pci_dev_group, | |
545 | NULL, | |
1da177e4 LT |
546 | }; |
547 | ||
56039e65 GKH |
548 | static struct attribute *pcibus_attrs[] = { |
549 | &dev_attr_rescan.attr, | |
550 | &dev_attr_cpuaffinity.attr, | |
551 | &dev_attr_cpulistaffinity.attr, | |
552 | NULL, | |
553 | }; | |
554 | ||
555 | static const struct attribute_group pcibus_group = { | |
556 | .attrs = pcibus_attrs, | |
557 | }; | |
558 | ||
559 | const struct attribute_group *pcibus_groups[] = { | |
560 | &pcibus_group, | |
561 | NULL, | |
b9d320fc YL |
562 | }; |
563 | ||
217f45de DA |
564 | static ssize_t |
565 | boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) | |
566 | { | |
567 | struct pci_dev *pdev = to_pci_dev(dev); | |
1a39b310 MG |
568 | struct pci_dev *vga_dev = vga_default_device(); |
569 | ||
570 | if (vga_dev) | |
571 | return sprintf(buf, "%u\n", (pdev == vga_dev)); | |
217f45de DA |
572 | |
573 | return sprintf(buf, "%u\n", | |
574 | !!(pdev->resource[PCI_ROM_RESOURCE].flags & | |
575 | IORESOURCE_ROM_SHADOW)); | |
576 | } | |
bf22c90f | 577 | static struct device_attribute vga_attr = __ATTR_RO(boot_vga); |
217f45de | 578 | |
1da177e4 | 579 | static ssize_t |
2c3c8bea CW |
580 | pci_read_config(struct file *filp, struct kobject *kobj, |
581 | struct bin_attribute *bin_attr, | |
91a69029 | 582 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
583 | { |
584 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
585 | unsigned int size = 64; | |
586 | loff_t init_off = off; | |
4c0619ad | 587 | u8 *data = (u8*) buf; |
1da177e4 LT |
588 | |
589 | /* Several chips lock up trying to read undefined config space */ | |
b7e724d3 | 590 | if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) { |
1da177e4 LT |
591 | size = dev->cfg_size; |
592 | } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { | |
593 | size = 128; | |
594 | } | |
595 | ||
596 | if (off > size) | |
597 | return 0; | |
598 | if (off + count > size) { | |
599 | size -= off; | |
600 | count = size; | |
601 | } else { | |
602 | size = count; | |
603 | } | |
604 | ||
3d8387ef HY |
605 | pci_config_pm_runtime_get(dev); |
606 | ||
4c0619ad | 607 | if ((off & 1) && size) { |
608 | u8 val; | |
e04b0ea2 | 609 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 610 | data[off - init_off] = val; |
1da177e4 | 611 | off++; |
4c0619ad | 612 | size--; |
613 | } | |
614 | ||
615 | if ((off & 3) && size > 2) { | |
616 | u16 val; | |
e04b0ea2 | 617 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 618 | data[off - init_off] = val & 0xff; |
619 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
620 | off += 2; | |
621 | size -= 2; | |
1da177e4 LT |
622 | } |
623 | ||
624 | while (size > 3) { | |
4c0619ad | 625 | u32 val; |
e04b0ea2 | 626 | pci_user_read_config_dword(dev, off, &val); |
4c0619ad | 627 | data[off - init_off] = val & 0xff; |
628 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
629 | data[off - init_off + 2] = (val >> 16) & 0xff; | |
630 | data[off - init_off + 3] = (val >> 24) & 0xff; | |
1da177e4 LT |
631 | off += 4; |
632 | size -= 4; | |
633 | } | |
634 | ||
4c0619ad | 635 | if (size >= 2) { |
636 | u16 val; | |
e04b0ea2 | 637 | pci_user_read_config_word(dev, off, &val); |
4c0619ad | 638 | data[off - init_off] = val & 0xff; |
639 | data[off - init_off + 1] = (val >> 8) & 0xff; | |
640 | off += 2; | |
641 | size -= 2; | |
642 | } | |
643 | ||
644 | if (size > 0) { | |
645 | u8 val; | |
e04b0ea2 | 646 | pci_user_read_config_byte(dev, off, &val); |
4c0619ad | 647 | data[off - init_off] = val; |
1da177e4 LT |
648 | off++; |
649 | --size; | |
650 | } | |
651 | ||
3d8387ef HY |
652 | pci_config_pm_runtime_put(dev); |
653 | ||
1da177e4 LT |
654 | return count; |
655 | } | |
656 | ||
657 | static ssize_t | |
2c3c8bea CW |
658 | pci_write_config(struct file* filp, struct kobject *kobj, |
659 | struct bin_attribute *bin_attr, | |
91a69029 | 660 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
661 | { |
662 | struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj)); | |
663 | unsigned int size = count; | |
664 | loff_t init_off = off; | |
4c0619ad | 665 | u8 *data = (u8*) buf; |
1da177e4 LT |
666 | |
667 | if (off > dev->cfg_size) | |
668 | return 0; | |
669 | if (off + count > dev->cfg_size) { | |
670 | size = dev->cfg_size - off; | |
671 | count = size; | |
672 | } | |
4c0619ad | 673 | |
3d8387ef HY |
674 | pci_config_pm_runtime_get(dev); |
675 | ||
4c0619ad | 676 | if ((off & 1) && size) { |
e04b0ea2 | 677 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 | 678 | off++; |
4c0619ad | 679 | size--; |
1da177e4 | 680 | } |
4c0619ad | 681 | |
682 | if ((off & 3) && size > 2) { | |
683 | u16 val = data[off - init_off]; | |
684 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 685 | pci_user_write_config_word(dev, off, val); |
4c0619ad | 686 | off += 2; |
687 | size -= 2; | |
688 | } | |
1da177e4 LT |
689 | |
690 | while (size > 3) { | |
4c0619ad | 691 | u32 val = data[off - init_off]; |
692 | val |= (u32) data[off - init_off + 1] << 8; | |
693 | val |= (u32) data[off - init_off + 2] << 16; | |
694 | val |= (u32) data[off - init_off + 3] << 24; | |
e04b0ea2 | 695 | pci_user_write_config_dword(dev, off, val); |
1da177e4 LT |
696 | off += 4; |
697 | size -= 4; | |
698 | } | |
4c0619ad | 699 | |
700 | if (size >= 2) { | |
701 | u16 val = data[off - init_off]; | |
702 | val |= (u16) data[off - init_off + 1] << 8; | |
e04b0ea2 | 703 | pci_user_write_config_word(dev, off, val); |
4c0619ad | 704 | off += 2; |
705 | size -= 2; | |
706 | } | |
1da177e4 | 707 | |
4c0619ad | 708 | if (size) { |
e04b0ea2 | 709 | pci_user_write_config_byte(dev, off, data[off - init_off]); |
1da177e4 LT |
710 | off++; |
711 | --size; | |
712 | } | |
713 | ||
3d8387ef HY |
714 | pci_config_pm_runtime_put(dev); |
715 | ||
1da177e4 LT |
716 | return count; |
717 | } | |
718 | ||
94e61088 | 719 | static ssize_t |
2c3c8bea CW |
720 | read_vpd_attr(struct file *filp, struct kobject *kobj, |
721 | struct bin_attribute *bin_attr, | |
287d19ce | 722 | char *buf, loff_t off, size_t count) |
94e61088 BH |
723 | { |
724 | struct pci_dev *dev = | |
725 | to_pci_dev(container_of(kobj, struct device, kobj)); | |
94e61088 BH |
726 | |
727 | if (off > bin_attr->size) | |
728 | count = 0; | |
729 | else if (count > bin_attr->size - off) | |
730 | count = bin_attr->size - off; | |
94e61088 | 731 | |
287d19ce | 732 | return pci_read_vpd(dev, off, count, buf); |
94e61088 BH |
733 | } |
734 | ||
735 | static ssize_t | |
2c3c8bea CW |
736 | write_vpd_attr(struct file *filp, struct kobject *kobj, |
737 | struct bin_attribute *bin_attr, | |
287d19ce | 738 | char *buf, loff_t off, size_t count) |
94e61088 BH |
739 | { |
740 | struct pci_dev *dev = | |
741 | to_pci_dev(container_of(kobj, struct device, kobj)); | |
94e61088 BH |
742 | |
743 | if (off > bin_attr->size) | |
744 | count = 0; | |
745 | else if (count > bin_attr->size - off) | |
746 | count = bin_attr->size - off; | |
94e61088 | 747 | |
287d19ce | 748 | return pci_write_vpd(dev, off, count, buf); |
94e61088 BH |
749 | } |
750 | ||
1da177e4 LT |
751 | #ifdef HAVE_PCI_LEGACY |
752 | /** | |
753 | * pci_read_legacy_io - read byte(s) from legacy I/O port space | |
2c3c8bea | 754 | * @filp: open sysfs file |
1da177e4 | 755 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 756 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
757 | * @buf: buffer to store results |
758 | * @off: offset into legacy I/O port space | |
759 | * @count: number of bytes to read | |
760 | * | |
761 | * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
762 | * callback routine (pci_legacy_read). | |
763 | */ | |
f19aeb1f | 764 | static ssize_t |
2c3c8bea CW |
765 | pci_read_legacy_io(struct file *filp, struct kobject *kobj, |
766 | struct bin_attribute *bin_attr, | |
91a69029 | 767 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
768 | { |
769 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 770 | struct device, |
1da177e4 LT |
771 | kobj)); |
772 | ||
773 | /* Only support 1, 2 or 4 byte accesses */ | |
774 | if (count != 1 && count != 2 && count != 4) | |
775 | return -EINVAL; | |
776 | ||
777 | return pci_legacy_read(bus, off, (u32 *)buf, count); | |
778 | } | |
779 | ||
780 | /** | |
781 | * pci_write_legacy_io - write byte(s) to legacy I/O port space | |
2c3c8bea | 782 | * @filp: open sysfs file |
1da177e4 | 783 | * @kobj: kobject corresponding to file to read from |
cffb2faf | 784 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
785 | * @buf: buffer containing value to be written |
786 | * @off: offset into legacy I/O port space | |
787 | * @count: number of bytes to write | |
788 | * | |
789 | * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific | |
790 | * callback routine (pci_legacy_write). | |
791 | */ | |
f19aeb1f | 792 | static ssize_t |
2c3c8bea CW |
793 | pci_write_legacy_io(struct file *filp, struct kobject *kobj, |
794 | struct bin_attribute *bin_attr, | |
91a69029 | 795 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
796 | { |
797 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 798 | struct device, |
1da177e4 LT |
799 | kobj)); |
800 | /* Only support 1, 2 or 4 byte accesses */ | |
801 | if (count != 1 && count != 2 && count != 4) | |
802 | return -EINVAL; | |
803 | ||
804 | return pci_legacy_write(bus, off, *(u32 *)buf, count); | |
805 | } | |
806 | ||
807 | /** | |
808 | * pci_mmap_legacy_mem - map legacy PCI memory into user memory space | |
2c3c8bea | 809 | * @filp: open sysfs file |
1da177e4 LT |
810 | * @kobj: kobject corresponding to device to be mapped |
811 | * @attr: struct bin_attribute for this file | |
812 | * @vma: struct vm_area_struct passed to mmap | |
813 | * | |
f19aeb1f | 814 | * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap |
1da177e4 LT |
815 | * legacy memory space (first meg of bus space) into application virtual |
816 | * memory space. | |
817 | */ | |
f19aeb1f | 818 | static int |
2c3c8bea CW |
819 | pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj, |
820 | struct bin_attribute *attr, | |
1da177e4 LT |
821 | struct vm_area_struct *vma) |
822 | { | |
823 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
fd7d1ced | 824 | struct device, |
1da177e4 LT |
825 | kobj)); |
826 | ||
f19aeb1f BH |
827 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem); |
828 | } | |
829 | ||
830 | /** | |
831 | * pci_mmap_legacy_io - map legacy PCI IO into user memory space | |
2c3c8bea | 832 | * @filp: open sysfs file |
f19aeb1f BH |
833 | * @kobj: kobject corresponding to device to be mapped |
834 | * @attr: struct bin_attribute for this file | |
835 | * @vma: struct vm_area_struct passed to mmap | |
836 | * | |
837 | * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap | |
838 | * legacy IO space (first meg of bus space) into application virtual | |
839 | * memory space. Returns -ENOSYS if the operation isn't supported | |
840 | */ | |
841 | static int | |
2c3c8bea CW |
842 | pci_mmap_legacy_io(struct file *filp, struct kobject *kobj, |
843 | struct bin_attribute *attr, | |
f19aeb1f BH |
844 | struct vm_area_struct *vma) |
845 | { | |
846 | struct pci_bus *bus = to_pci_bus(container_of(kobj, | |
847 | struct device, | |
848 | kobj)); | |
849 | ||
850 | return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io); | |
851 | } | |
852 | ||
10a0ef39 IK |
853 | /** |
854 | * pci_adjust_legacy_attr - adjustment of legacy file attributes | |
855 | * @b: bus to create files under | |
856 | * @mmap_type: I/O port or memory | |
857 | * | |
858 | * Stub implementation. Can be overridden by arch if necessary. | |
859 | */ | |
860 | void __weak | |
861 | pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type) | |
862 | { | |
863 | return; | |
864 | } | |
865 | ||
f19aeb1f BH |
866 | /** |
867 | * pci_create_legacy_files - create legacy I/O port and memory files | |
868 | * @b: bus to create files under | |
869 | * | |
870 | * Some platforms allow access to legacy I/O port and ISA memory space on | |
871 | * a per-bus basis. This routine creates the files and ties them into | |
872 | * their associated read, write and mmap files from pci-sysfs.c | |
873 | * | |
25985edc | 874 | * On error unwind, but don't propagate the error to the caller |
f19aeb1f BH |
875 | * as it is ok to set up the PCI bus without these files. |
876 | */ | |
877 | void pci_create_legacy_files(struct pci_bus *b) | |
878 | { | |
879 | int error; | |
880 | ||
881 | b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2, | |
882 | GFP_ATOMIC); | |
883 | if (!b->legacy_io) | |
884 | goto kzalloc_err; | |
885 | ||
62e877b8 | 886 | sysfs_bin_attr_init(b->legacy_io); |
f19aeb1f BH |
887 | b->legacy_io->attr.name = "legacy_io"; |
888 | b->legacy_io->size = 0xffff; | |
889 | b->legacy_io->attr.mode = S_IRUSR | S_IWUSR; | |
890 | b->legacy_io->read = pci_read_legacy_io; | |
891 | b->legacy_io->write = pci_write_legacy_io; | |
892 | b->legacy_io->mmap = pci_mmap_legacy_io; | |
10a0ef39 | 893 | pci_adjust_legacy_attr(b, pci_mmap_io); |
f19aeb1f BH |
894 | error = device_create_bin_file(&b->dev, b->legacy_io); |
895 | if (error) | |
896 | goto legacy_io_err; | |
897 | ||
898 | /* Allocated above after the legacy_io struct */ | |
899 | b->legacy_mem = b->legacy_io + 1; | |
6757eca3 | 900 | sysfs_bin_attr_init(b->legacy_mem); |
f19aeb1f BH |
901 | b->legacy_mem->attr.name = "legacy_mem"; |
902 | b->legacy_mem->size = 1024*1024; | |
903 | b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR; | |
904 | b->legacy_mem->mmap = pci_mmap_legacy_mem; | |
10a0ef39 | 905 | pci_adjust_legacy_attr(b, pci_mmap_mem); |
f19aeb1f BH |
906 | error = device_create_bin_file(&b->dev, b->legacy_mem); |
907 | if (error) | |
908 | goto legacy_mem_err; | |
909 | ||
910 | return; | |
911 | ||
912 | legacy_mem_err: | |
913 | device_remove_bin_file(&b->dev, b->legacy_io); | |
914 | legacy_io_err: | |
915 | kfree(b->legacy_io); | |
916 | b->legacy_io = NULL; | |
917 | kzalloc_err: | |
918 | printk(KERN_WARNING "pci: warning: could not create legacy I/O port " | |
919 | "and ISA memory resources to sysfs\n"); | |
920 | return; | |
921 | } | |
922 | ||
923 | void pci_remove_legacy_files(struct pci_bus *b) | |
924 | { | |
925 | if (b->legacy_io) { | |
926 | device_remove_bin_file(&b->dev, b->legacy_io); | |
927 | device_remove_bin_file(&b->dev, b->legacy_mem); | |
928 | kfree(b->legacy_io); /* both are allocated here */ | |
929 | } | |
1da177e4 LT |
930 | } |
931 | #endif /* HAVE_PCI_LEGACY */ | |
932 | ||
933 | #ifdef HAVE_PCI_MMAP | |
b5ff7df3 | 934 | |
3b519e4e MW |
935 | int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma, |
936 | enum pci_mmap_api mmap_api) | |
b5ff7df3 | 937 | { |
3b519e4e | 938 | unsigned long nr, start, size, pci_start; |
b5ff7df3 | 939 | |
3b519e4e MW |
940 | if (pci_resource_len(pdev, resno) == 0) |
941 | return 0; | |
64b00175 | 942 | nr = vma_pages(vma); |
b5ff7df3 | 943 | start = vma->vm_pgoff; |
88e7df0b | 944 | size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1; |
8c05cd08 | 945 | pci_start = (mmap_api == PCI_MMAP_PROCFS) ? |
3b519e4e MW |
946 | pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0; |
947 | if (start >= pci_start && start < pci_start + size && | |
948 | start + nr <= pci_start + size) | |
b5ff7df3 | 949 | return 1; |
b5ff7df3 LT |
950 | return 0; |
951 | } | |
952 | ||
1da177e4 LT |
953 | /** |
954 | * pci_mmap_resource - map a PCI resource into user memory space | |
955 | * @kobj: kobject for mapping | |
956 | * @attr: struct bin_attribute for the file being mapped | |
957 | * @vma: struct vm_area_struct passed into the mmap | |
45aec1ae | 958 | * @write_combine: 1 for write_combine mapping |
1da177e4 LT |
959 | * |
960 | * Use the regular PCI mapping routines to map a PCI resource into userspace. | |
1da177e4 LT |
961 | */ |
962 | static int | |
963 | pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr, | |
45aec1ae | 964 | struct vm_area_struct *vma, int write_combine) |
1da177e4 LT |
965 | { |
966 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, | |
967 | struct device, kobj)); | |
a3f5835a | 968 | struct resource *res = attr->private; |
1da177e4 | 969 | enum pci_mmap_state mmap_type; |
e31dd6e4 | 970 | resource_size_t start, end; |
2311b1f2 | 971 | int i; |
1da177e4 | 972 | |
2311b1f2 ME |
973 | for (i = 0; i < PCI_ROM_RESOURCE; i++) |
974 | if (res == &pdev->resource[i]) | |
975 | break; | |
976 | if (i >= PCI_ROM_RESOURCE) | |
977 | return -ENODEV; | |
978 | ||
3b519e4e MW |
979 | if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) { |
980 | WARN(1, "process \"%s\" tried to map 0x%08lx bytes " | |
981 | "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n", | |
982 | current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff, | |
983 | pci_name(pdev), i, | |
e25cd062 RD |
984 | (u64)pci_resource_start(pdev, i), |
985 | (u64)pci_resource_len(pdev, i)); | |
b5ff7df3 | 986 | return -EINVAL; |
3b519e4e | 987 | } |
b5ff7df3 | 988 | |
2311b1f2 ME |
989 | /* pci_mmap_page_range() expects the same kind of entry as coming |
990 | * from /proc/bus/pci/ which is a "user visible" value. If this is | |
991 | * different from the resource itself, arch will do necessary fixup. | |
992 | */ | |
993 | pci_resource_to_user(pdev, i, res, &start, &end); | |
994 | vma->vm_pgoff += start >> PAGE_SHIFT; | |
1da177e4 LT |
995 | mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io; |
996 | ||
e8de1481 AV |
997 | if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start)) |
998 | return -EINVAL; | |
999 | ||
45aec1ae | 1000 | return pci_mmap_page_range(pdev, vma, mmap_type, write_combine); |
1001 | } | |
1002 | ||
1003 | static int | |
2c3c8bea CW |
1004 | pci_mmap_resource_uc(struct file *filp, struct kobject *kobj, |
1005 | struct bin_attribute *attr, | |
45aec1ae | 1006 | struct vm_area_struct *vma) |
1007 | { | |
1008 | return pci_mmap_resource(kobj, attr, vma, 0); | |
1009 | } | |
1010 | ||
1011 | static int | |
2c3c8bea CW |
1012 | pci_mmap_resource_wc(struct file *filp, struct kobject *kobj, |
1013 | struct bin_attribute *attr, | |
45aec1ae | 1014 | struct vm_area_struct *vma) |
1015 | { | |
1016 | return pci_mmap_resource(kobj, attr, vma, 1); | |
1da177e4 LT |
1017 | } |
1018 | ||
8633328b AW |
1019 | static ssize_t |
1020 | pci_resource_io(struct file *filp, struct kobject *kobj, | |
1021 | struct bin_attribute *attr, char *buf, | |
1022 | loff_t off, size_t count, bool write) | |
1023 | { | |
1024 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, | |
1025 | struct device, kobj)); | |
1026 | struct resource *res = attr->private; | |
1027 | unsigned long port = off; | |
1028 | int i; | |
1029 | ||
1030 | for (i = 0; i < PCI_ROM_RESOURCE; i++) | |
1031 | if (res == &pdev->resource[i]) | |
1032 | break; | |
1033 | if (i >= PCI_ROM_RESOURCE) | |
1034 | return -ENODEV; | |
1035 | ||
1036 | port += pci_resource_start(pdev, i); | |
1037 | ||
1038 | if (port > pci_resource_end(pdev, i)) | |
1039 | return 0; | |
1040 | ||
1041 | if (port + count - 1 > pci_resource_end(pdev, i)) | |
1042 | return -EINVAL; | |
1043 | ||
1044 | switch (count) { | |
1045 | case 1: | |
1046 | if (write) | |
1047 | outb(*(u8 *)buf, port); | |
1048 | else | |
1049 | *(u8 *)buf = inb(port); | |
1050 | return 1; | |
1051 | case 2: | |
1052 | if (write) | |
1053 | outw(*(u16 *)buf, port); | |
1054 | else | |
1055 | *(u16 *)buf = inw(port); | |
1056 | return 2; | |
1057 | case 4: | |
1058 | if (write) | |
1059 | outl(*(u32 *)buf, port); | |
1060 | else | |
1061 | *(u32 *)buf = inl(port); | |
1062 | return 4; | |
1063 | } | |
1064 | return -EINVAL; | |
1065 | } | |
1066 | ||
1067 | static ssize_t | |
1068 | pci_read_resource_io(struct file *filp, struct kobject *kobj, | |
1069 | struct bin_attribute *attr, char *buf, | |
1070 | loff_t off, size_t count) | |
1071 | { | |
1072 | return pci_resource_io(filp, kobj, attr, buf, off, count, false); | |
1073 | } | |
1074 | ||
1075 | static ssize_t | |
1076 | pci_write_resource_io(struct file *filp, struct kobject *kobj, | |
1077 | struct bin_attribute *attr, char *buf, | |
1078 | loff_t off, size_t count) | |
1079 | { | |
1080 | return pci_resource_io(filp, kobj, attr, buf, off, count, true); | |
1081 | } | |
1082 | ||
b19441af GKH |
1083 | /** |
1084 | * pci_remove_resource_files - cleanup resource files | |
cffb2faf | 1085 | * @pdev: dev to cleanup |
b19441af | 1086 | * |
cffb2faf | 1087 | * If we created resource files for @pdev, remove them from sysfs and |
b19441af GKH |
1088 | * free their resources. |
1089 | */ | |
1090 | static void | |
1091 | pci_remove_resource_files(struct pci_dev *pdev) | |
1092 | { | |
1093 | int i; | |
1094 | ||
1095 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
1096 | struct bin_attribute *res_attr; | |
1097 | ||
1098 | res_attr = pdev->res_attr[i]; | |
1099 | if (res_attr) { | |
1100 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1101 | kfree(res_attr); | |
1102 | } | |
45aec1ae | 1103 | |
1104 | res_attr = pdev->res_attr_wc[i]; | |
1105 | if (res_attr) { | |
1106 | sysfs_remove_bin_file(&pdev->dev.kobj, res_attr); | |
1107 | kfree(res_attr); | |
1108 | } | |
b19441af GKH |
1109 | } |
1110 | } | |
1111 | ||
45aec1ae | 1112 | static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine) |
1113 | { | |
1114 | /* allocate attribute structure, piggyback attribute name */ | |
1115 | int name_len = write_combine ? 13 : 10; | |
1116 | struct bin_attribute *res_attr; | |
1117 | int retval; | |
1118 | ||
1119 | res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC); | |
1120 | if (res_attr) { | |
1121 | char *res_attr_name = (char *)(res_attr + 1); | |
1122 | ||
a07e4156 | 1123 | sysfs_bin_attr_init(res_attr); |
45aec1ae | 1124 | if (write_combine) { |
1125 | pdev->res_attr_wc[num] = res_attr; | |
1126 | sprintf(res_attr_name, "resource%d_wc", num); | |
1127 | res_attr->mmap = pci_mmap_resource_wc; | |
1128 | } else { | |
1129 | pdev->res_attr[num] = res_attr; | |
1130 | sprintf(res_attr_name, "resource%d", num); | |
1131 | res_attr->mmap = pci_mmap_resource_uc; | |
1132 | } | |
8633328b AW |
1133 | if (pci_resource_flags(pdev, num) & IORESOURCE_IO) { |
1134 | res_attr->read = pci_read_resource_io; | |
1135 | res_attr->write = pci_write_resource_io; | |
1136 | } | |
45aec1ae | 1137 | res_attr->attr.name = res_attr_name; |
1138 | res_attr->attr.mode = S_IRUSR | S_IWUSR; | |
1139 | res_attr->size = pci_resource_len(pdev, num); | |
1140 | res_attr->private = &pdev->resource[num]; | |
1141 | retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr); | |
1142 | } else | |
1143 | retval = -ENOMEM; | |
1144 | ||
1145 | return retval; | |
1146 | } | |
1147 | ||
1da177e4 LT |
1148 | /** |
1149 | * pci_create_resource_files - create resource files in sysfs for @dev | |
cffb2faf | 1150 | * @pdev: dev in question |
1da177e4 | 1151 | * |
cffb2faf | 1152 | * Walk the resources in @pdev creating files for each resource available. |
1da177e4 | 1153 | */ |
b19441af | 1154 | static int pci_create_resource_files(struct pci_dev *pdev) |
1da177e4 LT |
1155 | { |
1156 | int i; | |
b19441af | 1157 | int retval; |
1da177e4 LT |
1158 | |
1159 | /* Expose the PCI resources from this device as files */ | |
1160 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
1da177e4 LT |
1161 | |
1162 | /* skip empty resources */ | |
1163 | if (!pci_resource_len(pdev, i)) | |
1164 | continue; | |
1165 | ||
45aec1ae | 1166 | retval = pci_create_attr(pdev, i, 0); |
1167 | /* for prefetchable resources, create a WC mappable file */ | |
1168 | if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH) | |
1169 | retval = pci_create_attr(pdev, i, 1); | |
1170 | ||
1171 | if (retval) { | |
1172 | pci_remove_resource_files(pdev); | |
1173 | return retval; | |
1da177e4 LT |
1174 | } |
1175 | } | |
b19441af | 1176 | return 0; |
1da177e4 LT |
1177 | } |
1178 | #else /* !HAVE_PCI_MMAP */ | |
10a0ef39 IK |
1179 | int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; } |
1180 | void __weak pci_remove_resource_files(struct pci_dev *dev) { return; } | |
1da177e4 LT |
1181 | #endif /* HAVE_PCI_MMAP */ |
1182 | ||
1183 | /** | |
1184 | * pci_write_rom - used to enable access to the PCI ROM display | |
2c3c8bea | 1185 | * @filp: sysfs file |
1da177e4 | 1186 | * @kobj: kernel object handle |
cffb2faf | 1187 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1188 | * @buf: user input |
1189 | * @off: file offset | |
1190 | * @count: number of byte in input | |
1191 | * | |
1192 | * writing anything except 0 enables it | |
1193 | */ | |
1194 | static ssize_t | |
2c3c8bea CW |
1195 | pci_write_rom(struct file *filp, struct kobject *kobj, |
1196 | struct bin_attribute *bin_attr, | |
91a69029 | 1197 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
1198 | { |
1199 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
1200 | ||
1201 | if ((off == 0) && (*buf == '0') && (count == 2)) | |
1202 | pdev->rom_attr_enabled = 0; | |
1203 | else | |
1204 | pdev->rom_attr_enabled = 1; | |
1205 | ||
1206 | return count; | |
1207 | } | |
1208 | ||
1209 | /** | |
1210 | * pci_read_rom - read a PCI ROM | |
2c3c8bea | 1211 | * @filp: sysfs file |
1da177e4 | 1212 | * @kobj: kernel object handle |
cffb2faf | 1213 | * @bin_attr: struct bin_attribute for this file |
1da177e4 LT |
1214 | * @buf: where to put the data we read from the ROM |
1215 | * @off: file offset | |
1216 | * @count: number of bytes to read | |
1217 | * | |
1218 | * Put @count bytes starting at @off into @buf from the ROM in the PCI | |
1219 | * device corresponding to @kobj. | |
1220 | */ | |
1221 | static ssize_t | |
2c3c8bea CW |
1222 | pci_read_rom(struct file *filp, struct kobject *kobj, |
1223 | struct bin_attribute *bin_attr, | |
91a69029 | 1224 | char *buf, loff_t off, size_t count) |
1da177e4 LT |
1225 | { |
1226 | struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj)); | |
1227 | void __iomem *rom; | |
1228 | size_t size; | |
1229 | ||
1230 | if (!pdev->rom_attr_enabled) | |
1231 | return -EINVAL; | |
1232 | ||
1233 | rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */ | |
97c44836 TN |
1234 | if (!rom || !size) |
1235 | return -EIO; | |
1da177e4 LT |
1236 | |
1237 | if (off >= size) | |
1238 | count = 0; | |
1239 | else { | |
1240 | if (off + count > size) | |
1241 | count = size - off; | |
1242 | ||
1243 | memcpy_fromio(buf, rom + off, count); | |
1244 | } | |
1245 | pci_unmap_rom(pdev, rom); | |
1246 | ||
1247 | return count; | |
1248 | } | |
1249 | ||
1250 | static struct bin_attribute pci_config_attr = { | |
1251 | .attr = { | |
1252 | .name = "config", | |
1253 | .mode = S_IRUGO | S_IWUSR, | |
1da177e4 | 1254 | }, |
557848c3 | 1255 | .size = PCI_CFG_SPACE_SIZE, |
1da177e4 LT |
1256 | .read = pci_read_config, |
1257 | .write = pci_write_config, | |
1258 | }; | |
1259 | ||
1260 | static struct bin_attribute pcie_config_attr = { | |
1261 | .attr = { | |
1262 | .name = "config", | |
1263 | .mode = S_IRUGO | S_IWUSR, | |
1da177e4 | 1264 | }, |
557848c3 | 1265 | .size = PCI_CFG_SPACE_EXP_SIZE, |
1da177e4 LT |
1266 | .read = pci_read_config, |
1267 | .write = pci_write_config, | |
1268 | }; | |
1269 | ||
d6d88c83 | 1270 | int __weak pcibios_add_platform_entries(struct pci_dev *dev) |
575e3348 | 1271 | { |
a2cd52ca | 1272 | return 0; |
575e3348 ME |
1273 | } |
1274 | ||
711d5779 MT |
1275 | static ssize_t reset_store(struct device *dev, |
1276 | struct device_attribute *attr, const char *buf, | |
1277 | size_t count) | |
1278 | { | |
1279 | struct pci_dev *pdev = to_pci_dev(dev); | |
1280 | unsigned long val; | |
9a994e8e | 1281 | ssize_t result = kstrtoul(buf, 0, &val); |
711d5779 MT |
1282 | |
1283 | if (result < 0) | |
1284 | return result; | |
1285 | ||
1286 | if (val != 1) | |
1287 | return -EINVAL; | |
447c5dd7 MS |
1288 | |
1289 | result = pci_reset_function(pdev); | |
1290 | if (result < 0) | |
1291 | return result; | |
1292 | ||
1293 | return count; | |
711d5779 MT |
1294 | } |
1295 | ||
1296 | static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store); | |
1297 | ||
280c73d3 ZY |
1298 | static int pci_create_capabilities_sysfs(struct pci_dev *dev) |
1299 | { | |
1300 | int retval; | |
1301 | struct bin_attribute *attr; | |
1302 | ||
1303 | /* If the device has VPD, try to expose it in sysfs. */ | |
1304 | if (dev->vpd) { | |
1305 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); | |
1306 | if (!attr) | |
1307 | return -ENOMEM; | |
1308 | ||
a07e4156 | 1309 | sysfs_bin_attr_init(attr); |
280c73d3 ZY |
1310 | attr->size = dev->vpd->len; |
1311 | attr->attr.name = "vpd"; | |
1312 | attr->attr.mode = S_IRUSR | S_IWUSR; | |
287d19ce SH |
1313 | attr->read = read_vpd_attr; |
1314 | attr->write = write_vpd_attr; | |
280c73d3 ZY |
1315 | retval = sysfs_create_bin_file(&dev->dev.kobj, attr); |
1316 | if (retval) { | |
0f12a4e2 | 1317 | kfree(attr); |
280c73d3 ZY |
1318 | return retval; |
1319 | } | |
1320 | dev->vpd->attr = attr; | |
1321 | } | |
1322 | ||
1323 | /* Active State Power Management */ | |
1324 | pcie_aspm_create_sysfs_dev_files(dev); | |
1325 | ||
711d5779 MT |
1326 | if (!pci_probe_reset_function(dev)) { |
1327 | retval = device_create_file(&dev->dev, &reset_attr); | |
1328 | if (retval) | |
1329 | goto error; | |
1330 | dev->reset_fn = 1; | |
1331 | } | |
280c73d3 | 1332 | return 0; |
711d5779 MT |
1333 | |
1334 | error: | |
1335 | pcie_aspm_remove_sysfs_dev_files(dev); | |
1336 | if (dev->vpd && dev->vpd->attr) { | |
1337 | sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); | |
1338 | kfree(dev->vpd->attr); | |
1339 | } | |
1340 | ||
1341 | return retval; | |
280c73d3 ZY |
1342 | } |
1343 | ||
b19441af | 1344 | int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) |
1da177e4 | 1345 | { |
b19441af | 1346 | int retval; |
280c73d3 ZY |
1347 | int rom_size = 0; |
1348 | struct bin_attribute *attr; | |
b19441af | 1349 | |
1da177e4 LT |
1350 | if (!sysfs_initialized) |
1351 | return -EACCES; | |
1352 | ||
557848c3 | 1353 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
b19441af | 1354 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr); |
1da177e4 | 1355 | else |
b19441af GKH |
1356 | retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr); |
1357 | if (retval) | |
1358 | goto err; | |
1da177e4 | 1359 | |
b19441af GKH |
1360 | retval = pci_create_resource_files(pdev); |
1361 | if (retval) | |
280c73d3 ZY |
1362 | goto err_config_file; |
1363 | ||
1364 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) | |
1365 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
1366 | else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) | |
1367 | rom_size = 0x20000; | |
1da177e4 LT |
1368 | |
1369 | /* If the device has a ROM, try to expose it in sysfs. */ | |
280c73d3 | 1370 | if (rom_size) { |
94e61088 | 1371 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); |
280c73d3 | 1372 | if (!attr) { |
b19441af | 1373 | retval = -ENOMEM; |
9890b12a | 1374 | goto err_resource_files; |
1da177e4 | 1375 | } |
a07e4156 | 1376 | sysfs_bin_attr_init(attr); |
280c73d3 ZY |
1377 | attr->size = rom_size; |
1378 | attr->attr.name = "rom"; | |
ff29530e | 1379 | attr->attr.mode = S_IRUSR | S_IWUSR; |
280c73d3 ZY |
1380 | attr->read = pci_read_rom; |
1381 | attr->write = pci_write_rom; | |
1382 | retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); | |
1383 | if (retval) { | |
1384 | kfree(attr); | |
1385 | goto err_resource_files; | |
1386 | } | |
1387 | pdev->rom_attr = attr; | |
1da177e4 | 1388 | } |
280c73d3 | 1389 | |
1da177e4 | 1390 | /* add platform-specific attributes */ |
280c73d3 ZY |
1391 | retval = pcibios_add_platform_entries(pdev); |
1392 | if (retval) | |
625e1d59 | 1393 | goto err_rom_file; |
b19441af | 1394 | |
280c73d3 ZY |
1395 | /* add sysfs entries for various capabilities */ |
1396 | retval = pci_create_capabilities_sysfs(pdev); | |
1397 | if (retval) | |
625e1d59 | 1398 | goto err_rom_file; |
7d715a6c | 1399 | |
911e1c9b N |
1400 | pci_create_firmware_label_files(pdev); |
1401 | ||
1da177e4 | 1402 | return 0; |
b19441af | 1403 | |
a2cd52ca | 1404 | err_rom_file: |
280c73d3 | 1405 | if (rom_size) { |
94e61088 | 1406 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); |
280c73d3 ZY |
1407 | kfree(pdev->rom_attr); |
1408 | pdev->rom_attr = NULL; | |
1409 | } | |
9890b12a ME |
1410 | err_resource_files: |
1411 | pci_remove_resource_files(pdev); | |
94e61088 | 1412 | err_config_file: |
557848c3 | 1413 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
b19441af GKH |
1414 | sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); |
1415 | else | |
1416 | sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
1417 | err: | |
1418 | return retval; | |
1da177e4 LT |
1419 | } |
1420 | ||
280c73d3 ZY |
1421 | static void pci_remove_capabilities_sysfs(struct pci_dev *dev) |
1422 | { | |
1423 | if (dev->vpd && dev->vpd->attr) { | |
1424 | sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr); | |
1425 | kfree(dev->vpd->attr); | |
1426 | } | |
1427 | ||
1428 | pcie_aspm_remove_sysfs_dev_files(dev); | |
711d5779 MT |
1429 | if (dev->reset_fn) { |
1430 | device_remove_file(&dev->dev, &reset_attr); | |
1431 | dev->reset_fn = 0; | |
1432 | } | |
280c73d3 ZY |
1433 | } |
1434 | ||
1da177e4 LT |
1435 | /** |
1436 | * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files | |
1437 | * @pdev: device whose entries we should free | |
1438 | * | |
1439 | * Cleanup when @pdev is removed from sysfs. | |
1440 | */ | |
1441 | void pci_remove_sysfs_dev_files(struct pci_dev *pdev) | |
1442 | { | |
280c73d3 ZY |
1443 | int rom_size = 0; |
1444 | ||
d67afe5e DM |
1445 | if (!sysfs_initialized) |
1446 | return; | |
1447 | ||
280c73d3 | 1448 | pci_remove_capabilities_sysfs(pdev); |
7d715a6c | 1449 | |
557848c3 | 1450 | if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE) |
1da177e4 LT |
1451 | sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr); |
1452 | else | |
1453 | sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr); | |
1454 | ||
1455 | pci_remove_resource_files(pdev); | |
1456 | ||
280c73d3 ZY |
1457 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) |
1458 | rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
1459 | else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) | |
1460 | rom_size = 0x20000; | |
1461 | ||
1462 | if (rom_size && pdev->rom_attr) { | |
1463 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); | |
1464 | kfree(pdev->rom_attr); | |
1da177e4 | 1465 | } |
911e1c9b N |
1466 | |
1467 | pci_remove_firmware_label_files(pdev); | |
1468 | ||
1da177e4 LT |
1469 | } |
1470 | ||
1471 | static int __init pci_sysfs_init(void) | |
1472 | { | |
1473 | struct pci_dev *pdev = NULL; | |
b19441af GKH |
1474 | int retval; |
1475 | ||
1da177e4 | 1476 | sysfs_initialized = 1; |
b19441af GKH |
1477 | for_each_pci_dev(pdev) { |
1478 | retval = pci_create_sysfs_dev_files(pdev); | |
151fc5df JL |
1479 | if (retval) { |
1480 | pci_dev_put(pdev); | |
b19441af | 1481 | return retval; |
151fc5df | 1482 | } |
b19441af | 1483 | } |
1da177e4 LT |
1484 | |
1485 | return 0; | |
1486 | } | |
1487 | ||
40ee9e9f | 1488 | late_initcall(pci_sysfs_init); |
4e15c46b YL |
1489 | |
1490 | static struct attribute *pci_dev_dev_attrs[] = { | |
625e1d59 | 1491 | &vga_attr.attr, |
4e15c46b YL |
1492 | NULL, |
1493 | }; | |
1494 | ||
1495 | static umode_t pci_dev_attrs_are_visible(struct kobject *kobj, | |
1496 | struct attribute *a, int n) | |
1497 | { | |
625e1d59 YL |
1498 | struct device *dev = container_of(kobj, struct device, kobj); |
1499 | struct pci_dev *pdev = to_pci_dev(dev); | |
1500 | ||
1501 | if (a == &vga_attr.attr) | |
1502 | if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA) | |
1503 | return 0; | |
1504 | ||
4e15c46b YL |
1505 | return a->mode; |
1506 | } | |
1507 | ||
dfab88be JL |
1508 | static struct attribute *pci_dev_hp_attrs[] = { |
1509 | &dev_remove_attr.attr, | |
1510 | &dev_rescan_attr.attr, | |
1511 | NULL, | |
1512 | }; | |
1513 | ||
1514 | static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj, | |
1515 | struct attribute *a, int n) | |
1516 | { | |
1517 | struct device *dev = container_of(kobj, struct device, kobj); | |
1518 | struct pci_dev *pdev = to_pci_dev(dev); | |
1519 | ||
1520 | if (pdev->is_virtfn) | |
1521 | return 0; | |
1522 | ||
1523 | return a->mode; | |
1524 | } | |
1525 | ||
1526 | static struct attribute_group pci_dev_hp_attr_group = { | |
1527 | .attrs = pci_dev_hp_attrs, | |
1528 | .is_visible = pci_dev_hp_attrs_are_visible, | |
1529 | }; | |
1530 | ||
1789382a DD |
1531 | #ifdef CONFIG_PCI_IOV |
1532 | static struct attribute *sriov_dev_attrs[] = { | |
1533 | &sriov_totalvfs_attr.attr, | |
1534 | &sriov_numvfs_attr.attr, | |
1535 | NULL, | |
1536 | }; | |
1537 | ||
1538 | static umode_t sriov_attrs_are_visible(struct kobject *kobj, | |
1539 | struct attribute *a, int n) | |
1540 | { | |
1541 | struct device *dev = container_of(kobj, struct device, kobj); | |
1542 | ||
1543 | if (!dev_is_pf(dev)) | |
1544 | return 0; | |
1545 | ||
1546 | return a->mode; | |
1547 | } | |
1548 | ||
1549 | static struct attribute_group sriov_dev_attr_group = { | |
1550 | .attrs = sriov_dev_attrs, | |
1551 | .is_visible = sriov_attrs_are_visible, | |
1552 | }; | |
1553 | #endif /* CONFIG_PCI_IOV */ | |
1554 | ||
4e15c46b YL |
1555 | static struct attribute_group pci_dev_attr_group = { |
1556 | .attrs = pci_dev_dev_attrs, | |
1557 | .is_visible = pci_dev_attrs_are_visible, | |
1558 | }; | |
1559 | ||
1560 | static const struct attribute_group *pci_dev_attr_groups[] = { | |
1561 | &pci_dev_attr_group, | |
dfab88be | 1562 | &pci_dev_hp_attr_group, |
1789382a DD |
1563 | #ifdef CONFIG_PCI_IOV |
1564 | &sriov_dev_attr_group, | |
1565 | #endif | |
4e15c46b YL |
1566 | NULL, |
1567 | }; | |
1568 | ||
1569 | struct device_type pci_dev_type = { | |
1570 | .groups = pci_dev_attr_groups, | |
1571 | }; |