PCI: Add global pci_lock_rescan_remove()
[deliverable/linux.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
f7625980 13 * Modeled after usb's driverfs.c
1da177e4
LT
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
363c75db 22#include <linux/export.h>
1da177e4
LT
23#include <linux/topology.h>
24#include <linux/mm.h>
de139a33 25#include <linux/fs.h>
aa0ac365 26#include <linux/capability.h>
a628e7b8 27#include <linux/security.h>
7d715a6c 28#include <linux/pci-aspm.h>
5a0e3ad6 29#include <linux/slab.h>
1a39b310 30#include <linux/vgaarb.h>
448bd857 31#include <linux/pm_runtime.h>
1da177e4
LT
32#include "pci.h"
33
34static int sysfs_initialized; /* = 0 */
35
36/* show configuration fields */
37#define pci_config_attr(field, format_string) \
38static ssize_t \
e404e274 39field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
40{ \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev (dev); \
44 return sprintf (buf, format_string, pdev->field); \
5136b2da
GKH
45} \
46static DEVICE_ATTR_RO(field)
1da177e4
LT
47
48pci_config_attr(vendor, "0x%04x\n");
49pci_config_attr(device, "0x%04x\n");
50pci_config_attr(subsystem_vendor, "0x%04x\n");
51pci_config_attr(subsystem_device, "0x%04x\n");
52pci_config_attr(class, "0x%06x\n");
53pci_config_attr(irq, "%u\n");
54
bdee9d98
DT
55static ssize_t broken_parity_status_show(struct device *dev,
56 struct device_attribute *attr,
57 char *buf)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60 return sprintf (buf, "%u\n", pdev->broken_parity_status);
61}
62
63static ssize_t broken_parity_status_store(struct device *dev,
64 struct device_attribute *attr,
65 const char *buf, size_t count)
66{
67 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 68 unsigned long val;
bdee9d98 69
9a994e8e 70 if (kstrtoul(buf, 0, &val) < 0)
92425a40
TP
71 return -EINVAL;
72
73 pdev->broken_parity_status = !!val;
74
75 return count;
bdee9d98 76}
5136b2da 77static DEVICE_ATTR_RW(broken_parity_status);
bdee9d98 78
c489f5fb
YW
79static ssize_t pci_dev_show_local_cpu(struct device *dev,
80 int type,
81 struct device_attribute *attr,
82 char *buf)
83{
3be83050 84 const struct cpumask *mask;
4327edf6
AC
85 int len;
86
e0cd5160 87#ifdef CONFIG_NUMA
6be954d1
DJ
88 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
89 cpumask_of_node(dev_to_node(dev));
e0cd5160 90#else
3be83050 91 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 92#endif
c489f5fb
YW
93 len = type ?
94 cpumask_scnprintf(buf, PAGE_SIZE-2, mask) :
95 cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
96
39106dcf
MT
97 buf[len++] = '\n';
98 buf[len] = '\0';
99 return len;
100}
101
c489f5fb
YW
102static ssize_t local_cpus_show(struct device *dev,
103 struct device_attribute *attr, char *buf)
104{
105 return pci_dev_show_local_cpu(dev, 1, attr, buf);
106}
5136b2da 107static DEVICE_ATTR_RO(local_cpus);
39106dcf
MT
108
109static ssize_t local_cpulist_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
c489f5fb 112 return pci_dev_show_local_cpu(dev, 0, attr, buf);
1da177e4 113}
5136b2da 114static DEVICE_ATTR_RO(local_cpulist);
1da177e4 115
dc2c2c9d
YL
116/*
117 * PCI Bus Class Devices
118 */
119static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
120 int type,
121 struct device_attribute *attr,
122 char *buf)
123{
124 int ret;
125 const struct cpumask *cpumask;
126
127 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
128 ret = type ?
129 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
130 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
131 buf[ret++] = '\n';
132 buf[ret] = '\0';
133 return ret;
134}
135
56039e65
GKH
136static ssize_t cpuaffinity_show(struct device *dev,
137 struct device_attribute *attr, char *buf)
dc2c2c9d
YL
138{
139 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
140}
56039e65 141static DEVICE_ATTR_RO(cpuaffinity);
dc2c2c9d 142
56039e65
GKH
143static ssize_t cpulistaffinity_show(struct device *dev,
144 struct device_attribute *attr, char *buf)
dc2c2c9d
YL
145{
146 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
147}
56039e65 148static DEVICE_ATTR_RO(cpulistaffinity);
dc2c2c9d 149
1da177e4
LT
150/* show resources */
151static ssize_t
e404e274 152resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
153{
154 struct pci_dev * pci_dev = to_pci_dev(dev);
155 char * str = buf;
156 int i;
fde09c6d 157 int max;
e31dd6e4 158 resource_size_t start, end;
1da177e4
LT
159
160 if (pci_dev->subordinate)
161 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
162 else
163 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
164
165 for (i = 0; i < max; i++) {
2311b1f2
ME
166 struct resource *res = &pci_dev->resource[i];
167 pci_resource_to_user(pci_dev, i, res, &start, &end);
168 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
169 (unsigned long long)start,
170 (unsigned long long)end,
171 (unsigned long long)res->flags);
1da177e4
LT
172 }
173 return (str - buf);
174}
5136b2da 175static DEVICE_ATTR_RO(resource);
1da177e4 176
87c8a443 177static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
178{
179 struct pci_dev *pci_dev = to_pci_dev(dev);
180
181 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
182 pci_dev->vendor, pci_dev->device,
183 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
184 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
185 (u8)(pci_dev->class));
186}
5136b2da 187static DEVICE_ATTR_RO(modalias);
bae94d02 188
5136b2da
GKH
189static ssize_t enabled_store(struct device *dev,
190 struct device_attribute *attr, const char *buf,
191 size_t count)
9f125d30
AV
192{
193 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 194 unsigned long val;
9a994e8e 195 ssize_t result = kstrtoul(buf, 0, &val);
92425a40
TP
196
197 if (result < 0)
198 return result;
9f125d30
AV
199
200 /* this can crash the machine when done on the "wrong" device */
201 if (!capable(CAP_SYS_ADMIN))
92425a40 202 return -EPERM;
9f125d30 203
92425a40 204 if (!val) {
296ccb08 205 if (pci_is_enabled(pdev))
bae94d02
IPG
206 pci_disable_device(pdev);
207 else
208 result = -EIO;
92425a40 209 } else
bae94d02 210 result = pci_enable_device(pdev);
9f125d30 211
bae94d02
IPG
212 return result < 0 ? result : count;
213}
214
5136b2da
GKH
215static ssize_t enabled_show(struct device *dev,
216 struct device_attribute *attr, char *buf)
bae94d02
IPG
217{
218 struct pci_dev *pdev;
9f125d30 219
bae94d02
IPG
220 pdev = to_pci_dev (dev);
221 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30 222}
5136b2da 223static DEVICE_ATTR_RW(enabled);
9f125d30 224
81bb0e19
BG
225#ifdef CONFIG_NUMA
226static ssize_t
227numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
228{
229 return sprintf (buf, "%d\n", dev->numa_node);
230}
5136b2da 231static DEVICE_ATTR_RO(numa_node);
81bb0e19
BG
232#endif
233
bb965401
YL
234static ssize_t
235dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
236{
237 struct pci_dev *pdev = to_pci_dev(dev);
238
239 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
240}
5136b2da 241static DEVICE_ATTR_RO(dma_mask_bits);
bb965401
YL
242
243static ssize_t
244consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
245 char *buf)
246{
247 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
248}
5136b2da 249static DEVICE_ATTR_RO(consistent_dma_mask_bits);
bb965401 250
fe97064c
BG
251static ssize_t
252msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
253{
254 struct pci_dev *pdev = to_pci_dev(dev);
255
256 if (!pdev->subordinate)
257 return 0;
258
259 return sprintf (buf, "%u\n",
260 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
261}
262
263static ssize_t
264msi_bus_store(struct device *dev, struct device_attribute *attr,
265 const char *buf, size_t count)
266{
267 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
268 unsigned long val;
269
9a994e8e 270 if (kstrtoul(buf, 0, &val) < 0)
92425a40 271 return -EINVAL;
fe97064c 272
f7625980
BH
273 /*
274 * Bad things may happen if the no_msi flag is changed
275 * while drivers are loaded.
276 */
fe97064c 277 if (!capable(CAP_SYS_ADMIN))
92425a40 278 return -EPERM;
fe97064c 279
f7625980
BH
280 /*
281 * Maybe devices without subordinate buses shouldn't have this
282 * attribute in the first place?
283 */
fe97064c
BG
284 if (!pdev->subordinate)
285 return count;
286
92425a40
TP
287 /* Is the flag going to change, or keep the value it already had? */
288 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
289 !!val) {
290 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 291
92425a40
TP
292 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
293 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
294 }
295
296 return count;
297}
5136b2da 298static DEVICE_ATTR_RW(msi_bus);
9888549e 299
705b1aaa
AC
300static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
301 size_t count)
302{
303 unsigned long val;
304 struct pci_bus *b = NULL;
305
9a994e8e 306 if (kstrtoul(buf, 0, &val) < 0)
705b1aaa
AC
307 return -EINVAL;
308
309 if (val) {
9d16947b 310 pci_lock_rescan_remove();
705b1aaa
AC
311 while ((b = pci_find_next_bus(b)) != NULL)
312 pci_rescan_bus(b);
9d16947b 313 pci_unlock_rescan_remove();
705b1aaa
AC
314 }
315 return count;
316}
0f49ba55 317static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
705b1aaa 318
bf22c90f 319static struct attribute *pci_bus_attrs[] = {
0f49ba55
GKH
320 &bus_attr_rescan.attr,
321 NULL,
322};
323
324static const struct attribute_group pci_bus_group = {
325 .attrs = pci_bus_attrs,
326};
327
328const struct attribute_group *pci_bus_groups[] = {
329 &pci_bus_group,
330 NULL,
705b1aaa 331};
77c27c7b 332
738a6396
AC
333static ssize_t
334dev_rescan_store(struct device *dev, struct device_attribute *attr,
335 const char *buf, size_t count)
336{
337 unsigned long val;
338 struct pci_dev *pdev = to_pci_dev(dev);
339
9a994e8e 340 if (kstrtoul(buf, 0, &val) < 0)
738a6396
AC
341 return -EINVAL;
342
343 if (val) {
9d16947b 344 pci_lock_rescan_remove();
738a6396 345 pci_rescan_bus(pdev->bus);
9d16947b 346 pci_unlock_rescan_remove();
738a6396
AC
347 }
348 return count;
349}
bf22c90f
SK
350static struct device_attribute dev_rescan_attr = __ATTR(rescan,
351 (S_IWUSR|S_IWGRP),
352 NULL, dev_rescan_store);
738a6396 353
77c27c7b
AC
354static void remove_callback(struct device *dev)
355{
9d16947b 356 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
77c27c7b
AC
357}
358
359static ssize_t
360remove_store(struct device *dev, struct device_attribute *dummy,
361 const char *buf, size_t count)
362{
363 int ret = 0;
364 unsigned long val;
77c27c7b 365
9a994e8e 366 if (kstrtoul(buf, 0, &val) < 0)
77c27c7b
AC
367 return -EINVAL;
368
77c27c7b
AC
369 /* An attribute cannot be unregistered by one of its own methods,
370 * so we have to use this roundabout approach.
371 */
372 if (val)
373 ret = device_schedule_callback(dev, remove_callback);
374 if (ret)
375 count = ret;
376 return count;
377}
bf22c90f
SK
378static struct device_attribute dev_remove_attr = __ATTR(remove,
379 (S_IWUSR|S_IWGRP),
380 NULL, remove_store);
b9d320fc
YL
381
382static ssize_t
383dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
384 const char *buf, size_t count)
385{
386 unsigned long val;
387 struct pci_bus *bus = to_pci_bus(dev);
388
9a994e8e 389 if (kstrtoul(buf, 0, &val) < 0)
b9d320fc
YL
390 return -EINVAL;
391
392 if (val) {
9d16947b 393 pci_lock_rescan_remove();
2f320521
YL
394 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
395 pci_rescan_bus_bridge_resize(bus->self);
396 else
397 pci_rescan_bus(bus);
9d16947b 398 pci_unlock_rescan_remove();
b9d320fc
YL
399 }
400 return count;
401}
56039e65 402static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
b9d320fc 403
448bd857
HY
404#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
405static ssize_t d3cold_allowed_store(struct device *dev,
406 struct device_attribute *attr,
407 const char *buf, size_t count)
408{
409 struct pci_dev *pdev = to_pci_dev(dev);
410 unsigned long val;
411
9a994e8e 412 if (kstrtoul(buf, 0, &val) < 0)
448bd857
HY
413 return -EINVAL;
414
415 pdev->d3cold_allowed = !!val;
416 pm_runtime_resume(dev);
417
418 return count;
419}
420
421static ssize_t d3cold_allowed_show(struct device *dev,
422 struct device_attribute *attr, char *buf)
423{
424 struct pci_dev *pdev = to_pci_dev(dev);
425 return sprintf (buf, "%u\n", pdev->d3cold_allowed);
426}
5136b2da 427static DEVICE_ATTR_RW(d3cold_allowed);
448bd857
HY
428#endif
429
1789382a
DD
430#ifdef CONFIG_PCI_IOV
431static ssize_t sriov_totalvfs_show(struct device *dev,
432 struct device_attribute *attr,
433 char *buf)
434{
435 struct pci_dev *pdev = to_pci_dev(dev);
436
bff73156 437 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
1789382a
DD
438}
439
440
441static ssize_t sriov_numvfs_show(struct device *dev,
442 struct device_attribute *attr,
443 char *buf)
444{
445 struct pci_dev *pdev = to_pci_dev(dev);
446
6b136724 447 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
1789382a
DD
448}
449
450/*
faa48a50
BH
451 * num_vfs > 0; number of VFs to enable
452 * num_vfs = 0; disable all VFs
1789382a
DD
453 *
454 * Note: SRIOV spec doesn't allow partial VF
faa48a50 455 * disable, so it's all or none.
1789382a
DD
456 */
457static ssize_t sriov_numvfs_store(struct device *dev,
458 struct device_attribute *attr,
459 const char *buf, size_t count)
460{
461 struct pci_dev *pdev = to_pci_dev(dev);
faa48a50
BH
462 int ret;
463 u16 num_vfs;
1789382a 464
faa48a50
BH
465 ret = kstrtou16(buf, 0, &num_vfs);
466 if (ret < 0)
467 return ret;
468
469 if (num_vfs > pci_sriov_get_totalvfs(pdev))
470 return -ERANGE;
471
472 if (num_vfs == pdev->sriov->num_VFs)
473 return count; /* no change */
1789382a
DD
474
475 /* is PF driver loaded w/callback */
476 if (!pdev->driver || !pdev->driver->sriov_configure) {
faa48a50 477 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
1789382a
DD
478 return -ENOSYS;
479 }
480
faa48a50
BH
481 if (num_vfs == 0) {
482 /* disable VFs */
483 ret = pdev->driver->sriov_configure(pdev, 0);
484 if (ret < 0)
485 return ret;
486 return count;
1789382a
DD
487 }
488
faa48a50
BH
489 /* enable VFs */
490 if (pdev->sriov->num_VFs) {
491 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
492 pdev->sriov->num_VFs, num_vfs);
493 return -EBUSY;
1789382a
DD
494 }
495
faa48a50
BH
496 ret = pdev->driver->sriov_configure(pdev, num_vfs);
497 if (ret < 0)
498 return ret;
1789382a 499
faa48a50
BH
500 if (ret != num_vfs)
501 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
502 num_vfs, ret);
503
504 return count;
1789382a
DD
505}
506
507static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
508static struct device_attribute sriov_numvfs_attr =
509 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
510 sriov_numvfs_show, sriov_numvfs_store);
511#endif /* CONFIG_PCI_IOV */
512
bf22c90f 513static struct attribute *pci_dev_attrs[] = {
5136b2da
GKH
514 &dev_attr_resource.attr,
515 &dev_attr_vendor.attr,
516 &dev_attr_device.attr,
517 &dev_attr_subsystem_vendor.attr,
518 &dev_attr_subsystem_device.attr,
519 &dev_attr_class.attr,
520 &dev_attr_irq.attr,
521 &dev_attr_local_cpus.attr,
522 &dev_attr_local_cpulist.attr,
523 &dev_attr_modalias.attr,
81bb0e19 524#ifdef CONFIG_NUMA
5136b2da 525 &dev_attr_numa_node.attr,
81bb0e19 526#endif
5136b2da
GKH
527 &dev_attr_dma_mask_bits.attr,
528 &dev_attr_consistent_dma_mask_bits.attr,
529 &dev_attr_enabled.attr,
530 &dev_attr_broken_parity_status.attr,
531 &dev_attr_msi_bus.attr,
448bd857 532#if defined(CONFIG_PM_RUNTIME) && defined(CONFIG_ACPI)
5136b2da 533 &dev_attr_d3cold_allowed.attr,
77c27c7b 534#endif
5136b2da
GKH
535 NULL,
536};
537
538static const struct attribute_group pci_dev_group = {
539 .attrs = pci_dev_attrs,
540};
541
542const struct attribute_group *pci_dev_groups[] = {
543 &pci_dev_group,
544 NULL,
1da177e4
LT
545};
546
56039e65
GKH
547static struct attribute *pcibus_attrs[] = {
548 &dev_attr_rescan.attr,
549 &dev_attr_cpuaffinity.attr,
550 &dev_attr_cpulistaffinity.attr,
551 NULL,
552};
553
554static const struct attribute_group pcibus_group = {
555 .attrs = pcibus_attrs,
556};
557
558const struct attribute_group *pcibus_groups[] = {
559 &pcibus_group,
560 NULL,
b9d320fc
YL
561};
562
217f45de
DA
563static ssize_t
564boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
565{
566 struct pci_dev *pdev = to_pci_dev(dev);
1a39b310
MG
567 struct pci_dev *vga_dev = vga_default_device();
568
569 if (vga_dev)
570 return sprintf(buf, "%u\n", (pdev == vga_dev));
217f45de
DA
571
572 return sprintf(buf, "%u\n",
573 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
574 IORESOURCE_ROM_SHADOW));
575}
bf22c90f 576static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
217f45de 577
1da177e4 578static ssize_t
2c3c8bea
CW
579pci_read_config(struct file *filp, struct kobject *kobj,
580 struct bin_attribute *bin_attr,
91a69029 581 char *buf, loff_t off, size_t count)
1da177e4
LT
582{
583 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
584 unsigned int size = 64;
585 loff_t init_off = off;
4c0619ad 586 u8 *data = (u8*) buf;
1da177e4
LT
587
588 /* Several chips lock up trying to read undefined config space */
b7e724d3 589 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
1da177e4
LT
590 size = dev->cfg_size;
591 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
592 size = 128;
593 }
594
595 if (off > size)
596 return 0;
597 if (off + count > size) {
598 size -= off;
599 count = size;
600 } else {
601 size = count;
602 }
603
3d8387ef
HY
604 pci_config_pm_runtime_get(dev);
605
4c0619ad 606 if ((off & 1) && size) {
607 u8 val;
e04b0ea2 608 pci_user_read_config_byte(dev, off, &val);
4c0619ad 609 data[off - init_off] = val;
1da177e4 610 off++;
4c0619ad 611 size--;
612 }
613
614 if ((off & 3) && size > 2) {
615 u16 val;
e04b0ea2 616 pci_user_read_config_word(dev, off, &val);
4c0619ad 617 data[off - init_off] = val & 0xff;
618 data[off - init_off + 1] = (val >> 8) & 0xff;
619 off += 2;
620 size -= 2;
1da177e4
LT
621 }
622
623 while (size > 3) {
4c0619ad 624 u32 val;
e04b0ea2 625 pci_user_read_config_dword(dev, off, &val);
4c0619ad 626 data[off - init_off] = val & 0xff;
627 data[off - init_off + 1] = (val >> 8) & 0xff;
628 data[off - init_off + 2] = (val >> 16) & 0xff;
629 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
630 off += 4;
631 size -= 4;
632 }
633
4c0619ad 634 if (size >= 2) {
635 u16 val;
e04b0ea2 636 pci_user_read_config_word(dev, off, &val);
4c0619ad 637 data[off - init_off] = val & 0xff;
638 data[off - init_off + 1] = (val >> 8) & 0xff;
639 off += 2;
640 size -= 2;
641 }
642
643 if (size > 0) {
644 u8 val;
e04b0ea2 645 pci_user_read_config_byte(dev, off, &val);
4c0619ad 646 data[off - init_off] = val;
1da177e4
LT
647 off++;
648 --size;
649 }
650
3d8387ef
HY
651 pci_config_pm_runtime_put(dev);
652
1da177e4
LT
653 return count;
654}
655
656static ssize_t
2c3c8bea
CW
657pci_write_config(struct file* filp, struct kobject *kobj,
658 struct bin_attribute *bin_attr,
91a69029 659 char *buf, loff_t off, size_t count)
1da177e4
LT
660{
661 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
662 unsigned int size = count;
663 loff_t init_off = off;
4c0619ad 664 u8 *data = (u8*) buf;
1da177e4
LT
665
666 if (off > dev->cfg_size)
667 return 0;
668 if (off + count > dev->cfg_size) {
669 size = dev->cfg_size - off;
670 count = size;
671 }
f7625980 672
3d8387ef
HY
673 pci_config_pm_runtime_get(dev);
674
4c0619ad 675 if ((off & 1) && size) {
e04b0ea2 676 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 677 off++;
4c0619ad 678 size--;
1da177e4 679 }
f7625980 680
4c0619ad 681 if ((off & 3) && size > 2) {
682 u16 val = data[off - init_off];
683 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 684 pci_user_write_config_word(dev, off, val);
4c0619ad 685 off += 2;
686 size -= 2;
687 }
1da177e4
LT
688
689 while (size > 3) {
4c0619ad 690 u32 val = data[off - init_off];
691 val |= (u32) data[off - init_off + 1] << 8;
692 val |= (u32) data[off - init_off + 2] << 16;
693 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 694 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
695 off += 4;
696 size -= 4;
697 }
f7625980 698
4c0619ad 699 if (size >= 2) {
700 u16 val = data[off - init_off];
701 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 702 pci_user_write_config_word(dev, off, val);
4c0619ad 703 off += 2;
704 size -= 2;
705 }
1da177e4 706
4c0619ad 707 if (size) {
e04b0ea2 708 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
709 off++;
710 --size;
711 }
712
3d8387ef
HY
713 pci_config_pm_runtime_put(dev);
714
1da177e4
LT
715 return count;
716}
717
94e61088 718static ssize_t
2c3c8bea
CW
719read_vpd_attr(struct file *filp, struct kobject *kobj,
720 struct bin_attribute *bin_attr,
287d19ce 721 char *buf, loff_t off, size_t count)
94e61088
BH
722{
723 struct pci_dev *dev =
724 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
725
726 if (off > bin_attr->size)
727 count = 0;
728 else if (count > bin_attr->size - off)
729 count = bin_attr->size - off;
94e61088 730
287d19ce 731 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
732}
733
734static ssize_t
2c3c8bea
CW
735write_vpd_attr(struct file *filp, struct kobject *kobj,
736 struct bin_attribute *bin_attr,
287d19ce 737 char *buf, loff_t off, size_t count)
94e61088
BH
738{
739 struct pci_dev *dev =
740 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
741
742 if (off > bin_attr->size)
743 count = 0;
744 else if (count > bin_attr->size - off)
745 count = bin_attr->size - off;
94e61088 746
287d19ce 747 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
748}
749
1da177e4
LT
750#ifdef HAVE_PCI_LEGACY
751/**
752 * pci_read_legacy_io - read byte(s) from legacy I/O port space
2c3c8bea 753 * @filp: open sysfs file
1da177e4 754 * @kobj: kobject corresponding to file to read from
cffb2faf 755 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
756 * @buf: buffer to store results
757 * @off: offset into legacy I/O port space
758 * @count: number of bytes to read
759 *
760 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
761 * callback routine (pci_legacy_read).
762 */
f19aeb1f 763static ssize_t
2c3c8bea
CW
764pci_read_legacy_io(struct file *filp, struct kobject *kobj,
765 struct bin_attribute *bin_attr,
91a69029 766 char *buf, loff_t off, size_t count)
1da177e4
LT
767{
768 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 769 struct device,
1da177e4
LT
770 kobj));
771
772 /* Only support 1, 2 or 4 byte accesses */
773 if (count != 1 && count != 2 && count != 4)
774 return -EINVAL;
775
776 return pci_legacy_read(bus, off, (u32 *)buf, count);
777}
778
779/**
780 * pci_write_legacy_io - write byte(s) to legacy I/O port space
2c3c8bea 781 * @filp: open sysfs file
1da177e4 782 * @kobj: kobject corresponding to file to read from
cffb2faf 783 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
784 * @buf: buffer containing value to be written
785 * @off: offset into legacy I/O port space
786 * @count: number of bytes to write
787 *
788 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
789 * callback routine (pci_legacy_write).
790 */
f19aeb1f 791static ssize_t
2c3c8bea
CW
792pci_write_legacy_io(struct file *filp, struct kobject *kobj,
793 struct bin_attribute *bin_attr,
91a69029 794 char *buf, loff_t off, size_t count)
1da177e4
LT
795{
796 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 797 struct device,
1da177e4
LT
798 kobj));
799 /* Only support 1, 2 or 4 byte accesses */
800 if (count != 1 && count != 2 && count != 4)
801 return -EINVAL;
802
803 return pci_legacy_write(bus, off, *(u32 *)buf, count);
804}
805
806/**
807 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
2c3c8bea 808 * @filp: open sysfs file
1da177e4
LT
809 * @kobj: kobject corresponding to device to be mapped
810 * @attr: struct bin_attribute for this file
811 * @vma: struct vm_area_struct passed to mmap
812 *
f19aeb1f 813 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
814 * legacy memory space (first meg of bus space) into application virtual
815 * memory space.
816 */
f19aeb1f 817static int
2c3c8bea
CW
818pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
819 struct bin_attribute *attr,
1da177e4
LT
820 struct vm_area_struct *vma)
821{
822 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 823 struct device,
1da177e4
LT
824 kobj));
825
f19aeb1f
BH
826 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
827}
828
829/**
830 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
2c3c8bea 831 * @filp: open sysfs file
f19aeb1f
BH
832 * @kobj: kobject corresponding to device to be mapped
833 * @attr: struct bin_attribute for this file
834 * @vma: struct vm_area_struct passed to mmap
835 *
836 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
837 * legacy IO space (first meg of bus space) into application virtual
838 * memory space. Returns -ENOSYS if the operation isn't supported
839 */
840static int
2c3c8bea
CW
841pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
842 struct bin_attribute *attr,
f19aeb1f
BH
843 struct vm_area_struct *vma)
844{
845 struct pci_bus *bus = to_pci_bus(container_of(kobj,
846 struct device,
847 kobj));
848
849 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
850}
851
10a0ef39
IK
852/**
853 * pci_adjust_legacy_attr - adjustment of legacy file attributes
854 * @b: bus to create files under
855 * @mmap_type: I/O port or memory
856 *
857 * Stub implementation. Can be overridden by arch if necessary.
858 */
859void __weak
860pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
861{
862 return;
863}
864
f19aeb1f
BH
865/**
866 * pci_create_legacy_files - create legacy I/O port and memory files
867 * @b: bus to create files under
868 *
869 * Some platforms allow access to legacy I/O port and ISA memory space on
870 * a per-bus basis. This routine creates the files and ties them into
871 * their associated read, write and mmap files from pci-sysfs.c
872 *
25985edc 873 * On error unwind, but don't propagate the error to the caller
f19aeb1f
BH
874 * as it is ok to set up the PCI bus without these files.
875 */
876void pci_create_legacy_files(struct pci_bus *b)
877{
878 int error;
879
880 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
881 GFP_ATOMIC);
882 if (!b->legacy_io)
883 goto kzalloc_err;
884
62e877b8 885 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
886 b->legacy_io->attr.name = "legacy_io";
887 b->legacy_io->size = 0xffff;
888 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
889 b->legacy_io->read = pci_read_legacy_io;
890 b->legacy_io->write = pci_write_legacy_io;
891 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 892 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
893 error = device_create_bin_file(&b->dev, b->legacy_io);
894 if (error)
895 goto legacy_io_err;
896
897 /* Allocated above after the legacy_io struct */
898 b->legacy_mem = b->legacy_io + 1;
6757eca3 899 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
900 b->legacy_mem->attr.name = "legacy_mem";
901 b->legacy_mem->size = 1024*1024;
902 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
903 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 904 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
905 error = device_create_bin_file(&b->dev, b->legacy_mem);
906 if (error)
907 goto legacy_mem_err;
908
909 return;
910
911legacy_mem_err:
912 device_remove_bin_file(&b->dev, b->legacy_io);
913legacy_io_err:
914 kfree(b->legacy_io);
915 b->legacy_io = NULL;
916kzalloc_err:
917 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
918 "and ISA memory resources to sysfs\n");
919 return;
920}
921
922void pci_remove_legacy_files(struct pci_bus *b)
923{
924 if (b->legacy_io) {
925 device_remove_bin_file(&b->dev, b->legacy_io);
926 device_remove_bin_file(&b->dev, b->legacy_mem);
927 kfree(b->legacy_io); /* both are allocated here */
928 }
1da177e4
LT
929}
930#endif /* HAVE_PCI_LEGACY */
931
932#ifdef HAVE_PCI_MMAP
b5ff7df3 933
3b519e4e
MW
934int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
935 enum pci_mmap_api mmap_api)
b5ff7df3 936{
3b519e4e 937 unsigned long nr, start, size, pci_start;
b5ff7df3 938
3b519e4e
MW
939 if (pci_resource_len(pdev, resno) == 0)
940 return 0;
64b00175 941 nr = vma_pages(vma);
b5ff7df3 942 start = vma->vm_pgoff;
88e7df0b 943 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
8c05cd08 944 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
3b519e4e
MW
945 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
946 if (start >= pci_start && start < pci_start + size &&
947 start + nr <= pci_start + size)
b5ff7df3 948 return 1;
b5ff7df3
LT
949 return 0;
950}
951
1da177e4
LT
952/**
953 * pci_mmap_resource - map a PCI resource into user memory space
954 * @kobj: kobject for mapping
955 * @attr: struct bin_attribute for the file being mapped
956 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 957 * @write_combine: 1 for write_combine mapping
1da177e4
LT
958 *
959 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
960 */
961static int
962pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 963 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
964{
965 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
966 struct device, kobj));
a3f5835a 967 struct resource *res = attr->private;
1da177e4 968 enum pci_mmap_state mmap_type;
e31dd6e4 969 resource_size_t start, end;
2311b1f2 970 int i;
1da177e4 971
2311b1f2
ME
972 for (i = 0; i < PCI_ROM_RESOURCE; i++)
973 if (res == &pdev->resource[i])
974 break;
975 if (i >= PCI_ROM_RESOURCE)
976 return -ENODEV;
977
3b519e4e
MW
978 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
979 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
980 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
981 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
982 pci_name(pdev), i,
e25cd062
RD
983 (u64)pci_resource_start(pdev, i),
984 (u64)pci_resource_len(pdev, i));
b5ff7df3 985 return -EINVAL;
3b519e4e 986 }
b5ff7df3 987
2311b1f2
ME
988 /* pci_mmap_page_range() expects the same kind of entry as coming
989 * from /proc/bus/pci/ which is a "user visible" value. If this is
990 * different from the resource itself, arch will do necessary fixup.
991 */
992 pci_resource_to_user(pdev, i, res, &start, &end);
993 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
994 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
995
e8de1481
AV
996 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
997 return -EINVAL;
998
45aec1ae 999 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
1000}
1001
1002static int
2c3c8bea
CW
1003pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1004 struct bin_attribute *attr,
45aec1ae 1005 struct vm_area_struct *vma)
1006{
1007 return pci_mmap_resource(kobj, attr, vma, 0);
1008}
1009
1010static int
2c3c8bea
CW
1011pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1012 struct bin_attribute *attr,
45aec1ae 1013 struct vm_area_struct *vma)
1014{
1015 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
1016}
1017
8633328b
AW
1018static ssize_t
1019pci_resource_io(struct file *filp, struct kobject *kobj,
1020 struct bin_attribute *attr, char *buf,
1021 loff_t off, size_t count, bool write)
1022{
1023 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
1024 struct device, kobj));
1025 struct resource *res = attr->private;
1026 unsigned long port = off;
1027 int i;
1028
1029 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1030 if (res == &pdev->resource[i])
1031 break;
1032 if (i >= PCI_ROM_RESOURCE)
1033 return -ENODEV;
1034
1035 port += pci_resource_start(pdev, i);
1036
1037 if (port > pci_resource_end(pdev, i))
1038 return 0;
1039
1040 if (port + count - 1 > pci_resource_end(pdev, i))
1041 return -EINVAL;
1042
1043 switch (count) {
1044 case 1:
1045 if (write)
1046 outb(*(u8 *)buf, port);
1047 else
1048 *(u8 *)buf = inb(port);
1049 return 1;
1050 case 2:
1051 if (write)
1052 outw(*(u16 *)buf, port);
1053 else
1054 *(u16 *)buf = inw(port);
1055 return 2;
1056 case 4:
1057 if (write)
1058 outl(*(u32 *)buf, port);
1059 else
1060 *(u32 *)buf = inl(port);
1061 return 4;
1062 }
1063 return -EINVAL;
1064}
1065
1066static ssize_t
1067pci_read_resource_io(struct file *filp, struct kobject *kobj,
1068 struct bin_attribute *attr, char *buf,
1069 loff_t off, size_t count)
1070{
1071 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1072}
1073
1074static ssize_t
1075pci_write_resource_io(struct file *filp, struct kobject *kobj,
1076 struct bin_attribute *attr, char *buf,
1077 loff_t off, size_t count)
1078{
1079 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1080}
1081
b19441af
GKH
1082/**
1083 * pci_remove_resource_files - cleanup resource files
cffb2faf 1084 * @pdev: dev to cleanup
b19441af 1085 *
cffb2faf 1086 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
1087 * free their resources.
1088 */
1089static void
1090pci_remove_resource_files(struct pci_dev *pdev)
1091{
1092 int i;
1093
1094 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1095 struct bin_attribute *res_attr;
1096
1097 res_attr = pdev->res_attr[i];
1098 if (res_attr) {
1099 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1100 kfree(res_attr);
1101 }
45aec1ae 1102
1103 res_attr = pdev->res_attr_wc[i];
1104 if (res_attr) {
1105 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1106 kfree(res_attr);
1107 }
b19441af
GKH
1108 }
1109}
1110
45aec1ae 1111static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1112{
1113 /* allocate attribute structure, piggyback attribute name */
1114 int name_len = write_combine ? 13 : 10;
1115 struct bin_attribute *res_attr;
1116 int retval;
1117
1118 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1119 if (res_attr) {
1120 char *res_attr_name = (char *)(res_attr + 1);
1121
a07e4156 1122 sysfs_bin_attr_init(res_attr);
45aec1ae 1123 if (write_combine) {
1124 pdev->res_attr_wc[num] = res_attr;
1125 sprintf(res_attr_name, "resource%d_wc", num);
1126 res_attr->mmap = pci_mmap_resource_wc;
1127 } else {
1128 pdev->res_attr[num] = res_attr;
1129 sprintf(res_attr_name, "resource%d", num);
1130 res_attr->mmap = pci_mmap_resource_uc;
1131 }
8633328b
AW
1132 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1133 res_attr->read = pci_read_resource_io;
1134 res_attr->write = pci_write_resource_io;
1135 }
45aec1ae 1136 res_attr->attr.name = res_attr_name;
1137 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1138 res_attr->size = pci_resource_len(pdev, num);
1139 res_attr->private = &pdev->resource[num];
1140 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1141 } else
1142 retval = -ENOMEM;
1143
1144 return retval;
1145}
1146
1da177e4
LT
1147/**
1148 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 1149 * @pdev: dev in question
1da177e4 1150 *
cffb2faf 1151 * Walk the resources in @pdev creating files for each resource available.
1da177e4 1152 */
b19441af 1153static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
1154{
1155 int i;
b19441af 1156 int retval;
1da177e4
LT
1157
1158 /* Expose the PCI resources from this device as files */
1159 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
1160
1161 /* skip empty resources */
1162 if (!pci_resource_len(pdev, i))
1163 continue;
1164
45aec1ae 1165 retval = pci_create_attr(pdev, i, 0);
1166 /* for prefetchable resources, create a WC mappable file */
1167 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1168 retval = pci_create_attr(pdev, i, 1);
1169
1170 if (retval) {
1171 pci_remove_resource_files(pdev);
1172 return retval;
1da177e4
LT
1173 }
1174 }
b19441af 1175 return 0;
1da177e4
LT
1176}
1177#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
1178int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1179void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
1180#endif /* HAVE_PCI_MMAP */
1181
1182/**
1183 * pci_write_rom - used to enable access to the PCI ROM display
2c3c8bea 1184 * @filp: sysfs file
1da177e4 1185 * @kobj: kernel object handle
cffb2faf 1186 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1187 * @buf: user input
1188 * @off: file offset
1189 * @count: number of byte in input
1190 *
1191 * writing anything except 0 enables it
1192 */
1193static ssize_t
2c3c8bea
CW
1194pci_write_rom(struct file *filp, struct kobject *kobj,
1195 struct bin_attribute *bin_attr,
91a69029 1196 char *buf, loff_t off, size_t count)
1da177e4
LT
1197{
1198 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1199
1200 if ((off == 0) && (*buf == '0') && (count == 2))
1201 pdev->rom_attr_enabled = 0;
1202 else
1203 pdev->rom_attr_enabled = 1;
1204
1205 return count;
1206}
1207
1208/**
1209 * pci_read_rom - read a PCI ROM
2c3c8bea 1210 * @filp: sysfs file
1da177e4 1211 * @kobj: kernel object handle
cffb2faf 1212 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
1213 * @buf: where to put the data we read from the ROM
1214 * @off: file offset
1215 * @count: number of bytes to read
1216 *
1217 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1218 * device corresponding to @kobj.
1219 */
1220static ssize_t
2c3c8bea
CW
1221pci_read_rom(struct file *filp, struct kobject *kobj,
1222 struct bin_attribute *bin_attr,
91a69029 1223 char *buf, loff_t off, size_t count)
1da177e4
LT
1224{
1225 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1226 void __iomem *rom;
1227 size_t size;
1228
1229 if (!pdev->rom_attr_enabled)
1230 return -EINVAL;
f7625980 1231
1da177e4 1232 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
1233 if (!rom || !size)
1234 return -EIO;
f7625980 1235
1da177e4
LT
1236 if (off >= size)
1237 count = 0;
1238 else {
1239 if (off + count > size)
1240 count = size - off;
f7625980 1241
1da177e4
LT
1242 memcpy_fromio(buf, rom + off, count);
1243 }
1244 pci_unmap_rom(pdev, rom);
f7625980 1245
1da177e4
LT
1246 return count;
1247}
1248
1249static struct bin_attribute pci_config_attr = {
1250 .attr = {
1251 .name = "config",
1252 .mode = S_IRUGO | S_IWUSR,
1da177e4 1253 },
557848c3 1254 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
1255 .read = pci_read_config,
1256 .write = pci_write_config,
1257};
1258
1259static struct bin_attribute pcie_config_attr = {
1260 .attr = {
1261 .name = "config",
1262 .mode = S_IRUGO | S_IWUSR,
1da177e4 1263 },
557848c3 1264 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
1265 .read = pci_read_config,
1266 .write = pci_write_config,
1267};
1268
d6d88c83 1269int __weak pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 1270{
a2cd52ca 1271 return 0;
575e3348
ME
1272}
1273
711d5779
MT
1274static ssize_t reset_store(struct device *dev,
1275 struct device_attribute *attr, const char *buf,
1276 size_t count)
1277{
1278 struct pci_dev *pdev = to_pci_dev(dev);
1279 unsigned long val;
9a994e8e 1280 ssize_t result = kstrtoul(buf, 0, &val);
711d5779
MT
1281
1282 if (result < 0)
1283 return result;
1284
1285 if (val != 1)
1286 return -EINVAL;
447c5dd7
MS
1287
1288 result = pci_reset_function(pdev);
1289 if (result < 0)
1290 return result;
1291
1292 return count;
711d5779
MT
1293}
1294
1295static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1296
280c73d3
ZY
1297static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1298{
1299 int retval;
1300 struct bin_attribute *attr;
1301
1302 /* If the device has VPD, try to expose it in sysfs. */
1303 if (dev->vpd) {
1304 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1305 if (!attr)
1306 return -ENOMEM;
1307
a07e4156 1308 sysfs_bin_attr_init(attr);
280c73d3
ZY
1309 attr->size = dev->vpd->len;
1310 attr->attr.name = "vpd";
1311 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
1312 attr->read = read_vpd_attr;
1313 attr->write = write_vpd_attr;
280c73d3
ZY
1314 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1315 if (retval) {
0f12a4e2 1316 kfree(attr);
280c73d3
ZY
1317 return retval;
1318 }
1319 dev->vpd->attr = attr;
1320 }
1321
1322 /* Active State Power Management */
1323 pcie_aspm_create_sysfs_dev_files(dev);
1324
711d5779
MT
1325 if (!pci_probe_reset_function(dev)) {
1326 retval = device_create_file(&dev->dev, &reset_attr);
1327 if (retval)
1328 goto error;
1329 dev->reset_fn = 1;
1330 }
280c73d3 1331 return 0;
711d5779
MT
1332
1333error:
1334 pcie_aspm_remove_sysfs_dev_files(dev);
1335 if (dev->vpd && dev->vpd->attr) {
1336 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1337 kfree(dev->vpd->attr);
1338 }
1339
1340 return retval;
280c73d3
ZY
1341}
1342
b19441af 1343int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1344{
b19441af 1345 int retval;
280c73d3
ZY
1346 int rom_size = 0;
1347 struct bin_attribute *attr;
b19441af 1348
1da177e4
LT
1349 if (!sysfs_initialized)
1350 return -EACCES;
1351
557848c3 1352 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1353 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1354 else
b19441af
GKH
1355 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1356 if (retval)
1357 goto err;
1da177e4 1358
b19441af
GKH
1359 retval = pci_create_resource_files(pdev);
1360 if (retval)
280c73d3
ZY
1361 goto err_config_file;
1362
1363 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1364 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1365 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1366 rom_size = 0x20000;
1da177e4
LT
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1369 if (rom_size) {
94e61088 1370 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1371 if (!attr) {
b19441af 1372 retval = -ENOMEM;
9890b12a 1373 goto err_resource_files;
1da177e4 1374 }
a07e4156 1375 sysfs_bin_attr_init(attr);
280c73d3
ZY
1376 attr->size = rom_size;
1377 attr->attr.name = "rom";
ff29530e 1378 attr->attr.mode = S_IRUSR | S_IWUSR;
280c73d3
ZY
1379 attr->read = pci_read_rom;
1380 attr->write = pci_write_rom;
1381 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1382 if (retval) {
1383 kfree(attr);
1384 goto err_resource_files;
1385 }
1386 pdev->rom_attr = attr;
1da177e4 1387 }
280c73d3 1388
1da177e4 1389 /* add platform-specific attributes */
280c73d3
ZY
1390 retval = pcibios_add_platform_entries(pdev);
1391 if (retval)
625e1d59 1392 goto err_rom_file;
b19441af 1393
280c73d3
ZY
1394 /* add sysfs entries for various capabilities */
1395 retval = pci_create_capabilities_sysfs(pdev);
1396 if (retval)
625e1d59 1397 goto err_rom_file;
7d715a6c 1398
911e1c9b
N
1399 pci_create_firmware_label_files(pdev);
1400
1da177e4 1401 return 0;
b19441af 1402
a2cd52ca 1403err_rom_file:
280c73d3 1404 if (rom_size) {
94e61088 1405 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1406 kfree(pdev->rom_attr);
1407 pdev->rom_attr = NULL;
1408 }
9890b12a
ME
1409err_resource_files:
1410 pci_remove_resource_files(pdev);
94e61088 1411err_config_file:
557848c3 1412 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1413 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1414 else
1415 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1416err:
1417 return retval;
1da177e4
LT
1418}
1419
280c73d3
ZY
1420static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1421{
1422 if (dev->vpd && dev->vpd->attr) {
1423 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1424 kfree(dev->vpd->attr);
1425 }
1426
1427 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1428 if (dev->reset_fn) {
1429 device_remove_file(&dev->dev, &reset_attr);
1430 dev->reset_fn = 0;
1431 }
280c73d3
ZY
1432}
1433
1da177e4
LT
1434/**
1435 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1436 * @pdev: device whose entries we should free
1437 *
1438 * Cleanup when @pdev is removed from sysfs.
1439 */
1440void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1441{
280c73d3
ZY
1442 int rom_size = 0;
1443
d67afe5e
DM
1444 if (!sysfs_initialized)
1445 return;
1446
280c73d3 1447 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1448
557848c3 1449 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1450 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1451 else
1452 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1453
1454 pci_remove_resource_files(pdev);
1455
280c73d3
ZY
1456 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1457 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1458 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1459 rom_size = 0x20000;
1460
1461 if (rom_size && pdev->rom_attr) {
1462 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1463 kfree(pdev->rom_attr);
1da177e4 1464 }
911e1c9b
N
1465
1466 pci_remove_firmware_label_files(pdev);
1467
1da177e4
LT
1468}
1469
1470static int __init pci_sysfs_init(void)
1471{
1472 struct pci_dev *pdev = NULL;
b19441af
GKH
1473 int retval;
1474
1da177e4 1475 sysfs_initialized = 1;
b19441af
GKH
1476 for_each_pci_dev(pdev) {
1477 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1478 if (retval) {
1479 pci_dev_put(pdev);
b19441af 1480 return retval;
151fc5df 1481 }
b19441af 1482 }
1da177e4
LT
1483
1484 return 0;
1485}
1486
40ee9e9f 1487late_initcall(pci_sysfs_init);
4e15c46b
YL
1488
1489static struct attribute *pci_dev_dev_attrs[] = {
625e1d59 1490 &vga_attr.attr,
4e15c46b
YL
1491 NULL,
1492};
1493
1494static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1495 struct attribute *a, int n)
1496{
625e1d59
YL
1497 struct device *dev = container_of(kobj, struct device, kobj);
1498 struct pci_dev *pdev = to_pci_dev(dev);
1499
1500 if (a == &vga_attr.attr)
1501 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1502 return 0;
1503
4e15c46b
YL
1504 return a->mode;
1505}
1506
dfab88be
JL
1507static struct attribute *pci_dev_hp_attrs[] = {
1508 &dev_remove_attr.attr,
1509 &dev_rescan_attr.attr,
1510 NULL,
1511};
1512
1513static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1514 struct attribute *a, int n)
1515{
1516 struct device *dev = container_of(kobj, struct device, kobj);
1517 struct pci_dev *pdev = to_pci_dev(dev);
1518
1519 if (pdev->is_virtfn)
1520 return 0;
1521
1522 return a->mode;
1523}
1524
1525static struct attribute_group pci_dev_hp_attr_group = {
1526 .attrs = pci_dev_hp_attrs,
1527 .is_visible = pci_dev_hp_attrs_are_visible,
1528};
1529
1789382a
DD
1530#ifdef CONFIG_PCI_IOV
1531static struct attribute *sriov_dev_attrs[] = {
1532 &sriov_totalvfs_attr.attr,
1533 &sriov_numvfs_attr.attr,
1534 NULL,
1535};
1536
1537static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1538 struct attribute *a, int n)
1539{
1540 struct device *dev = container_of(kobj, struct device, kobj);
1541
1542 if (!dev_is_pf(dev))
1543 return 0;
1544
1545 return a->mode;
1546}
1547
1548static struct attribute_group sriov_dev_attr_group = {
1549 .attrs = sriov_dev_attrs,
1550 .is_visible = sriov_attrs_are_visible,
1551};
1552#endif /* CONFIG_PCI_IOV */
1553
4e15c46b
YL
1554static struct attribute_group pci_dev_attr_group = {
1555 .attrs = pci_dev_dev_attrs,
1556 .is_visible = pci_dev_attrs_are_visible,
1557};
1558
1559static const struct attribute_group *pci_dev_attr_groups[] = {
1560 &pci_dev_attr_group,
dfab88be 1561 &pci_dev_hp_attr_group,
1789382a
DD
1562#ifdef CONFIG_PCI_IOV
1563 &sriov_dev_attr_group,
1564#endif
4e15c46b
YL
1565 NULL,
1566};
1567
1568struct device_type pci_dev_type = {
1569 .groups = pci_dev_attr_groups,
1570};
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