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Merge tag 'media/v3.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[deliverable/linux.git] / drivers / pci / pci.h
CommitLineData
557848c3
ZY		 1#ifndef DRIVERS_PCI_H
2#define DRIVERS_PCI_H
3
4#define PCI_CFG_SPACE_SIZE 256
5#define PCI_CFG_SPACE_EXP_SIZE 4096
6
343e51ae
JK		 7extern const unsigned char pcie_link_speed[];
8
1da177e4
LT		 9/* Functions internal to the PCI core code */
10
f39d5b72
BH		 11int pci_create_sysfs_dev_files(struct pci_dev *pdev);
12void pci_remove_sysfs_dev_files(struct pci_dev *pdev);
6058989b 13#if !defined(CONFIG_DMI) && !defined(CONFIG_ACPI)
911e1c9b 14static inline void pci_create_firmware_label_files(struct pci_dev *pdev)
b879743f 15{ return; }
911e1c9b 16static inline void pci_remove_firmware_label_files(struct pci_dev *pdev)
b879743f 17{ return; }
911e1c9b 18#else
f39d5b72
BH		 19void pci_create_firmware_label_files(struct pci_dev *pdev);
20void pci_remove_firmware_label_files(struct pci_dev *pdev);
911e1c9b 21#endif
f39d5b72 22void pci_cleanup_rom(struct pci_dev *dev);
9eff02e2 23#ifdef HAVE_PCI_MMAP
3b519e4e
MW		 24enum pci_mmap_api {
25 PCI_MMAP_SYSFS, /* mmap on /sys/bus/pci/devices/<BDF>/resource<N> */
26 PCI_MMAP_PROCFS /* mmap on /proc/bus/pci/<BDF> */
27};
f39d5b72
BH		 28int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vmai,
29 enum pci_mmap_api mmap_api);
9eff02e2 30#endif
711d5779 31int pci_probe_reset_function(struct pci_dev *dev);
ce5ccdef 32
961d9120 33/**
b33bfdef 34 * struct pci_platform_pm_ops - Firmware PM callbacks
961d9120 35 *
b33bfdef
RD		 36 * @is_manageable: returns 'true' if given device is power manageable by the
37 * platform firmware
961d9120 38 *
b33bfdef 39 * @set_state: invokes the platform firmware to set the device's power state
961d9120 40 *
b33bfdef
RD		 41 * @choose_state: returns PCI power state of given device preferred by the
42 * platform; to be used during system-wide transitions from a
43 * sleeping state to the working state and vice versa
961d9120 44 *
b33bfdef 45 * @sleep_wake: enables/disables the system wake up capability of given device
eb9d0fe4 46 *
b67ea761
RW		 47 * @run_wake: enables/disables the platform to generate run-time wake-up events
48 * for given device (the device's wake-up capability has to be
49 * enabled by @sleep_wake for this feature to work)
50 *
961d9120
RW		 51 * If given platform is generally capable of power managing PCI devices, all of
52 * these callbacks are mandatory.
53 */
54struct pci_platform_pm_ops {
55 bool (*is_manageable)(struct pci_dev *dev);
56 int (*set_state)(struct pci_dev *dev, pci_power_t state);
57 pci_power_t (*choose_state)(struct pci_dev *dev);
eb9d0fe4 58 int (*sleep_wake)(struct pci_dev *dev, bool enable);
b67ea761 59 int (*run_wake)(struct pci_dev *dev, bool enable);
961d9120
RW		 60};
61
f39d5b72
BH		 62int pci_set_platform_pm(struct pci_platform_pm_ops *ops);
63void pci_update_current_state(struct pci_dev *dev, pci_power_t state);
64void pci_power_up(struct pci_dev *dev);
65void pci_disable_enabled_device(struct pci_dev *dev);
66int pci_finish_runtime_suspend(struct pci_dev *dev);
67int __pci_pme_wakeup(struct pci_dev *dev, void *ign);
f39d5b72
BH		 68void pci_config_pm_runtime_get(struct pci_dev *dev);
69void pci_config_pm_runtime_put(struct pci_dev *dev);
70void pci_pm_init(struct pci_dev *dev);
71void pci_allocate_cap_save_buffers(struct pci_dev *dev);
f796841e 72void pci_free_cap_save_buffers(struct pci_dev *dev);
aa8c6c93 73
b6e335ae
RW		 74static inline void pci_wakeup_event(struct pci_dev *dev)
75{
76 /* Wait 100 ms before the system can be put into a sleep state. */
77 pm_wakeup_event(&dev->dev, 100);
78}
79
326c1cda 80static inline bool pci_has_subordinate(struct pci_dev *pci_dev)
aa8c6c93
RW		 81{
82 return !!(pci_dev->subordinate);
83}
0f64474b 84
94e61088 85struct pci_vpd_ops {
287d19ce
SH		 86 ssize_t (*read)(struct pci_dev *dev, loff_t pos, size_t count, void *buf);
87 ssize_t (*write)(struct pci_dev *dev, loff_t pos, size_t count, const void *buf);
94e61088
BH		 88 void (*release)(struct pci_dev *dev);
89};
90
91struct pci_vpd {
99cb233d 92 unsigned int len;
287d19ce 93 const struct pci_vpd_ops *ops;
94e61088
BH		 94 struct bin_attribute *attr; /* descriptor for sysfs VPD entry */
95};
96
f39d5b72 97int pci_vpd_pci22_init(struct pci_dev *dev);
94e61088
BH		 98static inline void pci_vpd_release(struct pci_dev *dev)
99{
100 if (dev->vpd)
101 dev->vpd->ops->release(dev);
102}
103
1da177e4
LT		 104/* PCI /proc functions */
105#ifdef CONFIG_PROC_FS
f39d5b72
BH		 106int pci_proc_attach_device(struct pci_dev *dev);
107int pci_proc_detach_device(struct pci_dev *dev);
108int pci_proc_detach_bus(struct pci_bus *bus);
1da177e4
LT		 109#else
110static inline int pci_proc_attach_device(struct pci_dev *dev) { return 0; }
111static inline int pci_proc_detach_device(struct pci_dev *dev) { return 0; }
1da177e4
LT		 112static inline int pci_proc_detach_bus(struct pci_bus *bus) { return 0; }
113#endif
114
115/* Functions for PCI Hotplug drivers to use */
a8e4b9c1 116int pci_hp_add_bridge(struct pci_dev *dev);
1da177e4 117
f19aeb1f 118#ifdef HAVE_PCI_LEGACY
f39d5b72
BH		 119void pci_create_legacy_files(struct pci_bus *bus);
120void pci_remove_legacy_files(struct pci_bus *bus);
f19aeb1f
BH		 121#else
122static inline void pci_create_legacy_files(struct pci_bus *bus) { return; }
123static inline void pci_remove_legacy_files(struct pci_bus *bus) { return; }
124#endif
1da177e4
LT		 125
126/* Lock for read/write access to pci device and bus lists */
d71374da 127extern struct rw_semaphore pci_bus_sem;
1da177e4 128
a2e27787
JK		 129extern raw_spinlock_t pci_lock;
130
ffadcc2f 131extern unsigned int pci_pm_d3_delay;
88187dfa 132
4b47b0ee 133#ifdef CONFIG_PCI_MSI
309e57df 134void pci_no_msi(void);
f39d5b72 135void pci_msi_init_pci_dev(struct pci_dev *dev);
4b47b0ee 136#else
309e57df 137static inline void pci_no_msi(void) { }
4aa9bc95 138static inline void pci_msi_init_pci_dev(struct pci_dev *dev) { }
4b47b0ee 139#endif
8fed4b65 140
b55438fd 141void pci_realloc_get_opt(char *);
f483d392 142
ffadcc2f
KCA		 143static inline int pci_no_d1d2(struct pci_dev *dev)
144{
145 unsigned int parent_dstates = 0;
4b47b0ee 146
ffadcc2f
KCA		 147 if (dev->bus->self)
148 parent_dstates = dev->bus->self->no_d1d2;
149 return (dev->no_d1d2 || parent_dstates);
150
151}
5136b2da 152extern const struct attribute_group *pci_dev_groups[];
56039e65 153extern const struct attribute_group *pcibus_groups[];
4e15c46b 154extern struct device_type pci_dev_type;
0f49ba55 155extern const struct attribute_group *pci_bus_groups[];
705b1aaa 156
1da177e4
LT		 157
158/**
159 * pci_match_one_device - Tell if a PCI device structure has a matching
160 * PCI device id structure
161 * @id: single PCI device id structure to match
162 * @dev: the PCI device structure to match against
367b09fe 163 *
1da177e4
LT		 164 * Returns the matching pci_device_id structure or %NULL if there is no match.
165 */
166static inline const struct pci_device_id *
167pci_match_one_device(const struct pci_device_id *id, const struct pci_dev *dev)
168{
169 if ((id->vendor == PCI_ANY_ID || id->vendor == dev->vendor) &&
170 (id->device == PCI_ANY_ID || id->device == dev->device) &&
171 (id->subvendor == PCI_ANY_ID || id->subvendor == dev->subsystem_vendor) &&
172 (id->subdevice == PCI_ANY_ID || id->subdevice == dev->subsystem_device) &&
173 !((id->class ^ dev->class) & id->class_mask))
174 return id;
175 return NULL;
176}
177
f46753c5
AC		 178/* PCI slot sysfs helper code */
179#define to_pci_slot(s) container_of(s, struct pci_slot, kobj)
180
181extern struct kset *pci_slots_kset;
182
183struct pci_slot_attribute {
184 struct attribute attr;
185 ssize_t (*show)(struct pci_slot *, char *);
186 ssize_t (*store)(struct pci_slot *, const char *, size_t);
187};
188#define to_pci_slot_attr(s) container_of(s, struct pci_slot_attribute, attr)
189
0b400c7e
YZ		 190enum pci_bar_type {
191 pci_bar_unknown, /* Standard PCI BAR probe */
192 pci_bar_io, /* An io port BAR */
193 pci_bar_mem32, /* A 32-bit memory BAR */
194 pci_bar_mem64, /* A 64-bit memory BAR */
195};
196
efdc87da
YL		 197bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *pl,
198 int crs_timeout);
f39d5b72
BH		 199int pci_setup_device(struct pci_dev *dev);
200int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
201 struct resource *res, unsigned int reg);
202int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type);
203void pci_configure_ari(struct pci_dev *dev);
10874f5a 204void __pci_bus_size_bridges(struct pci_bus *bus,
d66ecb72 205 struct list_head *realloc_head);
10874f5a
BH		 206void __pci_bus_assign_resources(const struct pci_bus *bus,
207 struct list_head *realloc_head,
208 struct list_head *fail_head);
939de1d6 209
58c3a727
YZ		 210/**
211 * pci_ari_enabled - query ARI forwarding status
6a49d812 212 * @bus: the PCI bus
58c3a727
YZ		 213 *
214 * Returns 1 if ARI forwarding is enabled, or 0 if not enabled;
215 */
6a49d812 216static inline int pci_ari_enabled(struct pci_bus *bus)
58c3a727 217{
6a49d812 218 return bus->self && bus->self->ari_enabled;
58c3a727
YZ		 219}
220
2069ecfb 221void pci_reassigndev_resource_alignment(struct pci_dev *dev);
f39d5b72 222void pci_disable_bridge_window(struct pci_dev *dev);
32a9a682 223
d1b054da
YZ		 224/* Single Root I/O Virtualization */
225struct pci_sriov {
226 int pos; /* capability position */
227 int nres; /* number of resources */
228 u32 cap; /* SR-IOV Capabilities */
229 u16 ctrl; /* SR-IOV Control */
6b136724
BH		 230 u16 total_VFs; /* total VFs associated with the PF */
231 u16 initial_VFs; /* initial VFs associated with the PF */
232 u16 num_VFs; /* number of VFs available */
d1b054da
YZ		 233 u16 offset; /* first VF Routing ID offset */
234 u16 stride; /* following VF stride */
235 u32 pgsz; /* page size for BAR alignment */
236 u8 link; /* Function Dependency Link */
6b136724 237 u16 driver_max_VFs; /* max num VFs driver supports */
d1b054da
YZ		 238 struct pci_dev *dev; /* lowest numbered PF */
239 struct pci_dev *self; /* this PF */
240 struct mutex lock; /* lock for VF bus */
241};
242
1900ca13 243#ifdef CONFIG_PCI_ATS
f39d5b72 244void pci_restore_ats_state(struct pci_dev *dev);
1900ca13
HX		 245#else
246static inline void pci_restore_ats_state(struct pci_dev *dev)
247{
248}
249#endif /* CONFIG_PCI_ATS */
250
d1b054da 251#ifdef CONFIG_PCI_IOV
f39d5b72
BH		 252int pci_iov_init(struct pci_dev *dev);
253void pci_iov_release(struct pci_dev *dev);
254int pci_iov_resource_bar(struct pci_dev *dev, int resno,
255 enum pci_bar_type *type);
256resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resno);
257void pci_restore_iov_state(struct pci_dev *dev);
258int pci_iov_bus_range(struct pci_bus *bus);
302b4215 259
d1b054da
YZ		 260#else
261static inline int pci_iov_init(struct pci_dev *dev)
262{
263 return -ENODEV;
264}
265static inline void pci_iov_release(struct pci_dev *dev)
266
267{
268}
269static inline int pci_iov_resource_bar(struct pci_dev *dev, int resno,
270 enum pci_bar_type *type)
271{
272 return 0;
273}
8c5cdb6a
YZ		 274static inline void pci_restore_iov_state(struct pci_dev *dev)
275{
276}
a28724b0
YZ		 277static inline int pci_iov_bus_range(struct pci_bus *bus)
278{
279 return 0;
280}
302b4215 281
d1b054da
YZ		 282#endif /* CONFIG_PCI_IOV */
283
f39d5b72 284unsigned long pci_cardbus_resource_alignment(struct resource *);
0a2daa1c 285
0e52247a 286static inline resource_size_t pci_resource_alignment(struct pci_dev *dev,
f39d5b72 287 struct resource *res)
6faf17f6
CW		 288{
289#ifdef CONFIG_PCI_IOV
290 int resno = res - dev->resource;
291
292 if (resno >= PCI_IOV_RESOURCES && resno <= PCI_IOV_RESOURCE_END)
293 return pci_sriov_resource_alignment(dev, resno);
294#endif
0a2daa1c
RP		 295 if (dev->class >> 8 == PCI_CLASS_BRIDGE_CARDBUS)
296 return pci_cardbus_resource_alignment(res);
6faf17f6
CW		 297 return resource_alignment(res);
298}
299
f39d5b72 300void pci_enable_acs(struct pci_dev *dev);
ae21ee65 301
b9c3b266
DC		 302struct pci_dev_reset_methods {
303 u16 vendor;
304 u16 device;
305 int (*reset)(struct pci_dev *dev, int probe);
306};
307
93177a74 308#ifdef CONFIG_PCI_QUIRKS
f39d5b72 309int pci_dev_specific_reset(struct pci_dev *dev, int probe);
93177a74
RW		 310#else
311static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe)
312{
313 return -ENOTTY;
314}
315#endif
b9c3b266 316
557848c3 317#endif /* DRIVERS_PCI_H */
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