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c7f48656 RW |
1 | /* |
2 | * PCIe Native PME support | |
3 | * | |
4 | * Copyright (C) 2007 - 2009 Intel Corp | |
5 | * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com> | |
6 | * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc. | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License V2. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/errno.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
c7f48656 RW |
18 | #include <linux/init.h> |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/pcieport_if.h> | |
22 | #include <linux/acpi.h> | |
23 | #include <linux/pci-acpi.h> | |
24 | #include <linux/pm_runtime.h> | |
25 | ||
271fb719 RW |
26 | #include "../pci.h" |
27 | #include "portdrv.h" | |
c7f48656 | 28 | |
c39fae14 RW |
29 | /* |
30 | * If this switch is set, MSI will not be used for PCIe PME signaling. This | |
31 | * causes the PCIe port driver to use INTx interrupts only, but it turns out | |
32 | * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based | |
33 | * wake-up from system sleep states. | |
34 | */ | |
35 | bool pcie_pme_msi_disabled; | |
36 | ||
c7f48656 RW |
37 | static int __init pcie_pme_setup(char *str) |
38 | { | |
28eb5f27 RW |
39 | if (!strncmp(str, "nomsi", 5)) |
40 | pcie_pme_msi_disabled = true; | |
b27759f8 | 41 | |
c7f48656 RW |
42 | return 1; |
43 | } | |
44 | __setup("pcie_pme=", pcie_pme_setup); | |
45 | ||
c7f48656 RW |
46 | struct pcie_pme_service_data { |
47 | spinlock_t lock; | |
48 | struct pcie_device *srv; | |
49 | struct work_struct work; | |
50 | bool noirq; /* Don't enable the PME interrupt used by this service. */ | |
51 | }; | |
52 | ||
53 | /** | |
54 | * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation. | |
55 | * @dev: PCIe root port or event collector. | |
56 | * @enable: Enable or disable the interrupt. | |
57 | */ | |
28eb5f27 | 58 | void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) |
c7f48656 RW |
59 | { |
60 | int rtctl_pos; | |
61 | u16 rtctl; | |
62 | ||
b16694f7 | 63 | rtctl_pos = pci_pcie_cap(dev) + PCI_EXP_RTCTL; |
c7f48656 RW |
64 | |
65 | pci_read_config_word(dev, rtctl_pos, &rtctl); | |
66 | if (enable) | |
67 | rtctl |= PCI_EXP_RTCTL_PMEIE; | |
68 | else | |
69 | rtctl &= ~PCI_EXP_RTCTL_PMEIE; | |
70 | pci_write_config_word(dev, rtctl_pos, rtctl); | |
71 | } | |
72 | ||
c7f48656 RW |
73 | /** |
74 | * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#. | |
75 | * @bus: PCI bus to scan. | |
76 | * | |
77 | * Scan given PCI bus and all buses under it for devices asserting PME#. | |
78 | */ | |
79 | static bool pcie_pme_walk_bus(struct pci_bus *bus) | |
80 | { | |
81 | struct pci_dev *dev; | |
82 | bool ret = false; | |
83 | ||
84 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
85 | /* Skip PCIe devices in case we started from a root port. */ | |
552be54c | 86 | if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) { |
c125e96f | 87 | pci_wakeup_event(dev); |
0f953bf6 | 88 | pm_request_resume(&dev->dev); |
c7f48656 RW |
89 | ret = true; |
90 | } | |
91 | ||
92 | if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate)) | |
93 | ret = true; | |
94 | } | |
95 | ||
96 | return ret; | |
97 | } | |
98 | ||
99 | /** | |
100 | * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME. | |
101 | * @bus: Secondary bus of the bridge. | |
102 | * @devfn: Device/function number to check. | |
103 | * | |
104 | * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band | |
105 | * PCIe PME message. In such that case the bridge should use the Requester ID | |
106 | * of device/function number 0 on its secondary bus. | |
107 | */ | |
108 | static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn) | |
109 | { | |
110 | struct pci_dev *dev; | |
111 | bool found = false; | |
112 | ||
113 | if (devfn) | |
114 | return false; | |
115 | ||
116 | dev = pci_dev_get(bus->self); | |
117 | if (!dev) | |
118 | return false; | |
119 | ||
552be54c | 120 | if (pci_is_pcie(dev) && dev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) { |
c7f48656 RW |
121 | down_read(&pci_bus_sem); |
122 | if (pcie_pme_walk_bus(bus)) | |
123 | found = true; | |
124 | up_read(&pci_bus_sem); | |
125 | } | |
126 | ||
127 | pci_dev_put(dev); | |
128 | return found; | |
129 | } | |
130 | ||
131 | /** | |
132 | * pcie_pme_handle_request - Find device that generated PME and handle it. | |
133 | * @port: Root port or event collector that generated the PME interrupt. | |
134 | * @req_id: PCIe Requester ID of the device that generated the PME. | |
135 | */ | |
136 | static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id) | |
137 | { | |
138 | u8 busnr = req_id >> 8, devfn = req_id & 0xff; | |
139 | struct pci_bus *bus; | |
140 | struct pci_dev *dev; | |
141 | bool found = false; | |
142 | ||
143 | /* First, check if the PME is from the root port itself. */ | |
144 | if (port->devfn == devfn && port->bus->number == busnr) { | |
145 | if (pci_check_pme_status(port)) { | |
146 | pm_request_resume(&port->dev); | |
147 | found = true; | |
148 | } else { | |
149 | /* | |
150 | * Apparently, the root port generated the PME on behalf | |
151 | * of a non-PCIe device downstream. If this is done by | |
152 | * a root port, the Requester ID field in its status | |
153 | * register may contain either the root port's, or the | |
154 | * source device's information (PCI Express Base | |
155 | * Specification, Rev. 2.0, Section 6.1.9). | |
156 | */ | |
157 | down_read(&pci_bus_sem); | |
158 | found = pcie_pme_walk_bus(port->subordinate); | |
159 | up_read(&pci_bus_sem); | |
160 | } | |
161 | goto out; | |
162 | } | |
163 | ||
164 | /* Second, find the bus the source device is on. */ | |
165 | bus = pci_find_bus(pci_domain_nr(port->bus), busnr); | |
166 | if (!bus) | |
167 | goto out; | |
168 | ||
169 | /* Next, check if the PME is from a PCIe-PCI bridge. */ | |
170 | found = pcie_pme_from_pci_bridge(bus, devfn); | |
171 | if (found) | |
172 | goto out; | |
173 | ||
174 | /* Finally, try to find the PME source on the bus. */ | |
175 | down_read(&pci_bus_sem); | |
176 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
177 | pci_dev_get(dev); | |
178 | if (dev->devfn == devfn) { | |
179 | found = true; | |
180 | break; | |
181 | } | |
182 | pci_dev_put(dev); | |
183 | } | |
184 | up_read(&pci_bus_sem); | |
185 | ||
186 | if (found) { | |
187 | /* The device is there, but we have to check its PME status. */ | |
188 | found = pci_check_pme_status(dev); | |
c125e96f | 189 | if (found) { |
c125e96f | 190 | pci_wakeup_event(dev); |
0f953bf6 | 191 | pm_request_resume(&dev->dev); |
c125e96f | 192 | } |
c7f48656 RW |
193 | pci_dev_put(dev); |
194 | } else if (devfn) { | |
195 | /* | |
196 | * The device is not there, but we can still try to recover by | |
197 | * assuming that the PME was reported by a PCIe-PCI bridge that | |
198 | * used devfn different from zero. | |
199 | */ | |
200 | dev_dbg(&port->dev, "PME interrupt generated for " | |
201 | "non-existent device %02x:%02x.%d\n", | |
202 | busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); | |
203 | found = pcie_pme_from_pci_bridge(bus, 0); | |
204 | } | |
205 | ||
206 | out: | |
207 | if (!found) | |
208 | dev_dbg(&port->dev, "Spurious native PME interrupt!\n"); | |
209 | } | |
210 | ||
211 | /** | |
212 | * pcie_pme_work_fn - Work handler for PCIe PME interrupt. | |
213 | * @work: Work structure giving access to service data. | |
214 | */ | |
215 | static void pcie_pme_work_fn(struct work_struct *work) | |
216 | { | |
217 | struct pcie_pme_service_data *data = | |
218 | container_of(work, struct pcie_pme_service_data, work); | |
219 | struct pci_dev *port = data->srv->port; | |
220 | int rtsta_pos; | |
221 | u32 rtsta; | |
222 | ||
b16694f7 | 223 | rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA; |
c7f48656 RW |
224 | |
225 | spin_lock_irq(&data->lock); | |
226 | ||
227 | for (;;) { | |
228 | if (data->noirq) | |
229 | break; | |
230 | ||
231 | pci_read_config_dword(port, rtsta_pos, &rtsta); | |
232 | if (rtsta & PCI_EXP_RTSTA_PME) { | |
233 | /* | |
234 | * Clear PME status of the port. If there are other | |
235 | * pending PMEs, the status will be set again. | |
236 | */ | |
fe31e697 | 237 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
238 | |
239 | spin_unlock_irq(&data->lock); | |
240 | pcie_pme_handle_request(port, rtsta & 0xffff); | |
241 | spin_lock_irq(&data->lock); | |
242 | ||
243 | continue; | |
244 | } | |
245 | ||
246 | /* No need to loop if there are no more PMEs pending. */ | |
247 | if (!(rtsta & PCI_EXP_RTSTA_PENDING)) | |
248 | break; | |
249 | ||
250 | spin_unlock_irq(&data->lock); | |
251 | cpu_relax(); | |
252 | spin_lock_irq(&data->lock); | |
253 | } | |
254 | ||
255 | if (!data->noirq) | |
256 | pcie_pme_interrupt_enable(port, true); | |
257 | ||
258 | spin_unlock_irq(&data->lock); | |
259 | } | |
260 | ||
261 | /** | |
262 | * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt. | |
263 | * @irq: Interrupt vector. | |
264 | * @context: Interrupt context pointer. | |
265 | */ | |
266 | static irqreturn_t pcie_pme_irq(int irq, void *context) | |
267 | { | |
268 | struct pci_dev *port; | |
269 | struct pcie_pme_service_data *data; | |
270 | int rtsta_pos; | |
271 | u32 rtsta; | |
272 | unsigned long flags; | |
273 | ||
274 | port = ((struct pcie_device *)context)->port; | |
275 | data = get_service_data((struct pcie_device *)context); | |
276 | ||
b16694f7 | 277 | rtsta_pos = pci_pcie_cap(port) + PCI_EXP_RTSTA; |
c7f48656 RW |
278 | |
279 | spin_lock_irqsave(&data->lock, flags); | |
280 | pci_read_config_dword(port, rtsta_pos, &rtsta); | |
281 | ||
282 | if (!(rtsta & PCI_EXP_RTSTA_PME)) { | |
283 | spin_unlock_irqrestore(&data->lock, flags); | |
284 | return IRQ_NONE; | |
285 | } | |
286 | ||
287 | pcie_pme_interrupt_enable(port, false); | |
288 | spin_unlock_irqrestore(&data->lock, flags); | |
289 | ||
290 | /* We don't use pm_wq, because it's freezable. */ | |
291 | schedule_work(&data->work); | |
292 | ||
293 | return IRQ_HANDLED; | |
294 | } | |
295 | ||
296 | /** | |
297 | * pcie_pme_set_native - Set the PME interrupt flag for given device. | |
298 | * @dev: PCI device to handle. | |
299 | * @ign: Ignored. | |
300 | */ | |
301 | static int pcie_pme_set_native(struct pci_dev *dev, void *ign) | |
302 | { | |
303 | dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n"); | |
304 | ||
305 | device_set_run_wake(&dev->dev, true); | |
306 | dev->pme_interrupt = true; | |
307 | return 0; | |
308 | } | |
309 | ||
310 | /** | |
311 | * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port. | |
312 | * @port: PCIe root port or event collector to handle. | |
313 | * | |
314 | * For each device below given root port, including the port itself (or for each | |
315 | * root complex integrated endpoint if @port is a root complex event collector) | |
316 | * set the flag indicating that it can signal run-time wake-up events via PCIe | |
317 | * PME interrupts. | |
318 | */ | |
319 | static void pcie_pme_mark_devices(struct pci_dev *port) | |
320 | { | |
321 | pcie_pme_set_native(port, NULL); | |
322 | if (port->subordinate) { | |
323 | pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL); | |
324 | } else { | |
325 | struct pci_bus *bus = port->bus; | |
326 | struct pci_dev *dev; | |
327 | ||
328 | /* Check if this is a root port event collector. */ | |
329 | if (port->pcie_type != PCI_EXP_TYPE_RC_EC || !bus) | |
330 | return; | |
331 | ||
332 | down_read(&pci_bus_sem); | |
333 | list_for_each_entry(dev, &bus->devices, bus_list) | |
552be54c | 334 | if (pci_is_pcie(dev) |
c7f48656 RW |
335 | && dev->pcie_type == PCI_EXP_TYPE_RC_END) |
336 | pcie_pme_set_native(dev, NULL); | |
337 | up_read(&pci_bus_sem); | |
338 | } | |
339 | } | |
340 | ||
341 | /** | |
342 | * pcie_pme_probe - Initialize PCIe PME service for given root port. | |
343 | * @srv: PCIe service to initialize. | |
344 | */ | |
345 | static int pcie_pme_probe(struct pcie_device *srv) | |
346 | { | |
347 | struct pci_dev *port; | |
348 | struct pcie_pme_service_data *data; | |
349 | int ret; | |
350 | ||
c7f48656 RW |
351 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
352 | if (!data) | |
353 | return -ENOMEM; | |
354 | ||
355 | spin_lock_init(&data->lock); | |
356 | INIT_WORK(&data->work, pcie_pme_work_fn); | |
357 | data->srv = srv; | |
358 | set_service_data(srv, data); | |
359 | ||
360 | port = srv->port; | |
361 | pcie_pme_interrupt_enable(port, false); | |
fe31e697 | 362 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
363 | |
364 | ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv); | |
365 | if (ret) { | |
366 | kfree(data); | |
367 | } else { | |
368 | pcie_pme_mark_devices(port); | |
369 | pcie_pme_interrupt_enable(port, true); | |
370 | } | |
371 | ||
372 | return ret; | |
373 | } | |
374 | ||
375 | /** | |
376 | * pcie_pme_suspend - Suspend PCIe PME service device. | |
377 | * @srv: PCIe service device to suspend. | |
378 | */ | |
379 | static int pcie_pme_suspend(struct pcie_device *srv) | |
380 | { | |
381 | struct pcie_pme_service_data *data = get_service_data(srv); | |
382 | struct pci_dev *port = srv->port; | |
383 | ||
384 | spin_lock_irq(&data->lock); | |
385 | pcie_pme_interrupt_enable(port, false); | |
fe31e697 | 386 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
387 | data->noirq = true; |
388 | spin_unlock_irq(&data->lock); | |
389 | ||
390 | synchronize_irq(srv->irq); | |
391 | ||
392 | return 0; | |
393 | } | |
394 | ||
395 | /** | |
396 | * pcie_pme_resume - Resume PCIe PME service device. | |
397 | * @srv - PCIe service device to resume. | |
398 | */ | |
399 | static int pcie_pme_resume(struct pcie_device *srv) | |
400 | { | |
401 | struct pcie_pme_service_data *data = get_service_data(srv); | |
402 | struct pci_dev *port = srv->port; | |
403 | ||
404 | spin_lock_irq(&data->lock); | |
405 | data->noirq = false; | |
fe31e697 | 406 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
407 | pcie_pme_interrupt_enable(port, true); |
408 | spin_unlock_irq(&data->lock); | |
409 | ||
410 | return 0; | |
411 | } | |
412 | ||
413 | /** | |
414 | * pcie_pme_remove - Prepare PCIe PME service device for removal. | |
415 | * @srv - PCIe service device to resume. | |
416 | */ | |
417 | static void pcie_pme_remove(struct pcie_device *srv) | |
418 | { | |
419 | pcie_pme_suspend(srv); | |
420 | free_irq(srv->irq, srv); | |
421 | kfree(get_service_data(srv)); | |
422 | } | |
423 | ||
424 | static struct pcie_port_service_driver pcie_pme_driver = { | |
425 | .name = "pcie_pme", | |
426 | .port_type = PCI_EXP_TYPE_ROOT_PORT, | |
427 | .service = PCIE_PORT_SERVICE_PME, | |
428 | ||
429 | .probe = pcie_pme_probe, | |
430 | .suspend = pcie_pme_suspend, | |
431 | .resume = pcie_pme_resume, | |
432 | .remove = pcie_pme_remove, | |
433 | }; | |
434 | ||
435 | /** | |
436 | * pcie_pme_service_init - Register the PCIe PME service driver. | |
437 | */ | |
438 | static int __init pcie_pme_service_init(void) | |
439 | { | |
28eb5f27 | 440 | return pcie_port_service_register(&pcie_pme_driver); |
c7f48656 RW |
441 | } |
442 | ||
443 | module_init(pcie_pme_service_init); |