Commit | Line | Data |
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c7f48656 RW |
1 | /* |
2 | * PCIe Native PME support | |
3 | * | |
4 | * Copyright (C) 2007 - 2009 Intel Corp | |
5 | * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com> | |
6 | * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc. | |
7 | * | |
8 | * This file is subject to the terms and conditions of the GNU General Public | |
9 | * License V2. See the file "COPYING" in the main directory of this archive | |
10 | * for more details. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/pci.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/errno.h> | |
5a0e3ad6 | 17 | #include <linux/slab.h> |
c7f48656 RW |
18 | #include <linux/init.h> |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/pcieport_if.h> | |
22 | #include <linux/acpi.h> | |
23 | #include <linux/pci-acpi.h> | |
24 | #include <linux/pm_runtime.h> | |
25 | ||
271fb719 RW |
26 | #include "../pci.h" |
27 | #include "portdrv.h" | |
c7f48656 | 28 | |
c39fae14 RW |
29 | /* |
30 | * If this switch is set, MSI will not be used for PCIe PME signaling. This | |
31 | * causes the PCIe port driver to use INTx interrupts only, but it turns out | |
32 | * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based | |
33 | * wake-up from system sleep states. | |
34 | */ | |
35 | bool pcie_pme_msi_disabled; | |
36 | ||
c7f48656 RW |
37 | static int __init pcie_pme_setup(char *str) |
38 | { | |
28eb5f27 RW |
39 | if (!strncmp(str, "nomsi", 5)) |
40 | pcie_pme_msi_disabled = true; | |
b27759f8 | 41 | |
c7f48656 RW |
42 | return 1; |
43 | } | |
44 | __setup("pcie_pme=", pcie_pme_setup); | |
45 | ||
c7f48656 RW |
46 | struct pcie_pme_service_data { |
47 | spinlock_t lock; | |
48 | struct pcie_device *srv; | |
49 | struct work_struct work; | |
50 | bool noirq; /* Don't enable the PME interrupt used by this service. */ | |
51 | }; | |
52 | ||
53 | /** | |
54 | * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation. | |
55 | * @dev: PCIe root port or event collector. | |
56 | * @enable: Enable or disable the interrupt. | |
57 | */ | |
28eb5f27 | 58 | void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable) |
c7f48656 | 59 | { |
c7f48656 | 60 | if (enable) |
263e54b9 JL |
61 | pcie_capability_set_word(dev, PCI_EXP_RTCTL, |
62 | PCI_EXP_RTCTL_PMEIE); | |
c7f48656 | 63 | else |
263e54b9 JL |
64 | pcie_capability_clear_word(dev, PCI_EXP_RTCTL, |
65 | PCI_EXP_RTCTL_PMEIE); | |
c7f48656 RW |
66 | } |
67 | ||
c7f48656 RW |
68 | /** |
69 | * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#. | |
70 | * @bus: PCI bus to scan. | |
71 | * | |
72 | * Scan given PCI bus and all buses under it for devices asserting PME#. | |
73 | */ | |
74 | static bool pcie_pme_walk_bus(struct pci_bus *bus) | |
75 | { | |
76 | struct pci_dev *dev; | |
77 | bool ret = false; | |
78 | ||
79 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
80 | /* Skip PCIe devices in case we started from a root port. */ | |
552be54c | 81 | if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) { |
379021d5 RW |
82 | if (dev->pme_poll) |
83 | dev->pme_poll = false; | |
84 | ||
c125e96f | 85 | pci_wakeup_event(dev); |
0f953bf6 | 86 | pm_request_resume(&dev->dev); |
c7f48656 RW |
87 | ret = true; |
88 | } | |
89 | ||
90 | if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate)) | |
91 | ret = true; | |
92 | } | |
93 | ||
94 | return ret; | |
95 | } | |
96 | ||
97 | /** | |
98 | * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME. | |
99 | * @bus: Secondary bus of the bridge. | |
100 | * @devfn: Device/function number to check. | |
101 | * | |
102 | * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band | |
103 | * PCIe PME message. In such that case the bridge should use the Requester ID | |
104 | * of device/function number 0 on its secondary bus. | |
105 | */ | |
106 | static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn) | |
107 | { | |
108 | struct pci_dev *dev; | |
109 | bool found = false; | |
110 | ||
111 | if (devfn) | |
112 | return false; | |
113 | ||
114 | dev = pci_dev_get(bus->self); | |
115 | if (!dev) | |
116 | return false; | |
117 | ||
62f87c0e | 118 | if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) { |
c7f48656 RW |
119 | down_read(&pci_bus_sem); |
120 | if (pcie_pme_walk_bus(bus)) | |
121 | found = true; | |
122 | up_read(&pci_bus_sem); | |
123 | } | |
124 | ||
125 | pci_dev_put(dev); | |
126 | return found; | |
127 | } | |
128 | ||
129 | /** | |
130 | * pcie_pme_handle_request - Find device that generated PME and handle it. | |
131 | * @port: Root port or event collector that generated the PME interrupt. | |
132 | * @req_id: PCIe Requester ID of the device that generated the PME. | |
133 | */ | |
134 | static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id) | |
135 | { | |
136 | u8 busnr = req_id >> 8, devfn = req_id & 0xff; | |
137 | struct pci_bus *bus; | |
138 | struct pci_dev *dev; | |
139 | bool found = false; | |
140 | ||
141 | /* First, check if the PME is from the root port itself. */ | |
142 | if (port->devfn == devfn && port->bus->number == busnr) { | |
379021d5 RW |
143 | if (port->pme_poll) |
144 | port->pme_poll = false; | |
145 | ||
c7f48656 RW |
146 | if (pci_check_pme_status(port)) { |
147 | pm_request_resume(&port->dev); | |
148 | found = true; | |
149 | } else { | |
150 | /* | |
151 | * Apparently, the root port generated the PME on behalf | |
152 | * of a non-PCIe device downstream. If this is done by | |
153 | * a root port, the Requester ID field in its status | |
154 | * register may contain either the root port's, or the | |
155 | * source device's information (PCI Express Base | |
156 | * Specification, Rev. 2.0, Section 6.1.9). | |
157 | */ | |
158 | down_read(&pci_bus_sem); | |
159 | found = pcie_pme_walk_bus(port->subordinate); | |
160 | up_read(&pci_bus_sem); | |
161 | } | |
162 | goto out; | |
163 | } | |
164 | ||
165 | /* Second, find the bus the source device is on. */ | |
166 | bus = pci_find_bus(pci_domain_nr(port->bus), busnr); | |
167 | if (!bus) | |
168 | goto out; | |
169 | ||
170 | /* Next, check if the PME is from a PCIe-PCI bridge. */ | |
171 | found = pcie_pme_from_pci_bridge(bus, devfn); | |
172 | if (found) | |
173 | goto out; | |
174 | ||
175 | /* Finally, try to find the PME source on the bus. */ | |
176 | down_read(&pci_bus_sem); | |
177 | list_for_each_entry(dev, &bus->devices, bus_list) { | |
178 | pci_dev_get(dev); | |
179 | if (dev->devfn == devfn) { | |
180 | found = true; | |
181 | break; | |
182 | } | |
183 | pci_dev_put(dev); | |
184 | } | |
185 | up_read(&pci_bus_sem); | |
186 | ||
187 | if (found) { | |
188 | /* The device is there, but we have to check its PME status. */ | |
189 | found = pci_check_pme_status(dev); | |
c125e96f | 190 | if (found) { |
379021d5 RW |
191 | if (dev->pme_poll) |
192 | dev->pme_poll = false; | |
193 | ||
c125e96f | 194 | pci_wakeup_event(dev); |
0f953bf6 | 195 | pm_request_resume(&dev->dev); |
c125e96f | 196 | } |
c7f48656 RW |
197 | pci_dev_put(dev); |
198 | } else if (devfn) { | |
199 | /* | |
200 | * The device is not there, but we can still try to recover by | |
201 | * assuming that the PME was reported by a PCIe-PCI bridge that | |
202 | * used devfn different from zero. | |
203 | */ | |
204 | dev_dbg(&port->dev, "PME interrupt generated for " | |
205 | "non-existent device %02x:%02x.%d\n", | |
206 | busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); | |
207 | found = pcie_pme_from_pci_bridge(bus, 0); | |
208 | } | |
209 | ||
210 | out: | |
211 | if (!found) | |
212 | dev_dbg(&port->dev, "Spurious native PME interrupt!\n"); | |
213 | } | |
214 | ||
215 | /** | |
216 | * pcie_pme_work_fn - Work handler for PCIe PME interrupt. | |
217 | * @work: Work structure giving access to service data. | |
218 | */ | |
219 | static void pcie_pme_work_fn(struct work_struct *work) | |
220 | { | |
221 | struct pcie_pme_service_data *data = | |
222 | container_of(work, struct pcie_pme_service_data, work); | |
223 | struct pci_dev *port = data->srv->port; | |
c7f48656 RW |
224 | u32 rtsta; |
225 | ||
c7f48656 RW |
226 | spin_lock_irq(&data->lock); |
227 | ||
228 | for (;;) { | |
229 | if (data->noirq) | |
230 | break; | |
231 | ||
263e54b9 | 232 | pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta); |
c7f48656 RW |
233 | if (rtsta & PCI_EXP_RTSTA_PME) { |
234 | /* | |
235 | * Clear PME status of the port. If there are other | |
236 | * pending PMEs, the status will be set again. | |
237 | */ | |
fe31e697 | 238 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
239 | |
240 | spin_unlock_irq(&data->lock); | |
241 | pcie_pme_handle_request(port, rtsta & 0xffff); | |
242 | spin_lock_irq(&data->lock); | |
243 | ||
244 | continue; | |
245 | } | |
246 | ||
247 | /* No need to loop if there are no more PMEs pending. */ | |
248 | if (!(rtsta & PCI_EXP_RTSTA_PENDING)) | |
249 | break; | |
250 | ||
251 | spin_unlock_irq(&data->lock); | |
252 | cpu_relax(); | |
253 | spin_lock_irq(&data->lock); | |
254 | } | |
255 | ||
256 | if (!data->noirq) | |
257 | pcie_pme_interrupt_enable(port, true); | |
258 | ||
259 | spin_unlock_irq(&data->lock); | |
260 | } | |
261 | ||
262 | /** | |
263 | * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt. | |
264 | * @irq: Interrupt vector. | |
265 | * @context: Interrupt context pointer. | |
266 | */ | |
267 | static irqreturn_t pcie_pme_irq(int irq, void *context) | |
268 | { | |
269 | struct pci_dev *port; | |
270 | struct pcie_pme_service_data *data; | |
c7f48656 RW |
271 | u32 rtsta; |
272 | unsigned long flags; | |
273 | ||
274 | port = ((struct pcie_device *)context)->port; | |
275 | data = get_service_data((struct pcie_device *)context); | |
276 | ||
c7f48656 | 277 | spin_lock_irqsave(&data->lock, flags); |
263e54b9 | 278 | pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta); |
c7f48656 RW |
279 | |
280 | if (!(rtsta & PCI_EXP_RTSTA_PME)) { | |
281 | spin_unlock_irqrestore(&data->lock, flags); | |
282 | return IRQ_NONE; | |
283 | } | |
284 | ||
285 | pcie_pme_interrupt_enable(port, false); | |
286 | spin_unlock_irqrestore(&data->lock, flags); | |
287 | ||
288 | /* We don't use pm_wq, because it's freezable. */ | |
289 | schedule_work(&data->work); | |
290 | ||
291 | return IRQ_HANDLED; | |
292 | } | |
293 | ||
294 | /** | |
295 | * pcie_pme_set_native - Set the PME interrupt flag for given device. | |
296 | * @dev: PCI device to handle. | |
297 | * @ign: Ignored. | |
298 | */ | |
299 | static int pcie_pme_set_native(struct pci_dev *dev, void *ign) | |
300 | { | |
301 | dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n"); | |
302 | ||
303 | device_set_run_wake(&dev->dev, true); | |
304 | dev->pme_interrupt = true; | |
305 | return 0; | |
306 | } | |
307 | ||
308 | /** | |
309 | * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port. | |
310 | * @port: PCIe root port or event collector to handle. | |
311 | * | |
312 | * For each device below given root port, including the port itself (or for each | |
313 | * root complex integrated endpoint if @port is a root complex event collector) | |
314 | * set the flag indicating that it can signal run-time wake-up events via PCIe | |
315 | * PME interrupts. | |
316 | */ | |
317 | static void pcie_pme_mark_devices(struct pci_dev *port) | |
318 | { | |
319 | pcie_pme_set_native(port, NULL); | |
320 | if (port->subordinate) { | |
321 | pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL); | |
322 | } else { | |
323 | struct pci_bus *bus = port->bus; | |
324 | struct pci_dev *dev; | |
325 | ||
326 | /* Check if this is a root port event collector. */ | |
62f87c0e | 327 | if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus) |
c7f48656 RW |
328 | return; |
329 | ||
330 | down_read(&pci_bus_sem); | |
331 | list_for_each_entry(dev, &bus->devices, bus_list) | |
552be54c | 332 | if (pci_is_pcie(dev) |
62f87c0e | 333 | && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) |
c7f48656 RW |
334 | pcie_pme_set_native(dev, NULL); |
335 | up_read(&pci_bus_sem); | |
336 | } | |
337 | } | |
338 | ||
339 | /** | |
340 | * pcie_pme_probe - Initialize PCIe PME service for given root port. | |
341 | * @srv: PCIe service to initialize. | |
342 | */ | |
343 | static int pcie_pme_probe(struct pcie_device *srv) | |
344 | { | |
345 | struct pci_dev *port; | |
346 | struct pcie_pme_service_data *data; | |
347 | int ret; | |
348 | ||
c7f48656 RW |
349 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
350 | if (!data) | |
351 | return -ENOMEM; | |
352 | ||
353 | spin_lock_init(&data->lock); | |
354 | INIT_WORK(&data->work, pcie_pme_work_fn); | |
355 | data->srv = srv; | |
356 | set_service_data(srv, data); | |
357 | ||
358 | port = srv->port; | |
359 | pcie_pme_interrupt_enable(port, false); | |
fe31e697 | 360 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
361 | |
362 | ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv); | |
363 | if (ret) { | |
364 | kfree(data); | |
365 | } else { | |
366 | pcie_pme_mark_devices(port); | |
367 | pcie_pme_interrupt_enable(port, true); | |
368 | } | |
369 | ||
370 | return ret; | |
371 | } | |
372 | ||
373 | /** | |
374 | * pcie_pme_suspend - Suspend PCIe PME service device. | |
375 | * @srv: PCIe service device to suspend. | |
376 | */ | |
377 | static int pcie_pme_suspend(struct pcie_device *srv) | |
378 | { | |
379 | struct pcie_pme_service_data *data = get_service_data(srv); | |
380 | struct pci_dev *port = srv->port; | |
381 | ||
382 | spin_lock_irq(&data->lock); | |
383 | pcie_pme_interrupt_enable(port, false); | |
fe31e697 | 384 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
385 | data->noirq = true; |
386 | spin_unlock_irq(&data->lock); | |
387 | ||
388 | synchronize_irq(srv->irq); | |
389 | ||
390 | return 0; | |
391 | } | |
392 | ||
393 | /** | |
394 | * pcie_pme_resume - Resume PCIe PME service device. | |
395 | * @srv - PCIe service device to resume. | |
396 | */ | |
397 | static int pcie_pme_resume(struct pcie_device *srv) | |
398 | { | |
399 | struct pcie_pme_service_data *data = get_service_data(srv); | |
400 | struct pci_dev *port = srv->port; | |
401 | ||
402 | spin_lock_irq(&data->lock); | |
403 | data->noirq = false; | |
fe31e697 | 404 | pcie_clear_root_pme_status(port); |
c7f48656 RW |
405 | pcie_pme_interrupt_enable(port, true); |
406 | spin_unlock_irq(&data->lock); | |
407 | ||
408 | return 0; | |
409 | } | |
410 | ||
411 | /** | |
412 | * pcie_pme_remove - Prepare PCIe PME service device for removal. | |
413 | * @srv - PCIe service device to resume. | |
414 | */ | |
415 | static void pcie_pme_remove(struct pcie_device *srv) | |
416 | { | |
417 | pcie_pme_suspend(srv); | |
418 | free_irq(srv->irq, srv); | |
419 | kfree(get_service_data(srv)); | |
420 | } | |
421 | ||
422 | static struct pcie_port_service_driver pcie_pme_driver = { | |
423 | .name = "pcie_pme", | |
424 | .port_type = PCI_EXP_TYPE_ROOT_PORT, | |
425 | .service = PCIE_PORT_SERVICE_PME, | |
426 | ||
427 | .probe = pcie_pme_probe, | |
428 | .suspend = pcie_pme_suspend, | |
429 | .resume = pcie_pme_resume, | |
430 | .remove = pcie_pme_remove, | |
431 | }; | |
432 | ||
433 | /** | |
434 | * pcie_pme_service_init - Register the PCIe PME service driver. | |
435 | */ | |
436 | static int __init pcie_pme_service_init(void) | |
437 | { | |
28eb5f27 | 438 | return pcie_port_service_register(&pcie_pme_driver); |
c7f48656 RW |
439 | } |
440 | ||
441 | module_init(pcie_pme_service_init); |