[deliverable/linux.git] / drivers / pci / pcie / portdrv_core.c

/*
 * File:	portdrv_core.c
 * Purpose:	PCI Express Port Bus Driver's Core Functions
 *
 * Copyright (C) 2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pm.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/pcieport_if.h>
#include <linux/aer.h>

#include "../pci.h"
#include "portdrv.h"

bool pciehp_msi_disabled;

static int __init pciehp_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pciehp_msi_disabled = true;

	return 1;
}
__setup("pcie_hp=", pciehp_setup);

/**
 * release_pcie_device - free PCI Express port service device structure
 * @dev: Port service device to release
 *
 * Invoked automatically when device is being removed in response to
 * device_unregister(dev).  Release all resources being claimed.
 */
static void release_pcie_device(struct device *dev)
{
	kfree(to_pcie_device(dev));
}

/**
 * pcie_port_msix_add_entry - add entry to given array of MSI-X entries
 * @entries: Array of MSI-X entries
 * @new_entry: Index of the entry to add to the array
 * @nr_entries: Number of entries aleady in the array
 *
 * Return value: Position of the added entry in the array
 */
static int pcie_port_msix_add_entry(
	struct msix_entry *entries, int new_entry, int nr_entries)
{
	int j;

	for (j = 0; j < nr_entries; j++)
		if (entries[j].entry == new_entry)
			return j;

	entries[j].entry = new_entry;
	return j;
}

/**
 * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
 * @dev: PCI Express port to handle
 * @vectors: Array of interrupt vectors to populate
 * @mask: Bitmask of port capabilities returned by get_port_device_capability()
 *
 * Return value: 0 on success, error code on failure
 */
static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
{
	struct msix_entry *msix_entries;
	int idx[PCIE_PORT_DEVICE_MAXSERVICES];
	int nr_entries, status, pos, i, nvec;
	u16 reg16;
	u32 reg32;

	nr_entries = pci_msix_table_size(dev);
	if (!nr_entries)
		return -EINVAL;
	if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
		nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;

	msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
	if (!msix_entries)
		return -ENOMEM;

	/*
	 * Allocate as many entries as the port wants, so that we can check
	 * which of them will be useful.  Moreover, if nr_entries is correctly
	 * equal to the number of entries this port actually uses, we'll happily
	 * go through without any tricks.
	 */
	for (i = 0; i < nr_entries; i++)
		msix_entries[i].entry = i;

	status = pci_enable_msix(dev, msix_entries, nr_entries);
	if (status)
		goto Exit;

	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		idx[i] = -1;
	status = -EIO;
	nvec = 0;

	if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) {
		int entry;

		/*
		 * The code below follows the PCI Express Base Specification 2.0
		 * stating in Section 6.1.6 that "PME and Hot-Plug Event
		 * interrupts (when both are implemented) always share the same
		 * MSI or MSI-X vector, as indicated by the Interrupt Message
		 * Number field in the PCI Express Capabilities register", where
		 * according to Section 7.8.2 of the specification "For MSI-X,
		 * the value in this field indicates which MSI-X Table entry is
		 * used to generate the interrupt message."
		 */
		pos = pci_pcie_cap(dev);
		pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
		entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
		if (entry >= nr_entries)
			goto Error;

		i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
		if (i == nvec)
			nvec++;

		idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
		idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
	}

	if (mask & PCIE_PORT_SERVICE_AER) {
		int entry;

		/*
		 * The code below follows Section 7.10.10 of the PCI Express
		 * Base Specification 2.0 stating that bits 31-27 of the Root
		 * Error Status Register contain a value indicating which of the
		 * MSI/MSI-X vectors assigned to the port is going to be used
		 * for AER, where "For MSI-X, the value in this register
		 * indicates which MSI-X Table entry is used to generate the
		 * interrupt message."
		 */
		pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
		pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
		entry = reg32 >> 27;
		if (entry >= nr_entries)
			goto Error;

		i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
		if (i == nvec)
			nvec++;

		idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
	}

	/*
	 * If nvec is equal to the allocated number of entries, we can just use
	 * what we have.  Otherwise, the port has some extra entries not for the
	 * services we know and we need to work around that.
	 */
	if (nvec == nr_entries) {
		status = 0;
	} else {
		/* Drop the temporary MSI-X setup */
		pci_disable_msix(dev);

		/* Now allocate the MSI-X vectors for real */
		status = pci_enable_msix(dev, msix_entries, nvec);
		if (status)
			goto Exit;
	}

	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;

 Exit:
	kfree(msix_entries);
	return status;

 Error:
	pci_disable_msix(dev);
	goto Exit;
}

/**
 * init_service_irqs - initialize irqs for PCI Express port services
 * @dev: PCI Express port to handle
 * @irqs: Array of irqs to populate
 * @mask: Bitmask of port capabilities returned by get_port_device_capability()
 *
 * Return value: Interrupt mode associated with the port
 */
static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
{
	int i, irq = -1;

	/* We have to use INTx if MSI cannot be used for PCIe PME or pciehp. */
	if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
	    ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
		if (dev->pin)
			irq = dev->irq;
		goto no_msi;
	}

	/* Try to use MSI-X if supported */
	if (!pcie_port_enable_msix(dev, irqs, mask))
		return 0;

	/* We're not going to use MSI-X, so try MSI and fall back to INTx */
	if (!pci_enable_msi(dev) || dev->pin)
		irq = dev->irq;

 no_msi:
	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
		irqs[i] = irq;
	irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;

	if (irq < 0)
		return -ENODEV;
	return 0;
}

static void cleanup_service_irqs(struct pci_dev *dev)
{
	if (dev->msix_enabled)
		pci_disable_msix(dev);
	else if (dev->msi_enabled)
		pci_disable_msi(dev);
}

/**
 * get_port_device_capability - discover capabilities of a PCI Express port
 * @dev: PCI Express port to examine
 *
 * The capabilities are read from the port's PCI Express configuration registers
 * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
 * 7.9 - 7.11.
 *
 * Return value: Bitmask of discovered port capabilities
 */
static int get_port_device_capability(struct pci_dev *dev)
{
	int services = 0, pos;
	u16 reg16;
	u32 reg32;
	int cap_mask = 0;
	int err;

	if (pcie_ports_disabled)
		return 0;

	err = pcie_port_platform_notify(dev, &cap_mask);
	if (!pcie_ports_auto) {
		cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
				| PCIE_PORT_SERVICE_VC;
		if (pci_aer_available())
			cap_mask |= PCIE_PORT_SERVICE_AER;
	} else if (err) {
			return 0;
	}

	pos = pci_pcie_cap(dev);
	pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
	/* Hot-Plug Capable */
	if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
		pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
		if (reg32 & PCI_EXP_SLTCAP_HPC) {
			services |= PCIE_PORT_SERVICE_HP;
			/*
			 * Disable hot-plug interrupts in case they have been
			 * enabled by the BIOS and the hot-plug service driver
			 * is not loaded.
			 */
			pos += PCI_EXP_SLTCTL;
			pci_read_config_word(dev, pos, &reg16);
			reg16 &= ~(PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE);
			pci_write_config_word(dev, pos, reg16);
		}
	}
	/* AER capable */
	if ((cap_mask & PCIE_PORT_SERVICE_AER)
	    && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
		services |= PCIE_PORT_SERVICE_AER;
		/*
		 * Disable AER on this port in case it's been enabled by the
		 * BIOS (the AER service driver will enable it when necessary).
		 */
		pci_disable_pcie_error_reporting(dev);
	}
	/* VC support */
	if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
		services |= PCIE_PORT_SERVICE_VC;
	/* Root ports are capable of generating PME too */
	if ((cap_mask & PCIE_PORT_SERVICE_PME)
	    && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
		services |= PCIE_PORT_SERVICE_PME;
		/*
		 * Disable PME interrupt on this port in case it's been enabled
		 * by the BIOS (the PME service driver will enable it when
		 * necessary).
		 */
		pcie_pme_interrupt_enable(dev, false);
	}

	return services;
}

/**
 * pcie_device_init - allocate and initialize PCI Express port service device
 * @pdev: PCI Express port to associate the service device with
 * @service: Type of service to associate with the service device
 * @irq: Interrupt vector to associate with the service device
 */
static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
{
	int retval;
	struct pcie_device *pcie;
	struct device *device;

	pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
	if (!pcie)
		return -ENOMEM;
	pcie->port = pdev;
	pcie->irq = irq;
	pcie->service = service;

	/* Initialize generic device interface */
	device = &pcie->device;
	device->bus = &pcie_port_bus_type;
	device->release = release_pcie_device;	/* callback to free pcie dev */
	dev_set_name(device, "%s:pcie%02x",
		     pci_name(pdev),
		     get_descriptor_id(pci_pcie_type(pdev), service));
	device->parent = &pdev->dev;
	device_enable_async_suspend(device);

	retval = device_register(device);
	if (retval)
		kfree(pcie);
	else
		get_device(device);
	return retval;
}

/**
 * pcie_port_device_register - register PCI Express port
 * @dev: PCI Express port to register
 *
 * Allocate the port extension structure and register services associated with
 * the port.
 */
int pcie_port_device_register(struct pci_dev *dev)
{
	int status, capabilities, i, nr_service;
	int irqs[PCIE_PORT_DEVICE_MAXSERVICES];

	/* Enable PCI Express port device */
	status = pci_enable_device(dev);
	if (status)
		return status;

	/* Get and check PCI Express port services */
	capabilities = get_port_device_capability(dev);
	if (!capabilities)
		return 0;

	pci_set_master(dev);
	/*
	 * Initialize service irqs. Don't use service devices that
	 * require interrupts if there is no way to generate them.
	 */
	status = init_service_irqs(dev, irqs, capabilities);
	if (status) {
		capabilities &= PCIE_PORT_SERVICE_VC;
		if (!capabilities)
			goto error_disable;
	}

	/* Allocate child services if any */
	status = -ENODEV;
	nr_service = 0;
	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
		int service = 1 << i;
		if (!(capabilities & service))
			continue;
		if (!pcie_device_init(dev, service, irqs[i]))
			nr_service++;
	}
	if (!nr_service)
		goto error_cleanup_irqs;

	return 0;

error_cleanup_irqs:
	cleanup_service_irqs(dev);
error_disable:
	pci_disable_device(dev);
	return status;
}

#ifdef CONFIG_PM
static int suspend_iter(struct device *dev, void *data)
{
	struct pcie_port_service_driver *service_driver;

	if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
		service_driver = to_service_driver(dev->driver);
		if (service_driver->suspend)
			service_driver->suspend(to_pcie_device(dev));
	}
	return 0;
}

/**
 * pcie_port_device_suspend - suspend port services associated with a PCIe port
 * @dev: PCI Express port to handle
 */
int pcie_port_device_suspend(struct device *dev)
{
	return device_for_each_child(dev, NULL, suspend_iter);
}

static int resume_iter(struct device *dev, void *data)
{
	struct pcie_port_service_driver *service_driver;

	if ((dev->bus == &pcie_port_bus_type) &&
	    (dev->driver)) {
		service_driver = to_service_driver(dev->driver);
		if (service_driver->resume)
			service_driver->resume(to_pcie_device(dev));
	}
	return 0;
}

/**
 * pcie_port_device_suspend - resume port services associated with a PCIe port
 * @dev: PCI Express port to handle
 */
int pcie_port_device_resume(struct device *dev)
{
	return device_for_each_child(dev, NULL, resume_iter);
}
#endif /* PM */

static int remove_iter(struct device *dev, void *data)
{
	if (dev->bus == &pcie_port_bus_type) {
		put_device(dev);
		device_unregister(dev);
	}
	return 0;
}

/**
 * pcie_port_device_remove - unregister PCI Express port service devices
 * @dev: PCI Express port the service devices to unregister are associated with
 *
 * Remove PCI Express port service devices associated with given port and
 * disable MSI-X or MSI for the port.
 */
void pcie_port_device_remove(struct pci_dev *dev)
{
	device_for_each_child(&dev->dev, NULL, remove_iter);
	cleanup_service_irqs(dev);
	pci_disable_device(dev);
}

/**
 * pcie_port_probe_service - probe driver for given PCI Express port service
 * @dev: PCI Express port service device to probe against
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * whenever match is found between the driver and a port service device.
 */
static int pcie_port_probe_service(struct device *dev)
{
	struct pcie_device *pciedev;
	struct pcie_port_service_driver *driver;
	int status;

	if (!dev || !dev->driver)
		return -ENODEV;

	driver = to_service_driver(dev->driver);
	if (!driver || !driver->probe)
		return -ENODEV;

	pciedev = to_pcie_device(dev);
	status = driver->probe(pciedev);
	if (!status) {
		dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
			driver->name);
		get_device(dev);
	}
	return status;
}

/**
 * pcie_port_remove_service - detach driver from given PCI Express port service
 * @dev: PCI Express port service device to handle
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * when device_unregister() is called for the port service device associated
 * with the driver.
 */
static int pcie_port_remove_service(struct device *dev)
{
	struct pcie_device *pciedev;
	struct pcie_port_service_driver *driver;

	if (!dev || !dev->driver)
		return 0;

	pciedev = to_pcie_device(dev);
	driver = to_service_driver(dev->driver);
	if (driver && driver->remove) {
		dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
			driver->name);
		driver->remove(pciedev);
		put_device(dev);
	}
	return 0;
}

/**
 * pcie_port_shutdown_service - shut down given PCI Express port service
 * @dev: PCI Express port service device to handle
 *
 * If PCI Express port service driver is registered with
 * pcie_port_service_register(), this function will be called by the driver core
 * when device_shutdown() is called for the port service device associated
 * with the driver.
 */
static void pcie_port_shutdown_service(struct device *dev) {}

/**
 * pcie_port_service_register - register PCI Express port service driver
 * @new: PCI Express port service driver to register
 */
int pcie_port_service_register(struct pcie_port_service_driver *new)
{
	if (pcie_ports_disabled)
		return -ENODEV;

	new->driver.name = (char *)new->name;
	new->driver.bus = &pcie_port_bus_type;
	new->driver.probe = pcie_port_probe_service;
	new->driver.remove = pcie_port_remove_service;
	new->driver.shutdown = pcie_port_shutdown_service;

	return driver_register(&new->driver);
}
EXPORT_SYMBOL(pcie_port_service_register);

/**
 * pcie_port_service_unregister - unregister PCI Express port service driver
 * @drv: PCI Express port service driver to unregister
 */
void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
{
	driver_unregister(&drv->driver);
}
EXPORT_SYMBOL(pcie_port_service_unregister);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* File: portdrv_core.c
	3	* Purpose: PCI Express Port Bus Driver's Core Functions
	4	*
	5	* Copyright (C) 2004 Intel
	6	* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/pci.h>
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/pm.h>
4e57b681 TS	14	#include <linux/string.h>
4e57b681 TS	15	#include <linux/slab.h>
1da177e4	16	#include <linux/pcieport_if.h>
28eb5f27	17	#include <linux/aer.h>
1da177e4	18
1bf83e55	19	#include "../pci.h"
1da177e4 LT	20	#include "portdrv.h"
1da177e4 LT	21
7570a333 MT	22	bool pciehp_msi_disabled;
	23
	24	static int __init pciehp_setup(char *str)
	25	{
	26	if (!strncmp(str, "nomsi", 5))
	27	pciehp_msi_disabled = true;
	28
	29	return 1;
	30	}
	31	__setup("pcie_hp=", pciehp_setup);
	32
facf6d16 RW	33	/**
	34	* release_pcie_device - free PCI Express port service device structure
	35	* @dev: Port service device to release
	36	*
	37	* Invoked automatically when device is being removed in response to
	38	* device_unregister(dev). Release all resources being claimed.
1da177e4 LT	39	*/
	40	static void release_pcie_device(struct device *dev)
	41	{
40da4186	42	kfree(to_pcie_device(dev));
1da177e4 LT	43	}
1da177e4 LT	44
b43d4513 RW	45	/**
	46	* pcie_port_msix_add_entry - add entry to given array of MSI-X entries
	47	* @entries: Array of MSI-X entries
	48	* @new_entry: Index of the entry to add to the array
	49	* @nr_entries: Number of entries aleady in the array
	50	*
	51	* Return value: Position of the added entry in the array
	52	*/
	53	static int pcie_port_msix_add_entry(
	54	struct msix_entry *entries, int new_entry, int nr_entries)
	55	{
	56	int j;
	57
	58	for (j = 0; j < nr_entries; j++)
	59	if (entries[j].entry == new_entry)
	60	return j;
	61
	62	entries[j].entry = new_entry;
	63	return j;
	64	}
	65
	66	/**
	67	* pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port
	68	* @dev: PCI Express port to handle
	69	* @vectors: Array of interrupt vectors to populate
	70	* @mask: Bitmask of port capabilities returned by get_port_device_capability()
	71	*
	72	* Return value: 0 on success, error code on failure
	73	*/
	74	static int pcie_port_enable_msix(struct pci_dev dev, int vectors, int mask)
	75	{
	76	struct msix_entry *msix_entries;
	77	int idx[PCIE_PORT_DEVICE_MAXSERVICES];
	78	int nr_entries, status, pos, i, nvec;
	79	u16 reg16;
	80	u32 reg32;
	81
	82	nr_entries = pci_msix_table_size(dev);
	83	if (!nr_entries)
	84	return -EINVAL;
	85	if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
	86	nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
	87
	88	msix_entries = kzalloc(sizeof(msix_entries) nr_entries, GFP_KERNEL);
	89	if (!msix_entries)
	90	return -ENOMEM;
	91
	92	/*
	93	* Allocate as many entries as the port wants, so that we can check
	94	* which of them will be useful. Moreover, if nr_entries is correctly
	95	* equal to the number of entries this port actually uses, we'll happily
	96	* go through without any tricks.
	97	*/
	98	for (i = 0; i < nr_entries; i++)
	99	msix_entries[i].entry = i;
	100
	101	status = pci_enable_msix(dev, msix_entries, nr_entries);
	102	if (status)
	103	goto Exit;
	104
	105	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
	106	idx[i] = -1;
	107	status = -EIO;
	108	nvec = 0;
109
110	if (mask & (PCIE_PORT_SERVICE_PME \| PCIE_PORT_SERVICE_HP)) {
111	int entry;
112
113	/*
114	* The code below follows the PCI Express Base Specification 2.0
115	* stating in Section 6.1.6 that "PME and Hot-Plug Event
116	* interrupts (when both are implemented) always share the same
117	* MSI or MSI-X vector, as indicated by the Interrupt Message
118	* Number field in the PCI Express Capabilities register", where
119	* according to Section 7.8.2 of the specification "For MSI-X,
120	* the value in this field indicates which MSI-X Table entry is
121	* used to generate the interrupt message."
122	*/
dba90dfe	123	pos = pci_pcie_cap(dev);
f9f45604 KK	124	pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
f9f45604 KK	125	entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
b43d4513 RW	126	if (entry >= nr_entries)
	127	goto Error;
	128
	129	i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
	130	if (i == nvec)
	131	nvec++;
	132
	133	idx[PCIE_PORT_SERVICE_PME_SHIFT] = i;
	134	idx[PCIE_PORT_SERVICE_HP_SHIFT] = i;
	135	}
	136
	137	if (mask & PCIE_PORT_SERVICE_AER) {
	138	int entry;
	139
	140	/*
	141	* The code below follows Section 7.10.10 of the PCI Express
	142	* Base Specification 2.0 stating that bits 31-27 of the Root
	143	* Error Status Register contain a value indicating which of the
	144	* MSI/MSI-X vectors assigned to the port is going to be used
	145	* for AER, where "For MSI-X, the value in this register
	146	* indicates which MSI-X Table entry is used to generate the
	147	* interrupt message."
	148	*/
	149	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
	150	pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
	151	entry = reg32 >> 27;
	152	if (entry >= nr_entries)
	153	goto Error;
	154
	155	i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
	156	if (i == nvec)
	157	nvec++;
	158
	159	idx[PCIE_PORT_SERVICE_AER_SHIFT] = i;
	160	}
	161
	162	/*
	163	* If nvec is equal to the allocated number of entries, we can just use
	164	* what we have. Otherwise, the port has some extra entries not for the
	165	* services we know and we need to work around that.
	166	*/
	167	if (nvec == nr_entries) {
	168	status = 0;
	169	} else {
	170	/* Drop the temporary MSI-X setup */
	171	pci_disable_msix(dev);
	172
	173	/* Now allocate the MSI-X vectors for real */
	174	status = pci_enable_msix(dev, msix_entries, nvec);
	175	if (status)
	176	goto Exit;
	177	}
	178
	179	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
	180	vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
	181
	182	Exit:
	183	kfree(msix_entries);
	184	return status;
	185
	186	Error:
	187	pci_disable_msix(dev);
	188	goto Exit;
	189	}
190
facf6d16	191	/**
dc535178	192	* init_service_irqs - initialize irqs for PCI Express port services
facf6d16	193	* @dev: PCI Express port to handle
dc535178	194	* @irqs: Array of irqs to populate
facf6d16 RW	195	* @mask: Bitmask of port capabilities returned by get_port_device_capability()
	196	*
	197	* Return value: Interrupt mode associated with the port
	198	*/
dc535178	199	static int init_service_irqs(struct pci_dev dev, int irqs, int mask)
1da177e4	200	{
c39fae14 RW	201	int i, irq = -1;
c39fae14 RW	202
7570a333 MT	203	/* We have to use INTx if MSI cannot be used for PCIe PME or pciehp. */
	204	if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) \|\|
	205	((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
c39fae14 RW	206	if (dev->pin)
	207	irq = dev->irq;
	208	goto no_msi;
	209	}
90e9cd50	210
b43d4513	211	/* Try to use MSI-X if supported */
dc535178 KK	212	if (!pcie_port_enable_msix(dev, irqs, mask))
dc535178 KK	213	return 0;
c39fae14	214
b43d4513	215	/* We're not going to use MSI-X, so try MSI and fall back to INTx */
dc535178 KK	216	if (!pci_enable_msi(dev) \|\| dev->pin)
dc535178 KK	217	irq = dev->irq;
b43d4513	218
c39fae14	219	no_msi:
b43d4513	220	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
dc535178 KK	221	irqs[i] = irq;
dc535178 KK	222	irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
1da177e4	223
dc535178 KK	224	if (irq < 0)
	225	return -ENODEV;
	226	return 0;
1da177e4 LT	227	}
1da177e4 LT	228
fbb5de70 KK	229	static void cleanup_service_irqs(struct pci_dev *dev)
	230	{
	231	if (dev->msix_enabled)
	232	pci_disable_msix(dev);
	233	else if (dev->msi_enabled)
	234	pci_disable_msi(dev);
	235	}
	236
facf6d16 RW	237	/**
	238	* get_port_device_capability - discover capabilities of a PCI Express port
	239	* @dev: PCI Express port to examine
	240	*
	241	* The capabilities are read from the port's PCI Express configuration registers
	242	* as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and
	243	* 7.9 - 7.11.
	244	*
	245	* Return value: Bitmask of discovered port capabilities
	246	*/
1da177e4 LT	247	static int get_port_device_capability(struct pci_dev *dev)
	248	{
	249	int services = 0, pos;
	250	u16 reg16;
	251	u32 reg32;
1267b3a3	252	int cap_mask = 0;
28eb5f27 RW	253	int err;
28eb5f27 RW	254
fe31e697 RW	255	if (pcie_ports_disabled)
	256	return 0;
	257
28eb5f27	258	err = pcie_port_platform_notify(dev, &cap_mask);
fe31e697	259	if (!pcie_ports_auto) {
28eb5f27 RW	260	cap_mask = PCIE_PORT_SERVICE_PME \| PCIE_PORT_SERVICE_HP
	261	\| PCIE_PORT_SERVICE_VC;
	262	if (pci_aer_available())
	263	cap_mask \|= PCIE_PORT_SERVICE_AER;
fe31e697 RW	264	} else if (err) {
fe31e697 RW	265	return 0;
28eb5f27	266	}
1da177e4	267
dba90dfe	268	pos = pci_pcie_cap(dev);
f9f45604	269	pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
1da177e4	270	/* Hot-Plug Capable */
28eb5f27	271	if ((cap_mask & PCIE_PORT_SERVICE_HP) && (reg16 & PCI_EXP_FLAGS_SLOT)) {
f9f45604	272	pci_read_config_dword(dev, pos + PCI_EXP_SLTCAP, &reg32);
2bd50dd8	273	if (reg32 & PCI_EXP_SLTCAP_HPC) {
1da177e4	274	services \|= PCIE_PORT_SERVICE_HP;
2bd50dd8 RW	275	/*
	276	* Disable hot-plug interrupts in case they have been
	277	* enabled by the BIOS and the hot-plug service driver
	278	* is not loaded.
	279	*/
	280	pos += PCI_EXP_SLTCTL;
	281	pci_read_config_word(dev, pos, &reg16);
	282	reg16 &= ~(PCI_EXP_SLTCTL_CCIE \| PCI_EXP_SLTCTL_HPIE);
	283	pci_write_config_word(dev, pos, reg16);
	284	}
1bf83e55 RW	285	}
1bf83e55 RW	286	/* AER capable */
28eb5f27	287	if ((cap_mask & PCIE_PORT_SERVICE_AER)
2bd50dd8	288	&& pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) {
0927678f	289	services \|= PCIE_PORT_SERVICE_AER;
2bd50dd8 RW	290	/*
	291	* Disable AER on this port in case it's been enabled by the
	292	* BIOS (the AER service driver will enable it when necessary).
	293	*/
	294	pci_disable_pcie_error_reporting(dev);
	295	}
1bf83e55	296	/* VC support */
0927678f JB	297	if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC))
0927678f JB	298	services \|= PCIE_PORT_SERVICE_VC;
9e5d0b16	299	/* Root ports are capable of generating PME too */
28eb5f27	300	if ((cap_mask & PCIE_PORT_SERVICE_PME)
62f87c0e	301	&& pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
9e5d0b16	302	services \|= PCIE_PORT_SERVICE_PME;
2bd50dd8 RW	303	/*
	304	* Disable PME interrupt on this port in case it's been enabled
	305	* by the BIOS (the PME service driver will enable it when
	306	* necessary).
	307	*/
	308	pcie_pme_interrupt_enable(dev, false);
	309	}
1da177e4 LT	310
	311	return services;
	312	}
	313
facf6d16	314	/**
52a0f24b KK	315	* pcie_device_init - allocate and initialize PCI Express port service device
	316	* @pdev: PCI Express port to associate the service device with
	317	* @service: Type of service to associate with the service device
facf6d16	318	* @irq: Interrupt vector to associate with the service device
facf6d16	319	*/
52a0f24b	320	static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
1da177e4	321	{
52a0f24b KK	322	int retval;
52a0f24b KK	323	struct pcie_device *pcie;
1da177e4 LT	324	struct device *device;
1da177e4 LT	325
52a0f24b KK	326	pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
	327	if (!pcie)
	328	return -ENOMEM;
	329	pcie->port = pdev;
	330	pcie->irq = irq;
	331	pcie->service = service;
1da177e4 LT	332
1da177e4 LT	333	/* Initialize generic device interface */
52a0f24b	334	device = &pcie->device;
1da177e4	335	device->bus = &pcie_port_bus_type;
1da177e4	336	device->release = release_pcie_device; /* callback to free pcie dev */
1a927133	337	dev_set_name(device, "%s:pcie%02x",
52a0f24b	338	pci_name(pdev),
62f87c0e	339	get_descriptor_id(pci_pcie_type(pdev), service));
52a0f24b	340	device->parent = &pdev->dev;
a1e4d72c	341	device_enable_async_suspend(device);
52a0f24b KK	342
	343	retval = device_register(device);
	344	if (retval)
	345	kfree(pcie);
	346	else
	347	get_device(device);
	348	return retval;
1da177e4 LT	349	}
1da177e4 LT	350
facf6d16 RW	351	/**
	352	* pcie_port_device_register - register PCI Express port
	353	* @dev: PCI Express port to register
	354	*
	355	* Allocate the port extension structure and register services associated with
	356	* the port.
	357	*/
1da177e4 LT	358	int pcie_port_device_register(struct pci_dev *dev)
1da177e4 LT	359	{
40717c39	360	int status, capabilities, i, nr_service;
dc535178	361	int irqs[PCIE_PORT_DEVICE_MAXSERVICES];
1da177e4	362
1ce5e830 KK	363	/* Enable PCI Express port device */
	364	status = pci_enable_device(dev);
	365	if (status)
694f88ef	366	return status;
fe31e697 RW	367
	368	/* Get and check PCI Express port services */
	369	capabilities = get_port_device_capability(dev);
eca67315	370	if (!capabilities)
fe31e697	371	return 0;
fe31e697	372
1ce5e830	373	pci_set_master(dev);
dc535178 KK	374	/*
	375	* Initialize service irqs. Don't use service devices that
	376	* require interrupts if there is no way to generate them.
	377	*/
	378	status = init_service_irqs(dev, irqs, capabilities);
	379	if (status) {
	380	capabilities &= PCIE_PORT_SERVICE_VC;
	381	if (!capabilities)
1ce5e830	382	goto error_disable;
f118c0c3	383	}
1da177e4 LT	384
1da177e4 LT	385	/* Allocate child services if any */
40717c39 KK	386	status = -ENODEV;
	387	nr_service = 0;
	388	for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
90e9cd50	389	int service = 1 << i;
90e9cd50 RW	390	if (!(capabilities & service))
90e9cd50 RW	391	continue;
40717c39 KK	392	if (!pcie_device_init(dev, service, irqs[i]))
40717c39 KK	393	nr_service++;
f118c0c3	394	}
40717c39	395	if (!nr_service)
fbb5de70	396	goto error_cleanup_irqs;
40717c39	397
1da177e4	398	return 0;
f118c0c3	399
fbb5de70 KK	400	error_cleanup_irqs:
fbb5de70 KK	401	cleanup_service_irqs(dev);
1ce5e830 KK	402	error_disable:
1ce5e830 KK	403	pci_disable_device(dev);
f118c0c3	404	return status;
1da177e4 LT	405	}
	406
	407	#ifdef CONFIG_PM
d0e2b4a0	408	static int suspend_iter(struct device dev, void data)
1da177e4	409	{
1da177e4	410	struct pcie_port_service_driver *service_driver;
d0e2b4a0	411
40da4186 HS	412	if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
	413	service_driver = to_service_driver(dev->driver);
	414	if (service_driver->suspend)
	415	service_driver->suspend(to_pcie_device(dev));
	416	}
d0e2b4a0	417	return 0;
d0e2b4a0	418	}
1da177e4	419
facf6d16 RW	420	/**
	421	* pcie_port_device_suspend - suspend port services associated with a PCIe port
	422	* @dev: PCI Express port to handle
facf6d16	423	*/
3a3c244c	424	int pcie_port_device_suspend(struct device *dev)
d0e2b4a0	425	{
3a3c244c	426	return device_for_each_child(dev, NULL, suspend_iter);
1da177e4 LT	427	}
1da177e4 LT	428
d0e2b4a0	429	static int resume_iter(struct device dev, void data)
d0e2b4a0	430	{
1da177e4 LT	431	struct pcie_port_service_driver *service_driver;
1da177e4 LT	432
d0e2b4a0	433	if ((dev->bus == &pcie_port_bus_type) &&
	434	(dev->driver)) {
	435	service_driver = to_service_driver(dev->driver);
	436	if (service_driver->resume)
	437	service_driver->resume(to_pcie_device(dev));
1da177e4	438	}
d0e2b4a0	439	return 0;
d0e2b4a0	440	}
1da177e4	441
facf6d16 RW	442	/**
	443	* pcie_port_device_suspend - resume port services associated with a PCIe port
	444	* @dev: PCI Express port to handle
	445	*/
3a3c244c	446	int pcie_port_device_resume(struct device *dev)
d0e2b4a0	447	{
3a3c244c	448	return device_for_each_child(dev, NULL, resume_iter);
1da177e4	449	}
3a3c244c	450	#endif /* PM */
1da177e4	451
d0e2b4a0	452	static int remove_iter(struct device dev, void data)
1da177e4	453	{
d0e2b4a0	454	if (dev->bus == &pcie_port_bus_type) {
ae40582e EB	455	put_device(dev);
ae40582e EB	456	device_unregister(dev);
1da177e4	457	}
d0e2b4a0	458	return 0;
	459	}
	460
facf6d16 RW	461	/**
	462	* pcie_port_device_remove - unregister PCI Express port service devices
	463	* @dev: PCI Express port the service devices to unregister are associated with
	464	*
	465	* Remove PCI Express port service devices associated with given port and
	466	* disable MSI-X or MSI for the port.
	467	*/
d0e2b4a0	468	void pcie_port_device_remove(struct pci_dev *dev)
d0e2b4a0	469	{
ae40582e	470	device_for_each_child(&dev->dev, NULL, remove_iter);
fbb5de70	471	cleanup_service_irqs(dev);
dc535178	472	pci_disable_device(dev);
1da177e4 LT	473	}
1da177e4 LT	474
d9347371 RW	475	/**
	476	* pcie_port_probe_service - probe driver for given PCI Express port service
	477	* @dev: PCI Express port service device to probe against
	478	*
	479	* If PCI Express port service driver is registered with
	480	* pcie_port_service_register(), this function will be called by the driver core
	481	* whenever match is found between the driver and a port service device.
	482	*/
fa6c9937	483	static int pcie_port_probe_service(struct device *dev)
1da177e4	484	{
fa6c9937 RW	485	struct pcie_device *pciedev;
	486	struct pcie_port_service_driver *driver;
	487	int status;
	488
	489	if (!dev \|\| !dev->driver)
	490	return -ENODEV;
	491
	492	driver = to_service_driver(dev->driver);
	493	if (!driver \|\| !driver->probe)
	494	return -ENODEV;
	495
	496	pciedev = to_pcie_device(dev);
0516c8bc	497	status = driver->probe(pciedev);
fa6c9937 RW	498	if (!status) {
	499	dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
	500	driver->name);
	501	get_device(dev);
	502	}
	503	return status;
1da177e4 LT	504	}
1da177e4 LT	505
d9347371 RW	506	/**
	507	* pcie_port_remove_service - detach driver from given PCI Express port service
	508	* @dev: PCI Express port service device to handle
	509	*
	510	* If PCI Express port service driver is registered with
	511	* pcie_port_service_register(), this function will be called by the driver core
	512	* when device_unregister() is called for the port service device associated
	513	* with the driver.
	514	*/
fa6c9937	515	static int pcie_port_remove_service(struct device *dev)
1da177e4	516	{
fa6c9937 RW	517	struct pcie_device *pciedev;
	518	struct pcie_port_service_driver *driver;
	519
	520	if (!dev \|\| !dev->driver)
	521	return 0;
	522
	523	pciedev = to_pcie_device(dev);
	524	driver = to_service_driver(dev->driver);
	525	if (driver && driver->remove) {
	526	dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
	527	driver->name);
	528	driver->remove(pciedev);
	529	put_device(dev);
	530	}
	531	return 0;
1da177e4 LT	532	}
1da177e4 LT	533
d9347371 RW	534	/**
	535	* pcie_port_shutdown_service - shut down given PCI Express port service
	536	* @dev: PCI Express port service device to handle
	537	*
	538	* If PCI Express port service driver is registered with
	539	* pcie_port_service_register(), this function will be called by the driver core
	540	* when device_shutdown() is called for the port service device associated
	541	* with the driver.
	542	*/
fa6c9937 RW	543	static void pcie_port_shutdown_service(struct device *dev) {}
fa6c9937 RW	544
d9347371 RW	545	/**
	546	* pcie_port_service_register - register PCI Express port service driver
	547	* @new: PCI Express port service driver to register
	548	*/
1da177e4 LT	549	int pcie_port_service_register(struct pcie_port_service_driver *new)
1da177e4 LT	550	{
79dd9182 RW	551	if (pcie_ports_disabled)
	552	return -ENODEV;
	553
1da177e4 LT	554	new->driver.name = (char *)new->name;
	555	new->driver.bus = &pcie_port_bus_type;
	556	new->driver.probe = pcie_port_probe_service;
	557	new->driver.remove = pcie_port_remove_service;
	558	new->driver.shutdown = pcie_port_shutdown_service;
1da177e4 LT	559
1da177e4 LT	560	return driver_register(&new->driver);
d0e2b4a0	561	}
40da4186	562	EXPORT_SYMBOL(pcie_port_service_register);
1da177e4	563
d9347371 RW	564	/**
	565	* pcie_port_service_unregister - unregister PCI Express port service driver
	566	* @drv: PCI Express port service driver to unregister
	567	*/
fa6c9937	568	void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
1da177e4	569	{
fa6c9937	570	driver_unregister(&drv->driver);
1da177e4	571	}
1da177e4	572	EXPORT_SYMBOL(pcie_port_service_unregister);