Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * File: portdrv_core.c | |
3 | * Purpose: PCI Express Port Bus Driver's Core Functions | |
4 | * | |
5 | * Copyright (C) 2004 Intel | |
6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
7 | */ | |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/pci.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/pm.h> | |
4e57b681 TS |
14 | #include <linux/string.h> |
15 | #include <linux/slab.h> | |
1da177e4 | 16 | #include <linux/pcieport_if.h> |
28eb5f27 | 17 | #include <linux/aer.h> |
1da177e4 | 18 | |
1bf83e55 | 19 | #include "../pci.h" |
1da177e4 LT |
20 | #include "portdrv.h" |
21 | ||
7570a333 MT |
22 | bool pciehp_msi_disabled; |
23 | ||
24 | static int __init pciehp_setup(char *str) | |
25 | { | |
26 | if (!strncmp(str, "nomsi", 5)) | |
27 | pciehp_msi_disabled = true; | |
28 | ||
29 | return 1; | |
30 | } | |
31 | __setup("pcie_hp=", pciehp_setup); | |
32 | ||
facf6d16 RW |
33 | /** |
34 | * release_pcie_device - free PCI Express port service device structure | |
35 | * @dev: Port service device to release | |
36 | * | |
37 | * Invoked automatically when device is being removed in response to | |
38 | * device_unregister(dev). Release all resources being claimed. | |
1da177e4 LT |
39 | */ |
40 | static void release_pcie_device(struct device *dev) | |
41 | { | |
40da4186 | 42 | kfree(to_pcie_device(dev)); |
1da177e4 LT |
43 | } |
44 | ||
b43d4513 RW |
45 | /** |
46 | * pcie_port_msix_add_entry - add entry to given array of MSI-X entries | |
47 | * @entries: Array of MSI-X entries | |
48 | * @new_entry: Index of the entry to add to the array | |
f7625980 | 49 | * @nr_entries: Number of entries already in the array |
b43d4513 RW |
50 | * |
51 | * Return value: Position of the added entry in the array | |
52 | */ | |
53 | static int pcie_port_msix_add_entry( | |
54 | struct msix_entry *entries, int new_entry, int nr_entries) | |
55 | { | |
56 | int j; | |
57 | ||
58 | for (j = 0; j < nr_entries; j++) | |
59 | if (entries[j].entry == new_entry) | |
60 | return j; | |
61 | ||
62 | entries[j].entry = new_entry; | |
63 | return j; | |
64 | } | |
65 | ||
66 | /** | |
67 | * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port | |
68 | * @dev: PCI Express port to handle | |
69 | * @vectors: Array of interrupt vectors to populate | |
70 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() | |
71 | * | |
72 | * Return value: 0 on success, error code on failure | |
73 | */ | |
74 | static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) | |
75 | { | |
76 | struct msix_entry *msix_entries; | |
77 | int idx[PCIE_PORT_DEVICE_MAXSERVICES]; | |
78 | int nr_entries, status, pos, i, nvec; | |
79 | u16 reg16; | |
80 | u32 reg32; | |
81 | ||
82 | nr_entries = pci_msix_table_size(dev); | |
83 | if (!nr_entries) | |
84 | return -EINVAL; | |
85 | if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES) | |
86 | nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES; | |
87 | ||
88 | msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL); | |
89 | if (!msix_entries) | |
90 | return -ENOMEM; | |
91 | ||
92 | /* | |
93 | * Allocate as many entries as the port wants, so that we can check | |
94 | * which of them will be useful. Moreover, if nr_entries is correctly | |
95 | * equal to the number of entries this port actually uses, we'll happily | |
96 | * go through without any tricks. | |
97 | */ | |
98 | for (i = 0; i < nr_entries; i++) | |
99 | msix_entries[i].entry = i; | |
100 | ||
101 | status = pci_enable_msix(dev, msix_entries, nr_entries); | |
102 | if (status) | |
103 | goto Exit; | |
104 | ||
105 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) | |
106 | idx[i] = -1; | |
107 | status = -EIO; | |
108 | nvec = 0; | |
109 | ||
110 | if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) { | |
111 | int entry; | |
112 | ||
113 | /* | |
114 | * The code below follows the PCI Express Base Specification 2.0 | |
115 | * stating in Section 6.1.6 that "PME and Hot-Plug Event | |
116 | * interrupts (when both are implemented) always share the same | |
117 | * MSI or MSI-X vector, as indicated by the Interrupt Message | |
118 | * Number field in the PCI Express Capabilities register", where | |
119 | * according to Section 7.8.2 of the specification "For MSI-X, | |
120 | * the value in this field indicates which MSI-X Table entry is | |
121 | * used to generate the interrupt message." | |
122 | */ | |
33e8b34f | 123 | pcie_capability_read_word(dev, PCI_EXP_FLAGS, ®16); |
f9f45604 | 124 | entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; |
b43d4513 RW |
125 | if (entry >= nr_entries) |
126 | goto Error; | |
127 | ||
128 | i = pcie_port_msix_add_entry(msix_entries, entry, nvec); | |
129 | if (i == nvec) | |
130 | nvec++; | |
131 | ||
132 | idx[PCIE_PORT_SERVICE_PME_SHIFT] = i; | |
133 | idx[PCIE_PORT_SERVICE_HP_SHIFT] = i; | |
134 | } | |
135 | ||
136 | if (mask & PCIE_PORT_SERVICE_AER) { | |
137 | int entry; | |
138 | ||
139 | /* | |
140 | * The code below follows Section 7.10.10 of the PCI Express | |
141 | * Base Specification 2.0 stating that bits 31-27 of the Root | |
142 | * Error Status Register contain a value indicating which of the | |
143 | * MSI/MSI-X vectors assigned to the port is going to be used | |
144 | * for AER, where "For MSI-X, the value in this register | |
145 | * indicates which MSI-X Table entry is used to generate the | |
146 | * interrupt message." | |
147 | */ | |
148 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | |
149 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); | |
150 | entry = reg32 >> 27; | |
151 | if (entry >= nr_entries) | |
152 | goto Error; | |
153 | ||
154 | i = pcie_port_msix_add_entry(msix_entries, entry, nvec); | |
155 | if (i == nvec) | |
156 | nvec++; | |
157 | ||
158 | idx[PCIE_PORT_SERVICE_AER_SHIFT] = i; | |
159 | } | |
160 | ||
161 | /* | |
162 | * If nvec is equal to the allocated number of entries, we can just use | |
163 | * what we have. Otherwise, the port has some extra entries not for the | |
164 | * services we know and we need to work around that. | |
165 | */ | |
166 | if (nvec == nr_entries) { | |
167 | status = 0; | |
168 | } else { | |
169 | /* Drop the temporary MSI-X setup */ | |
170 | pci_disable_msix(dev); | |
171 | ||
172 | /* Now allocate the MSI-X vectors for real */ | |
173 | status = pci_enable_msix(dev, msix_entries, nvec); | |
174 | if (status) | |
175 | goto Exit; | |
176 | } | |
177 | ||
178 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) | |
179 | vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1; | |
180 | ||
181 | Exit: | |
182 | kfree(msix_entries); | |
183 | return status; | |
184 | ||
185 | Error: | |
186 | pci_disable_msix(dev); | |
187 | goto Exit; | |
188 | } | |
189 | ||
facf6d16 | 190 | /** |
dc535178 | 191 | * init_service_irqs - initialize irqs for PCI Express port services |
facf6d16 | 192 | * @dev: PCI Express port to handle |
dc535178 | 193 | * @irqs: Array of irqs to populate |
facf6d16 RW |
194 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() |
195 | * | |
196 | * Return value: Interrupt mode associated with the port | |
197 | */ | |
dc535178 | 198 | static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask) |
1da177e4 | 199 | { |
c39fae14 RW |
200 | int i, irq = -1; |
201 | ||
e237d83f SL |
202 | /* |
203 | * If MSI cannot be used for PCIe PME or hotplug, we have to use | |
204 | * INTx or other interrupts, e.g. system shared interrupt. | |
205 | */ | |
7570a333 MT |
206 | if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) || |
207 | ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) { | |
e237d83f | 208 | if (dev->irq) |
c39fae14 RW |
209 | irq = dev->irq; |
210 | goto no_msi; | |
211 | } | |
90e9cd50 | 212 | |
b43d4513 | 213 | /* Try to use MSI-X if supported */ |
dc535178 KK |
214 | if (!pcie_port_enable_msix(dev, irqs, mask)) |
215 | return 0; | |
c39fae14 | 216 | |
e237d83f SL |
217 | /* |
218 | * We're not going to use MSI-X, so try MSI and fall back to INTx. | |
219 | * If neither MSI/MSI-X nor INTx available, try other interrupt. On | |
220 | * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode. | |
221 | */ | |
222 | if (!pci_enable_msi(dev) || dev->irq) | |
dc535178 | 223 | irq = dev->irq; |
b43d4513 | 224 | |
c39fae14 | 225 | no_msi: |
b43d4513 | 226 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) |
dc535178 KK |
227 | irqs[i] = irq; |
228 | irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1; | |
1da177e4 | 229 | |
dc535178 KK |
230 | if (irq < 0) |
231 | return -ENODEV; | |
232 | return 0; | |
1da177e4 LT |
233 | } |
234 | ||
fbb5de70 KK |
235 | static void cleanup_service_irqs(struct pci_dev *dev) |
236 | { | |
237 | if (dev->msix_enabled) | |
238 | pci_disable_msix(dev); | |
239 | else if (dev->msi_enabled) | |
240 | pci_disable_msi(dev); | |
241 | } | |
242 | ||
facf6d16 RW |
243 | /** |
244 | * get_port_device_capability - discover capabilities of a PCI Express port | |
245 | * @dev: PCI Express port to examine | |
246 | * | |
247 | * The capabilities are read from the port's PCI Express configuration registers | |
248 | * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and | |
249 | * 7.9 - 7.11. | |
250 | * | |
251 | * Return value: Bitmask of discovered port capabilities | |
252 | */ | |
1da177e4 LT |
253 | static int get_port_device_capability(struct pci_dev *dev) |
254 | { | |
2dcfaf85 | 255 | int services = 0; |
1da177e4 | 256 | u32 reg32; |
1267b3a3 | 257 | int cap_mask = 0; |
28eb5f27 RW |
258 | int err; |
259 | ||
fe31e697 RW |
260 | if (pcie_ports_disabled) |
261 | return 0; | |
262 | ||
6b87e700 AM |
263 | cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP |
264 | | PCIE_PORT_SERVICE_VC; | |
265 | if (pci_aer_available()) | |
266 | cap_mask |= PCIE_PORT_SERVICE_AER; | |
267 | ||
268 | if (pcie_ports_auto) { | |
269 | err = pcie_port_platform_notify(dev, &cap_mask); | |
270 | if (err) | |
fe31e697 | 271 | return 0; |
28eb5f27 | 272 | } |
1da177e4 | 273 | |
1da177e4 | 274 | /* Hot-Plug Capable */ |
ff8e59bc | 275 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && |
1c531d82 | 276 | pcie_caps_reg(dev) & PCI_EXP_FLAGS_SLOT) { |
2dcfaf85 | 277 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); |
2bd50dd8 | 278 | if (reg32 & PCI_EXP_SLTCAP_HPC) { |
1da177e4 | 279 | services |= PCIE_PORT_SERVICE_HP; |
2bd50dd8 RW |
280 | /* |
281 | * Disable hot-plug interrupts in case they have been | |
282 | * enabled by the BIOS and the hot-plug service driver | |
283 | * is not loaded. | |
284 | */ | |
2dcfaf85 JL |
285 | pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, |
286 | PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); | |
2bd50dd8 | 287 | } |
1bf83e55 RW |
288 | } |
289 | /* AER capable */ | |
28eb5f27 | 290 | if ((cap_mask & PCIE_PORT_SERVICE_AER) |
2bd50dd8 | 291 | && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) { |
0927678f | 292 | services |= PCIE_PORT_SERVICE_AER; |
2bd50dd8 RW |
293 | /* |
294 | * Disable AER on this port in case it's been enabled by the | |
295 | * BIOS (the AER service driver will enable it when necessary). | |
296 | */ | |
297 | pci_disable_pcie_error_reporting(dev); | |
298 | } | |
1bf83e55 | 299 | /* VC support */ |
0927678f JB |
300 | if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC)) |
301 | services |= PCIE_PORT_SERVICE_VC; | |
9e5d0b16 | 302 | /* Root ports are capable of generating PME too */ |
28eb5f27 | 303 | if ((cap_mask & PCIE_PORT_SERVICE_PME) |
62f87c0e | 304 | && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) { |
9e5d0b16 | 305 | services |= PCIE_PORT_SERVICE_PME; |
2bd50dd8 RW |
306 | /* |
307 | * Disable PME interrupt on this port in case it's been enabled | |
308 | * by the BIOS (the PME service driver will enable it when | |
309 | * necessary). | |
310 | */ | |
311 | pcie_pme_interrupt_enable(dev, false); | |
312 | } | |
1da177e4 LT |
313 | |
314 | return services; | |
315 | } | |
316 | ||
facf6d16 | 317 | /** |
52a0f24b KK |
318 | * pcie_device_init - allocate and initialize PCI Express port service device |
319 | * @pdev: PCI Express port to associate the service device with | |
320 | * @service: Type of service to associate with the service device | |
facf6d16 | 321 | * @irq: Interrupt vector to associate with the service device |
facf6d16 | 322 | */ |
52a0f24b | 323 | static int pcie_device_init(struct pci_dev *pdev, int service, int irq) |
1da177e4 | 324 | { |
52a0f24b KK |
325 | int retval; |
326 | struct pcie_device *pcie; | |
1da177e4 LT |
327 | struct device *device; |
328 | ||
52a0f24b KK |
329 | pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); |
330 | if (!pcie) | |
331 | return -ENOMEM; | |
332 | pcie->port = pdev; | |
333 | pcie->irq = irq; | |
334 | pcie->service = service; | |
1da177e4 LT |
335 | |
336 | /* Initialize generic device interface */ | |
52a0f24b | 337 | device = &pcie->device; |
1da177e4 | 338 | device->bus = &pcie_port_bus_type; |
1da177e4 | 339 | device->release = release_pcie_device; /* callback to free pcie dev */ |
1a927133 | 340 | dev_set_name(device, "%s:pcie%02x", |
52a0f24b | 341 | pci_name(pdev), |
62f87c0e | 342 | get_descriptor_id(pci_pcie_type(pdev), service)); |
52a0f24b | 343 | device->parent = &pdev->dev; |
a1e4d72c | 344 | device_enable_async_suspend(device); |
52a0f24b KK |
345 | |
346 | retval = device_register(device); | |
8f3acca9 | 347 | if (retval) { |
f3986205 | 348 | put_device(device); |
8f3acca9 BH |
349 | return retval; |
350 | } | |
351 | ||
352 | get_device(device); | |
353 | return 0; | |
1da177e4 LT |
354 | } |
355 | ||
facf6d16 RW |
356 | /** |
357 | * pcie_port_device_register - register PCI Express port | |
358 | * @dev: PCI Express port to register | |
359 | * | |
360 | * Allocate the port extension structure and register services associated with | |
361 | * the port. | |
362 | */ | |
1da177e4 LT |
363 | int pcie_port_device_register(struct pci_dev *dev) |
364 | { | |
40717c39 | 365 | int status, capabilities, i, nr_service; |
dc535178 | 366 | int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; |
1da177e4 | 367 | |
1ce5e830 KK |
368 | /* Enable PCI Express port device */ |
369 | status = pci_enable_device(dev); | |
370 | if (status) | |
694f88ef | 371 | return status; |
fe31e697 RW |
372 | |
373 | /* Get and check PCI Express port services */ | |
374 | capabilities = get_port_device_capability(dev); | |
eca67315 | 375 | if (!capabilities) |
fe31e697 | 376 | return 0; |
fe31e697 | 377 | |
1ce5e830 | 378 | pci_set_master(dev); |
dc535178 KK |
379 | /* |
380 | * Initialize service irqs. Don't use service devices that | |
381 | * require interrupts if there is no way to generate them. | |
382 | */ | |
383 | status = init_service_irqs(dev, irqs, capabilities); | |
384 | if (status) { | |
385 | capabilities &= PCIE_PORT_SERVICE_VC; | |
386 | if (!capabilities) | |
1ce5e830 | 387 | goto error_disable; |
f118c0c3 | 388 | } |
1da177e4 LT |
389 | |
390 | /* Allocate child services if any */ | |
40717c39 KK |
391 | status = -ENODEV; |
392 | nr_service = 0; | |
393 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { | |
90e9cd50 | 394 | int service = 1 << i; |
90e9cd50 RW |
395 | if (!(capabilities & service)) |
396 | continue; | |
40717c39 KK |
397 | if (!pcie_device_init(dev, service, irqs[i])) |
398 | nr_service++; | |
f118c0c3 | 399 | } |
40717c39 | 400 | if (!nr_service) |
fbb5de70 | 401 | goto error_cleanup_irqs; |
40717c39 | 402 | |
1da177e4 | 403 | return 0; |
f118c0c3 | 404 | |
fbb5de70 KK |
405 | error_cleanup_irqs: |
406 | cleanup_service_irqs(dev); | |
1ce5e830 KK |
407 | error_disable: |
408 | pci_disable_device(dev); | |
f118c0c3 | 409 | return status; |
1da177e4 LT |
410 | } |
411 | ||
412 | #ifdef CONFIG_PM | |
d0e2b4a0 | 413 | static int suspend_iter(struct device *dev, void *data) |
1da177e4 | 414 | { |
1da177e4 | 415 | struct pcie_port_service_driver *service_driver; |
d0e2b4a0 | 416 | |
40da4186 HS |
417 | if ((dev->bus == &pcie_port_bus_type) && dev->driver) { |
418 | service_driver = to_service_driver(dev->driver); | |
419 | if (service_driver->suspend) | |
420 | service_driver->suspend(to_pcie_device(dev)); | |
421 | } | |
d0e2b4a0 | 422 | return 0; |
423 | } | |
1da177e4 | 424 | |
facf6d16 RW |
425 | /** |
426 | * pcie_port_device_suspend - suspend port services associated with a PCIe port | |
427 | * @dev: PCI Express port to handle | |
facf6d16 | 428 | */ |
3a3c244c | 429 | int pcie_port_device_suspend(struct device *dev) |
d0e2b4a0 | 430 | { |
3a3c244c | 431 | return device_for_each_child(dev, NULL, suspend_iter); |
1da177e4 LT |
432 | } |
433 | ||
d0e2b4a0 | 434 | static int resume_iter(struct device *dev, void *data) |
435 | { | |
1da177e4 LT |
436 | struct pcie_port_service_driver *service_driver; |
437 | ||
d0e2b4a0 | 438 | if ((dev->bus == &pcie_port_bus_type) && |
439 | (dev->driver)) { | |
440 | service_driver = to_service_driver(dev->driver); | |
441 | if (service_driver->resume) | |
442 | service_driver->resume(to_pcie_device(dev)); | |
1da177e4 | 443 | } |
d0e2b4a0 | 444 | return 0; |
445 | } | |
1da177e4 | 446 | |
facf6d16 RW |
447 | /** |
448 | * pcie_port_device_suspend - resume port services associated with a PCIe port | |
449 | * @dev: PCI Express port to handle | |
450 | */ | |
3a3c244c | 451 | int pcie_port_device_resume(struct device *dev) |
d0e2b4a0 | 452 | { |
3a3c244c | 453 | return device_for_each_child(dev, NULL, resume_iter); |
1da177e4 | 454 | } |
3a3c244c | 455 | #endif /* PM */ |
1da177e4 | 456 | |
d0e2b4a0 | 457 | static int remove_iter(struct device *dev, void *data) |
1da177e4 | 458 | { |
d0e2b4a0 | 459 | if (dev->bus == &pcie_port_bus_type) { |
ae40582e EB |
460 | put_device(dev); |
461 | device_unregister(dev); | |
1da177e4 | 462 | } |
d0e2b4a0 | 463 | return 0; |
464 | } | |
465 | ||
facf6d16 RW |
466 | /** |
467 | * pcie_port_device_remove - unregister PCI Express port service devices | |
468 | * @dev: PCI Express port the service devices to unregister are associated with | |
469 | * | |
470 | * Remove PCI Express port service devices associated with given port and | |
471 | * disable MSI-X or MSI for the port. | |
472 | */ | |
d0e2b4a0 | 473 | void pcie_port_device_remove(struct pci_dev *dev) |
474 | { | |
ae40582e | 475 | device_for_each_child(&dev->dev, NULL, remove_iter); |
fbb5de70 | 476 | cleanup_service_irqs(dev); |
dc535178 | 477 | pci_disable_device(dev); |
1da177e4 LT |
478 | } |
479 | ||
d9347371 RW |
480 | /** |
481 | * pcie_port_probe_service - probe driver for given PCI Express port service | |
482 | * @dev: PCI Express port service device to probe against | |
483 | * | |
484 | * If PCI Express port service driver is registered with | |
485 | * pcie_port_service_register(), this function will be called by the driver core | |
486 | * whenever match is found between the driver and a port service device. | |
487 | */ | |
fa6c9937 | 488 | static int pcie_port_probe_service(struct device *dev) |
1da177e4 | 489 | { |
fa6c9937 RW |
490 | struct pcie_device *pciedev; |
491 | struct pcie_port_service_driver *driver; | |
492 | int status; | |
493 | ||
494 | if (!dev || !dev->driver) | |
495 | return -ENODEV; | |
496 | ||
497 | driver = to_service_driver(dev->driver); | |
498 | if (!driver || !driver->probe) | |
499 | return -ENODEV; | |
500 | ||
501 | pciedev = to_pcie_device(dev); | |
0516c8bc | 502 | status = driver->probe(pciedev); |
8f3acca9 BH |
503 | if (status) |
504 | return status; | |
505 | ||
506 | dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n", driver->name); | |
507 | get_device(dev); | |
508 | return 0; | |
1da177e4 LT |
509 | } |
510 | ||
d9347371 RW |
511 | /** |
512 | * pcie_port_remove_service - detach driver from given PCI Express port service | |
513 | * @dev: PCI Express port service device to handle | |
514 | * | |
515 | * If PCI Express port service driver is registered with | |
516 | * pcie_port_service_register(), this function will be called by the driver core | |
517 | * when device_unregister() is called for the port service device associated | |
518 | * with the driver. | |
519 | */ | |
fa6c9937 | 520 | static int pcie_port_remove_service(struct device *dev) |
1da177e4 | 521 | { |
fa6c9937 RW |
522 | struct pcie_device *pciedev; |
523 | struct pcie_port_service_driver *driver; | |
524 | ||
525 | if (!dev || !dev->driver) | |
526 | return 0; | |
527 | ||
528 | pciedev = to_pcie_device(dev); | |
529 | driver = to_service_driver(dev->driver); | |
530 | if (driver && driver->remove) { | |
531 | dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n", | |
532 | driver->name); | |
533 | driver->remove(pciedev); | |
534 | put_device(dev); | |
535 | } | |
536 | return 0; | |
1da177e4 LT |
537 | } |
538 | ||
d9347371 RW |
539 | /** |
540 | * pcie_port_shutdown_service - shut down given PCI Express port service | |
541 | * @dev: PCI Express port service device to handle | |
542 | * | |
543 | * If PCI Express port service driver is registered with | |
544 | * pcie_port_service_register(), this function will be called by the driver core | |
545 | * when device_shutdown() is called for the port service device associated | |
546 | * with the driver. | |
547 | */ | |
fa6c9937 RW |
548 | static void pcie_port_shutdown_service(struct device *dev) {} |
549 | ||
d9347371 RW |
550 | /** |
551 | * pcie_port_service_register - register PCI Express port service driver | |
552 | * @new: PCI Express port service driver to register | |
553 | */ | |
1da177e4 LT |
554 | int pcie_port_service_register(struct pcie_port_service_driver *new) |
555 | { | |
79dd9182 RW |
556 | if (pcie_ports_disabled) |
557 | return -ENODEV; | |
558 | ||
1da177e4 LT |
559 | new->driver.name = (char *)new->name; |
560 | new->driver.bus = &pcie_port_bus_type; | |
561 | new->driver.probe = pcie_port_probe_service; | |
562 | new->driver.remove = pcie_port_remove_service; | |
563 | new->driver.shutdown = pcie_port_shutdown_service; | |
1da177e4 LT |
564 | |
565 | return driver_register(&new->driver); | |
d0e2b4a0 | 566 | } |
40da4186 | 567 | EXPORT_SYMBOL(pcie_port_service_register); |
1da177e4 | 568 | |
d9347371 RW |
569 | /** |
570 | * pcie_port_service_unregister - unregister PCI Express port service driver | |
571 | * @drv: PCI Express port service driver to unregister | |
572 | */ | |
fa6c9937 | 573 | void pcie_port_service_unregister(struct pcie_port_service_driver *drv) |
1da177e4 | 574 | { |
fa6c9937 | 575 | driver_unregister(&drv->driver); |
1da177e4 | 576 | } |
1da177e4 | 577 | EXPORT_SYMBOL(pcie_port_service_unregister); |