Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * File: portdrv_core.c | |
3 | * Purpose: PCI Express Port Bus Driver's Core Functions | |
4 | * | |
5 | * Copyright (C) 2004 Intel | |
6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
7 | */ | |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/pci.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/pm.h> | |
4e57b681 TS |
14 | #include <linux/string.h> |
15 | #include <linux/slab.h> | |
1da177e4 | 16 | #include <linux/pcieport_if.h> |
28eb5f27 | 17 | #include <linux/aer.h> |
1da177e4 | 18 | |
1bf83e55 | 19 | #include "../pci.h" |
1da177e4 LT |
20 | #include "portdrv.h" |
21 | ||
7570a333 MT |
22 | bool pciehp_msi_disabled; |
23 | ||
24 | static int __init pciehp_setup(char *str) | |
25 | { | |
26 | if (!strncmp(str, "nomsi", 5)) | |
27 | pciehp_msi_disabled = true; | |
28 | ||
29 | return 1; | |
30 | } | |
31 | __setup("pcie_hp=", pciehp_setup); | |
32 | ||
facf6d16 RW |
33 | /** |
34 | * release_pcie_device - free PCI Express port service device structure | |
35 | * @dev: Port service device to release | |
36 | * | |
37 | * Invoked automatically when device is being removed in response to | |
38 | * device_unregister(dev). Release all resources being claimed. | |
1da177e4 LT |
39 | */ |
40 | static void release_pcie_device(struct device *dev) | |
41 | { | |
40da4186 | 42 | kfree(to_pcie_device(dev)); |
1da177e4 LT |
43 | } |
44 | ||
b43d4513 RW |
45 | /** |
46 | * pcie_port_msix_add_entry - add entry to given array of MSI-X entries | |
47 | * @entries: Array of MSI-X entries | |
48 | * @new_entry: Index of the entry to add to the array | |
f7625980 | 49 | * @nr_entries: Number of entries already in the array |
b43d4513 RW |
50 | * |
51 | * Return value: Position of the added entry in the array | |
52 | */ | |
53 | static int pcie_port_msix_add_entry( | |
54 | struct msix_entry *entries, int new_entry, int nr_entries) | |
55 | { | |
56 | int j; | |
57 | ||
58 | for (j = 0; j < nr_entries; j++) | |
59 | if (entries[j].entry == new_entry) | |
60 | return j; | |
61 | ||
62 | entries[j].entry = new_entry; | |
63 | return j; | |
64 | } | |
65 | ||
66 | /** | |
67 | * pcie_port_enable_msix - try to set up MSI-X as interrupt mode for given port | |
68 | * @dev: PCI Express port to handle | |
69 | * @vectors: Array of interrupt vectors to populate | |
70 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() | |
71 | * | |
72 | * Return value: 0 on success, error code on failure | |
73 | */ | |
74 | static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask) | |
75 | { | |
76 | struct msix_entry *msix_entries; | |
77 | int idx[PCIE_PORT_DEVICE_MAXSERVICES]; | |
78 | int nr_entries, status, pos, i, nvec; | |
79 | u16 reg16; | |
80 | u32 reg32; | |
81 | ||
ff1aa430 AG |
82 | nr_entries = pci_msix_vec_count(dev); |
83 | if (nr_entries < 0) | |
84 | return nr_entries; | |
85 | BUG_ON(!nr_entries); | |
b43d4513 RW |
86 | if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES) |
87 | nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES; | |
88 | ||
89 | msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL); | |
90 | if (!msix_entries) | |
91 | return -ENOMEM; | |
92 | ||
93 | /* | |
94 | * Allocate as many entries as the port wants, so that we can check | |
95 | * which of them will be useful. Moreover, if nr_entries is correctly | |
96 | * equal to the number of entries this port actually uses, we'll happily | |
97 | * go through without any tricks. | |
98 | */ | |
99 | for (i = 0; i < nr_entries; i++) | |
100 | msix_entries[i].entry = i; | |
101 | ||
9ada07b1 | 102 | status = pci_enable_msix_exact(dev, msix_entries, nr_entries); |
b43d4513 RW |
103 | if (status) |
104 | goto Exit; | |
105 | ||
106 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) | |
107 | idx[i] = -1; | |
108 | status = -EIO; | |
109 | nvec = 0; | |
110 | ||
111 | if (mask & (PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP)) { | |
112 | int entry; | |
113 | ||
114 | /* | |
115 | * The code below follows the PCI Express Base Specification 2.0 | |
116 | * stating in Section 6.1.6 that "PME and Hot-Plug Event | |
117 | * interrupts (when both are implemented) always share the same | |
118 | * MSI or MSI-X vector, as indicated by the Interrupt Message | |
119 | * Number field in the PCI Express Capabilities register", where | |
120 | * according to Section 7.8.2 of the specification "For MSI-X, | |
121 | * the value in this field indicates which MSI-X Table entry is | |
122 | * used to generate the interrupt message." | |
123 | */ | |
33e8b34f | 124 | pcie_capability_read_word(dev, PCI_EXP_FLAGS, ®16); |
f9f45604 | 125 | entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9; |
b43d4513 RW |
126 | if (entry >= nr_entries) |
127 | goto Error; | |
128 | ||
129 | i = pcie_port_msix_add_entry(msix_entries, entry, nvec); | |
130 | if (i == nvec) | |
131 | nvec++; | |
132 | ||
133 | idx[PCIE_PORT_SERVICE_PME_SHIFT] = i; | |
134 | idx[PCIE_PORT_SERVICE_HP_SHIFT] = i; | |
135 | } | |
136 | ||
137 | if (mask & PCIE_PORT_SERVICE_AER) { | |
138 | int entry; | |
139 | ||
140 | /* | |
141 | * The code below follows Section 7.10.10 of the PCI Express | |
142 | * Base Specification 2.0 stating that bits 31-27 of the Root | |
143 | * Error Status Register contain a value indicating which of the | |
144 | * MSI/MSI-X vectors assigned to the port is going to be used | |
145 | * for AER, where "For MSI-X, the value in this register | |
146 | * indicates which MSI-X Table entry is used to generate the | |
147 | * interrupt message." | |
148 | */ | |
149 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | |
150 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); | |
151 | entry = reg32 >> 27; | |
152 | if (entry >= nr_entries) | |
153 | goto Error; | |
154 | ||
155 | i = pcie_port_msix_add_entry(msix_entries, entry, nvec); | |
156 | if (i == nvec) | |
157 | nvec++; | |
158 | ||
159 | idx[PCIE_PORT_SERVICE_AER_SHIFT] = i; | |
160 | } | |
161 | ||
162 | /* | |
163 | * If nvec is equal to the allocated number of entries, we can just use | |
164 | * what we have. Otherwise, the port has some extra entries not for the | |
165 | * services we know and we need to work around that. | |
166 | */ | |
167 | if (nvec == nr_entries) { | |
168 | status = 0; | |
169 | } else { | |
170 | /* Drop the temporary MSI-X setup */ | |
171 | pci_disable_msix(dev); | |
172 | ||
173 | /* Now allocate the MSI-X vectors for real */ | |
9ada07b1 | 174 | status = pci_enable_msix_exact(dev, msix_entries, nvec); |
b43d4513 RW |
175 | if (status) |
176 | goto Exit; | |
177 | } | |
178 | ||
179 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) | |
180 | vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1; | |
181 | ||
182 | Exit: | |
183 | kfree(msix_entries); | |
184 | return status; | |
185 | ||
186 | Error: | |
187 | pci_disable_msix(dev); | |
188 | goto Exit; | |
189 | } | |
190 | ||
facf6d16 | 191 | /** |
dc535178 | 192 | * init_service_irqs - initialize irqs for PCI Express port services |
facf6d16 | 193 | * @dev: PCI Express port to handle |
dc535178 | 194 | * @irqs: Array of irqs to populate |
facf6d16 RW |
195 | * @mask: Bitmask of port capabilities returned by get_port_device_capability() |
196 | * | |
197 | * Return value: Interrupt mode associated with the port | |
198 | */ | |
dc535178 | 199 | static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask) |
1da177e4 | 200 | { |
c39fae14 RW |
201 | int i, irq = -1; |
202 | ||
e237d83f SL |
203 | /* |
204 | * If MSI cannot be used for PCIe PME or hotplug, we have to use | |
205 | * INTx or other interrupts, e.g. system shared interrupt. | |
206 | */ | |
7570a333 MT |
207 | if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) || |
208 | ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) { | |
e237d83f | 209 | if (dev->irq) |
c39fae14 RW |
210 | irq = dev->irq; |
211 | goto no_msi; | |
212 | } | |
90e9cd50 | 213 | |
b43d4513 | 214 | /* Try to use MSI-X if supported */ |
dc535178 KK |
215 | if (!pcie_port_enable_msix(dev, irqs, mask)) |
216 | return 0; | |
c39fae14 | 217 | |
e237d83f SL |
218 | /* |
219 | * We're not going to use MSI-X, so try MSI and fall back to INTx. | |
220 | * If neither MSI/MSI-X nor INTx available, try other interrupt. On | |
221 | * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode. | |
222 | */ | |
223 | if (!pci_enable_msi(dev) || dev->irq) | |
dc535178 | 224 | irq = dev->irq; |
b43d4513 | 225 | |
c39fae14 | 226 | no_msi: |
b43d4513 | 227 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) |
dc535178 KK |
228 | irqs[i] = irq; |
229 | irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1; | |
1da177e4 | 230 | |
dc535178 KK |
231 | if (irq < 0) |
232 | return -ENODEV; | |
233 | return 0; | |
1da177e4 LT |
234 | } |
235 | ||
fbb5de70 KK |
236 | static void cleanup_service_irqs(struct pci_dev *dev) |
237 | { | |
238 | if (dev->msix_enabled) | |
239 | pci_disable_msix(dev); | |
240 | else if (dev->msi_enabled) | |
241 | pci_disable_msi(dev); | |
242 | } | |
243 | ||
facf6d16 RW |
244 | /** |
245 | * get_port_device_capability - discover capabilities of a PCI Express port | |
246 | * @dev: PCI Express port to examine | |
247 | * | |
248 | * The capabilities are read from the port's PCI Express configuration registers | |
249 | * as described in PCI Express Base Specification 1.0a sections 7.8.2, 7.8.9 and | |
250 | * 7.9 - 7.11. | |
251 | * | |
252 | * Return value: Bitmask of discovered port capabilities | |
253 | */ | |
1da177e4 LT |
254 | static int get_port_device_capability(struct pci_dev *dev) |
255 | { | |
2dcfaf85 | 256 | int services = 0; |
1267b3a3 | 257 | int cap_mask = 0; |
28eb5f27 RW |
258 | int err; |
259 | ||
fe31e697 RW |
260 | if (pcie_ports_disabled) |
261 | return 0; | |
262 | ||
6b87e700 AM |
263 | cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP |
264 | | PCIE_PORT_SERVICE_VC; | |
265 | if (pci_aer_available()) | |
266 | cap_mask |= PCIE_PORT_SERVICE_AER; | |
267 | ||
268 | if (pcie_ports_auto) { | |
269 | err = pcie_port_platform_notify(dev, &cap_mask); | |
270 | if (err) | |
fe31e697 | 271 | return 0; |
28eb5f27 | 272 | } |
1da177e4 | 273 | |
1da177e4 | 274 | /* Hot-Plug Capable */ |
f8415222 LW |
275 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && dev->is_hotplug_bridge) { |
276 | services |= PCIE_PORT_SERVICE_HP; | |
277 | /* | |
278 | * Disable hot-plug interrupts in case they have been enabled | |
279 | * by the BIOS and the hot-plug service driver is not loaded. | |
280 | */ | |
281 | pcie_capability_clear_word(dev, PCI_EXP_SLTCTL, | |
282 | PCI_EXP_SLTCTL_CCIE | PCI_EXP_SLTCTL_HPIE); | |
1bf83e55 RW |
283 | } |
284 | /* AER capable */ | |
28eb5f27 | 285 | if ((cap_mask & PCIE_PORT_SERVICE_AER) |
2bd50dd8 | 286 | && pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR)) { |
0927678f | 287 | services |= PCIE_PORT_SERVICE_AER; |
2bd50dd8 RW |
288 | /* |
289 | * Disable AER on this port in case it's been enabled by the | |
290 | * BIOS (the AER service driver will enable it when necessary). | |
291 | */ | |
292 | pci_disable_pcie_error_reporting(dev); | |
293 | } | |
1bf83e55 | 294 | /* VC support */ |
0927678f JB |
295 | if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_VC)) |
296 | services |= PCIE_PORT_SERVICE_VC; | |
9e5d0b16 | 297 | /* Root ports are capable of generating PME too */ |
28eb5f27 | 298 | if ((cap_mask & PCIE_PORT_SERVICE_PME) |
62f87c0e | 299 | && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) { |
9e5d0b16 | 300 | services |= PCIE_PORT_SERVICE_PME; |
2bd50dd8 RW |
301 | /* |
302 | * Disable PME interrupt on this port in case it's been enabled | |
303 | * by the BIOS (the PME service driver will enable it when | |
304 | * necessary). | |
305 | */ | |
306 | pcie_pme_interrupt_enable(dev, false); | |
307 | } | |
1da177e4 LT |
308 | |
309 | return services; | |
310 | } | |
311 | ||
facf6d16 | 312 | /** |
52a0f24b KK |
313 | * pcie_device_init - allocate and initialize PCI Express port service device |
314 | * @pdev: PCI Express port to associate the service device with | |
315 | * @service: Type of service to associate with the service device | |
facf6d16 | 316 | * @irq: Interrupt vector to associate with the service device |
facf6d16 | 317 | */ |
52a0f24b | 318 | static int pcie_device_init(struct pci_dev *pdev, int service, int irq) |
1da177e4 | 319 | { |
52a0f24b KK |
320 | int retval; |
321 | struct pcie_device *pcie; | |
1da177e4 LT |
322 | struct device *device; |
323 | ||
52a0f24b KK |
324 | pcie = kzalloc(sizeof(*pcie), GFP_KERNEL); |
325 | if (!pcie) | |
326 | return -ENOMEM; | |
327 | pcie->port = pdev; | |
328 | pcie->irq = irq; | |
329 | pcie->service = service; | |
1da177e4 LT |
330 | |
331 | /* Initialize generic device interface */ | |
52a0f24b | 332 | device = &pcie->device; |
1da177e4 | 333 | device->bus = &pcie_port_bus_type; |
1da177e4 | 334 | device->release = release_pcie_device; /* callback to free pcie dev */ |
1a927133 | 335 | dev_set_name(device, "%s:pcie%02x", |
52a0f24b | 336 | pci_name(pdev), |
62f87c0e | 337 | get_descriptor_id(pci_pcie_type(pdev), service)); |
52a0f24b | 338 | device->parent = &pdev->dev; |
a1e4d72c | 339 | device_enable_async_suspend(device); |
52a0f24b KK |
340 | |
341 | retval = device_register(device); | |
8f3acca9 | 342 | if (retval) { |
f3986205 | 343 | put_device(device); |
8f3acca9 BH |
344 | return retval; |
345 | } | |
346 | ||
8f3acca9 | 347 | return 0; |
1da177e4 LT |
348 | } |
349 | ||
facf6d16 RW |
350 | /** |
351 | * pcie_port_device_register - register PCI Express port | |
352 | * @dev: PCI Express port to register | |
353 | * | |
354 | * Allocate the port extension structure and register services associated with | |
355 | * the port. | |
356 | */ | |
1da177e4 LT |
357 | int pcie_port_device_register(struct pci_dev *dev) |
358 | { | |
40717c39 | 359 | int status, capabilities, i, nr_service; |
dc535178 | 360 | int irqs[PCIE_PORT_DEVICE_MAXSERVICES]; |
1da177e4 | 361 | |
1ce5e830 KK |
362 | /* Enable PCI Express port device */ |
363 | status = pci_enable_device(dev); | |
364 | if (status) | |
694f88ef | 365 | return status; |
fe31e697 RW |
366 | |
367 | /* Get and check PCI Express port services */ | |
368 | capabilities = get_port_device_capability(dev); | |
eca67315 | 369 | if (!capabilities) |
fe31e697 | 370 | return 0; |
fe31e697 | 371 | |
1ce5e830 | 372 | pci_set_master(dev); |
dc535178 KK |
373 | /* |
374 | * Initialize service irqs. Don't use service devices that | |
375 | * require interrupts if there is no way to generate them. | |
374a9140 RJ |
376 | * However, some drivers may have a polling mode (e.g. pciehp_poll_mode) |
377 | * that can be used in the absence of irqs. Allow them to determine | |
378 | * if that is to be used. | |
dc535178 KK |
379 | */ |
380 | status = init_service_irqs(dev, irqs, capabilities); | |
381 | if (status) { | |
374a9140 | 382 | capabilities &= PCIE_PORT_SERVICE_VC | PCIE_PORT_SERVICE_HP; |
dc535178 | 383 | if (!capabilities) |
1ce5e830 | 384 | goto error_disable; |
f118c0c3 | 385 | } |
1da177e4 LT |
386 | |
387 | /* Allocate child services if any */ | |
40717c39 KK |
388 | status = -ENODEV; |
389 | nr_service = 0; | |
390 | for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) { | |
90e9cd50 | 391 | int service = 1 << i; |
90e9cd50 RW |
392 | if (!(capabilities & service)) |
393 | continue; | |
40717c39 KK |
394 | if (!pcie_device_init(dev, service, irqs[i])) |
395 | nr_service++; | |
f118c0c3 | 396 | } |
40717c39 | 397 | if (!nr_service) |
fbb5de70 | 398 | goto error_cleanup_irqs; |
40717c39 | 399 | |
1da177e4 | 400 | return 0; |
f118c0c3 | 401 | |
fbb5de70 KK |
402 | error_cleanup_irqs: |
403 | cleanup_service_irqs(dev); | |
1ce5e830 KK |
404 | error_disable: |
405 | pci_disable_device(dev); | |
f118c0c3 | 406 | return status; |
1da177e4 LT |
407 | } |
408 | ||
409 | #ifdef CONFIG_PM | |
d0e2b4a0 | 410 | static int suspend_iter(struct device *dev, void *data) |
1da177e4 | 411 | { |
1da177e4 | 412 | struct pcie_port_service_driver *service_driver; |
d0e2b4a0 | 413 | |
40da4186 HS |
414 | if ((dev->bus == &pcie_port_bus_type) && dev->driver) { |
415 | service_driver = to_service_driver(dev->driver); | |
416 | if (service_driver->suspend) | |
417 | service_driver->suspend(to_pcie_device(dev)); | |
418 | } | |
d0e2b4a0 | 419 | return 0; |
420 | } | |
1da177e4 | 421 | |
facf6d16 RW |
422 | /** |
423 | * pcie_port_device_suspend - suspend port services associated with a PCIe port | |
424 | * @dev: PCI Express port to handle | |
facf6d16 | 425 | */ |
3a3c244c | 426 | int pcie_port_device_suspend(struct device *dev) |
d0e2b4a0 | 427 | { |
3a3c244c | 428 | return device_for_each_child(dev, NULL, suspend_iter); |
1da177e4 LT |
429 | } |
430 | ||
d0e2b4a0 | 431 | static int resume_iter(struct device *dev, void *data) |
432 | { | |
1da177e4 LT |
433 | struct pcie_port_service_driver *service_driver; |
434 | ||
d0e2b4a0 | 435 | if ((dev->bus == &pcie_port_bus_type) && |
436 | (dev->driver)) { | |
437 | service_driver = to_service_driver(dev->driver); | |
438 | if (service_driver->resume) | |
439 | service_driver->resume(to_pcie_device(dev)); | |
1da177e4 | 440 | } |
d0e2b4a0 | 441 | return 0; |
442 | } | |
1da177e4 | 443 | |
facf6d16 | 444 | /** |
e7f6c6d0 | 445 | * pcie_port_device_resume - resume port services associated with a PCIe port |
facf6d16 RW |
446 | * @dev: PCI Express port to handle |
447 | */ | |
3a3c244c | 448 | int pcie_port_device_resume(struct device *dev) |
d0e2b4a0 | 449 | { |
3a3c244c | 450 | return device_for_each_child(dev, NULL, resume_iter); |
1da177e4 | 451 | } |
3a3c244c | 452 | #endif /* PM */ |
1da177e4 | 453 | |
d0e2b4a0 | 454 | static int remove_iter(struct device *dev, void *data) |
1da177e4 | 455 | { |
e75f34ce | 456 | if (dev->bus == &pcie_port_bus_type) |
ae40582e | 457 | device_unregister(dev); |
d0e2b4a0 | 458 | return 0; |
459 | } | |
460 | ||
facf6d16 RW |
461 | /** |
462 | * pcie_port_device_remove - unregister PCI Express port service devices | |
463 | * @dev: PCI Express port the service devices to unregister are associated with | |
464 | * | |
465 | * Remove PCI Express port service devices associated with given port and | |
466 | * disable MSI-X or MSI for the port. | |
467 | */ | |
d0e2b4a0 | 468 | void pcie_port_device_remove(struct pci_dev *dev) |
469 | { | |
ae40582e | 470 | device_for_each_child(&dev->dev, NULL, remove_iter); |
fbb5de70 | 471 | cleanup_service_irqs(dev); |
dc535178 | 472 | pci_disable_device(dev); |
1da177e4 LT |
473 | } |
474 | ||
d9347371 RW |
475 | /** |
476 | * pcie_port_probe_service - probe driver for given PCI Express port service | |
477 | * @dev: PCI Express port service device to probe against | |
478 | * | |
479 | * If PCI Express port service driver is registered with | |
480 | * pcie_port_service_register(), this function will be called by the driver core | |
481 | * whenever match is found between the driver and a port service device. | |
482 | */ | |
fa6c9937 | 483 | static int pcie_port_probe_service(struct device *dev) |
1da177e4 | 484 | { |
fa6c9937 RW |
485 | struct pcie_device *pciedev; |
486 | struct pcie_port_service_driver *driver; | |
487 | int status; | |
488 | ||
489 | if (!dev || !dev->driver) | |
490 | return -ENODEV; | |
491 | ||
492 | driver = to_service_driver(dev->driver); | |
493 | if (!driver || !driver->probe) | |
494 | return -ENODEV; | |
495 | ||
496 | pciedev = to_pcie_device(dev); | |
0516c8bc | 497 | status = driver->probe(pciedev); |
8f3acca9 BH |
498 | if (status) |
499 | return status; | |
500 | ||
501 | dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n", driver->name); | |
502 | get_device(dev); | |
503 | return 0; | |
1da177e4 LT |
504 | } |
505 | ||
d9347371 RW |
506 | /** |
507 | * pcie_port_remove_service - detach driver from given PCI Express port service | |
508 | * @dev: PCI Express port service device to handle | |
509 | * | |
510 | * If PCI Express port service driver is registered with | |
511 | * pcie_port_service_register(), this function will be called by the driver core | |
512 | * when device_unregister() is called for the port service device associated | |
513 | * with the driver. | |
514 | */ | |
fa6c9937 | 515 | static int pcie_port_remove_service(struct device *dev) |
1da177e4 | 516 | { |
fa6c9937 RW |
517 | struct pcie_device *pciedev; |
518 | struct pcie_port_service_driver *driver; | |
519 | ||
520 | if (!dev || !dev->driver) | |
521 | return 0; | |
522 | ||
523 | pciedev = to_pcie_device(dev); | |
524 | driver = to_service_driver(dev->driver); | |
525 | if (driver && driver->remove) { | |
526 | dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n", | |
527 | driver->name); | |
528 | driver->remove(pciedev); | |
529 | put_device(dev); | |
530 | } | |
531 | return 0; | |
1da177e4 LT |
532 | } |
533 | ||
d9347371 RW |
534 | /** |
535 | * pcie_port_shutdown_service - shut down given PCI Express port service | |
536 | * @dev: PCI Express port service device to handle | |
537 | * | |
538 | * If PCI Express port service driver is registered with | |
539 | * pcie_port_service_register(), this function will be called by the driver core | |
540 | * when device_shutdown() is called for the port service device associated | |
541 | * with the driver. | |
542 | */ | |
fa6c9937 RW |
543 | static void pcie_port_shutdown_service(struct device *dev) {} |
544 | ||
d9347371 RW |
545 | /** |
546 | * pcie_port_service_register - register PCI Express port service driver | |
547 | * @new: PCI Express port service driver to register | |
548 | */ | |
1da177e4 LT |
549 | int pcie_port_service_register(struct pcie_port_service_driver *new) |
550 | { | |
79dd9182 RW |
551 | if (pcie_ports_disabled) |
552 | return -ENODEV; | |
553 | ||
6f825b73 | 554 | new->driver.name = new->name; |
1da177e4 LT |
555 | new->driver.bus = &pcie_port_bus_type; |
556 | new->driver.probe = pcie_port_probe_service; | |
557 | new->driver.remove = pcie_port_remove_service; | |
558 | new->driver.shutdown = pcie_port_shutdown_service; | |
1da177e4 LT |
559 | |
560 | return driver_register(&new->driver); | |
d0e2b4a0 | 561 | } |
40da4186 | 562 | EXPORT_SYMBOL(pcie_port_service_register); |
1da177e4 | 563 | |
d9347371 RW |
564 | /** |
565 | * pcie_port_service_unregister - unregister PCI Express port service driver | |
566 | * @drv: PCI Express port service driver to unregister | |
567 | */ | |
fa6c9937 | 568 | void pcie_port_service_unregister(struct pcie_port_service_driver *drv) |
1da177e4 | 569 | { |
fa6c9937 | 570 | driver_unregister(&drv->driver); |
1da177e4 | 571 | } |
1da177e4 | 572 | EXPORT_SYMBOL(pcie_port_service_unregister); |