[deliverable/linux.git] / drivers / pci / pcie / portdrv_pci.c

/*
 * File:	portdrv_pci.c
 * Purpose:	PCI Express Port Bus Driver
 *
 * Copyright (C) 2004 Intel
 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/init.h>
#include <linux/pcieport_if.h>
#include <linux/aer.h>
#include <linux/dmi.h>
#include <linux/pci-aspm.h>

#include "portdrv.h"
#include "aer/aerdrv.h"

/*
 * Version Information
 */
#define DRIVER_VERSION "v1.0"
#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
#define DRIVER_DESC "PCIe Port Bus Driver"
MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");

/* If this switch is set, PCIe port native services should not be enabled. */
bool pcie_ports_disabled;

/*
 * If this switch is set, ACPI _OSC will be used to determine whether or not to
 * enable PCIe port native services.
 */
bool pcie_ports_auto = true;

static int __init pcie_port_setup(char *str)
{
	if (!strncmp(str, "compat", 6)) {
		pcie_ports_disabled = true;
	} else if (!strncmp(str, "native", 6)) {
		pcie_ports_disabled = false;
		pcie_ports_auto = false;
	} else if (!strncmp(str, "auto", 4)) {
		pcie_ports_disabled = false;
		pcie_ports_auto = true;
	}

	return 1;
}
__setup("pcie_ports=", pcie_port_setup);

/* global data */

/**
 * pcie_clear_root_pme_status - Clear root port PME interrupt status.
 * @dev: PCIe root port or event collector.
 */
void pcie_clear_root_pme_status(struct pci_dev *dev)
{
	int rtsta_pos;
	u32 rtsta;

	rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;

	pci_read_config_dword(dev, rtsta_pos, &rtsta);
	rtsta |= PCI_EXP_RTSTA_PME;
	pci_write_config_dword(dev, rtsta_pos, rtsta);
}

static int pcie_portdrv_restore_config(struct pci_dev *dev)
{
	int retval;

	retval = pci_enable_device(dev);
	if (retval)
		return retval;
	pci_set_master(dev);
	return 0;
}

#ifdef CONFIG_PM
static int pcie_port_resume_noirq(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);

	/*
	 * Some BIOSes forget to clear Root PME Status bits after system wakeup
	 * which breaks ACPI-based runtime wakeup on PCI Express, so clear those
	 * bits now just in case (shouldn't hurt).
	 */
	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
		pcie_clear_root_pme_status(pdev);
	return 0;
}

#ifdef CONFIG_PM_RUNTIME
struct d3cold_info {
	bool no_d3cold;
	unsigned int d3cold_delay;
};

static int pci_dev_d3cold_info(struct pci_dev *pdev, void *data)
{
	struct d3cold_info *info = data;

	info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
				   info->d3cold_delay);
	if (pdev->no_d3cold)
		info->no_d3cold = true;
	return 0;
}

static int pcie_port_runtime_suspend(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct d3cold_info d3cold_info = {
		.no_d3cold	= false,
		.d3cold_delay	= PCI_PM_D3_WAIT,
	};

	/*
	 * If any subordinate device disable D3cold, we should not put
	 * the port into D3cold.  The D3cold delay of port should be
	 * the max of that of all subordinate devices.
	 */
	pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
	pdev->no_d3cold = d3cold_info.no_d3cold;
	pdev->d3cold_delay = d3cold_info.d3cold_delay;
	return 0;
}

static int pcie_port_runtime_resume(struct device *dev)
{
	return 0;
}
#else
#define pcie_port_runtime_suspend	NULL
#define pcie_port_runtime_resume	NULL
#endif

static const struct dev_pm_ops pcie_portdrv_pm_ops = {
	.suspend	= pcie_port_device_suspend,
	.resume		= pcie_port_device_resume,
	.freeze		= pcie_port_device_suspend,
	.thaw		= pcie_port_device_resume,
	.poweroff	= pcie_port_device_suspend,
	.restore	= pcie_port_device_resume,
	.resume_noirq	= pcie_port_resume_noirq,
	.runtime_suspend = pcie_port_runtime_suspend,
	.runtime_resume = pcie_port_runtime_resume,
};

#define PCIE_PORTDRV_PM_OPS	(&pcie_portdrv_pm_ops)

#else /* !PM */

#define PCIE_PORTDRV_PM_OPS	NULL
#endif /* !PM */

/*
 * PCIe port runtime suspend is broken for some chipsets, so use a
 * black list to disable runtime PM for these chipsets.
 */
static const struct pci_device_id port_runtime_pm_black_list[] = {
	{ /* end: all zeroes */ }
};

/*
 * pcie_portdrv_probe - Probe PCI-Express port devices
 * @dev: PCI-Express port device being probed
 *
 * If detected invokes the pcie_port_device_register() method for
 * this port device.
 *
 */
static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
					const struct pci_device_id *id)
{
	int status;

	if (!pci_is_pcie(dev) ||
	    ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
	     (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
	     (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
		return -ENODEV;

	if (!dev->irq && dev->pin) {
		dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
			 "check vendor BIOS\n", dev->vendor, dev->device);
	}
	status = pcie_port_device_register(dev);
	if (status)
		return status;

	pci_save_state(dev);
	if (!pci_match_id(port_runtime_pm_black_list, dev))
		pm_runtime_put_noidle(&dev->dev);

	return 0;
}

static void pcie_portdrv_remove(struct pci_dev *dev)
{
	if (!pci_match_id(port_runtime_pm_black_list, dev))
		pm_runtime_get_noresume(&dev->dev);
	pcie_port_device_remove(dev);
	pci_disable_device(dev);
}

static int error_detected_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	struct aer_broadcast_data *result_data;
	pci_ers_result_t status;

	result_data = (struct aer_broadcast_data *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (!driver ||
			!driver->err_handler ||
			!driver->err_handler->error_detected)
			return 0;

		pcie_device = to_pcie_device(device);

		/* Forward error detected message to service drivers */
		status = driver->err_handler->error_detected(
			pcie_device->port,
			result_data->state);
		result_data->result =
			merge_result(result_data->result, status);
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
					enum pci_channel_state error)
{
	struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
	int ret;

	/* can not fail */
	ret = device_for_each_child(&dev->dev, &data, error_detected_iter);

	return data.result;
}

static int mmio_enabled_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	pci_ers_result_t status, *result;

	result = (pci_ers_result_t *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->mmio_enabled) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			status = driver->err_handler->mmio_enabled(
					pcie_device->port);
			*result = merge_result(*result, status);
		}
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
{
	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
	int retval;

	/* get true return value from &status */
	retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
	return status;
}

static int slot_reset_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;
	pci_ers_result_t status, *result;

	result = (pci_ers_result_t *) data;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->slot_reset) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			status = driver->err_handler->slot_reset(
					pcie_device->port);
			*result = merge_result(*result, status);
		}
	}

	return 0;
}

static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
{
	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
	int retval;

	/* If fatal, restore cfg space for possible link reset at upstream */
	if (dev->error_state == pci_channel_io_frozen) {
		dev->state_saved = true;
		pci_restore_state(dev);
		pcie_portdrv_restore_config(dev);
		pci_enable_pcie_error_reporting(dev);
	}

	/* get true return value from &status */
	retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);

	return status;
}

static int resume_iter(struct device *device, void *data)
{
	struct pcie_device *pcie_device;
	struct pcie_port_service_driver *driver;

	if (device->bus == &pcie_port_bus_type && device->driver) {
		driver = to_service_driver(device->driver);
		if (driver &&
			driver->err_handler &&
			driver->err_handler->resume) {
			pcie_device = to_pcie_device(device);

			/* Forward error message to service drivers */
			driver->err_handler->resume(pcie_device->port);
		}
	}

	return 0;
}

static void pcie_portdrv_err_resume(struct pci_dev *dev)
{
	int retval;
	/* nothing to do with error value, if it ever happens */
	retval = device_for_each_child(&dev->dev, NULL, resume_iter);
}

/*
 * LINUX Device Driver Model
 */
static const struct pci_device_id port_pci_ids[] = { {
	/* handle any PCI-Express port */
	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0),
	}, { /* end: all zeroes */ }
};
MODULE_DEVICE_TABLE(pci, port_pci_ids);

static struct pci_error_handlers pcie_portdrv_err_handler = {
		.error_detected = pcie_portdrv_error_detected,
		.mmio_enabled = pcie_portdrv_mmio_enabled,
		.slot_reset = pcie_portdrv_slot_reset,
		.resume = pcie_portdrv_err_resume,
};

static struct pci_driver pcie_portdriver = {
	.name		= "pcieport",
	.id_table	= &port_pci_ids[0],

	.probe		= pcie_portdrv_probe,
	.remove		= pcie_portdrv_remove,

	.err_handler 	= &pcie_portdrv_err_handler,

	.driver.pm 	= PCIE_PORTDRV_PM_OPS,
};

static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
{
	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
			d->ident);
	pcie_pme_disable_msi();
	return 0;
}

static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
	/*
	 * Boxes that should not use MSI for PCIe PME signaling.
	 */
	{
	 .callback = dmi_pcie_pme_disable_msi,
	 .ident = "MSI Wind U-100",
	 .matches = {
		     DMI_MATCH(DMI_SYS_VENDOR,
		     		"MICRO-STAR INTERNATIONAL CO., LTD"),
		     DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
		     },
	 },
	 {}
};

static int __init pcie_portdrv_init(void)
{
	int retval;

	if (pcie_ports_disabled)
		return pci_register_driver(&pcie_portdriver);

	dmi_check_system(pcie_portdrv_dmi_table);

	retval = pcie_port_bus_register();
	if (retval) {
		printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
		goto out;
	}
	retval = pci_register_driver(&pcie_portdriver);
	if (retval)
		pcie_port_bus_unregister();
 out:
	return retval;
}

module_init(pcie_portdrv_init);
Commit	Line	Data
1da177e4 LT	1	/*
	2	* File: portdrv_pci.c
	3	* Purpose: PCI Express Port Bus Driver
	4	*
	5	* Copyright (C) 2004 Intel
	6	* Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
	7	*/
	8
	9	#include <linux/module.h>
	10	#include <linux/pci.h>
	11	#include <linux/kernel.h>
	12	#include <linux/errno.h>
	13	#include <linux/pm.h>
71a83bd7	14	#include <linux/pm_runtime.h>
1da177e4 LT	15	#include <linux/init.h>
1da177e4 LT	16	#include <linux/pcieport_if.h>
4bf3392e	17	#include <linux/aer.h>
c39fae14	18	#include <linux/dmi.h>
28eb5f27	19	#include <linux/pci-aspm.h>
1da177e4 LT	20
1da177e4 LT	21	#include "portdrv.h"
4bf3392e	22	#include "aer/aerdrv.h"
1da177e4 LT	23
	24	/*
	25	* Version Information
	26	*/
	27	#define DRIVER_VERSION "v1.0"
	28	#define DRIVER_AUTHOR "tom.l.nguyen@intel.com"
7e8af37a	29	#define DRIVER_DESC "PCIe Port Bus Driver"
1da177e4 LT	30	MODULE_AUTHOR(DRIVER_AUTHOR);
	31	MODULE_DESCRIPTION(DRIVER_DESC);
	32	MODULE_LICENSE("GPL");
	33
79dd9182 RW	34	/* If this switch is set, PCIe port native services should not be enabled. */
	35	bool pcie_ports_disabled;
	36
28eb5f27 RW	37	/*
	38	* If this switch is set, ACPI _OSC will be used to determine whether or not to
	39	* enable PCIe port native services.
	40	*/
	41	bool pcie_ports_auto = true;
	42
79dd9182 RW	43	static int __init pcie_port_setup(char *str)
79dd9182 RW	44	{
28eb5f27	45	if (!strncmp(str, "compat", 6)) {
79dd9182	46	pcie_ports_disabled = true;
28eb5f27 RW	47	} else if (!strncmp(str, "native", 6)) {
	48	pcie_ports_disabled = false;
	49	pcie_ports_auto = false;
	50	} else if (!strncmp(str, "auto", 4)) {
	51	pcie_ports_disabled = false;
	52	pcie_ports_auto = true;
	53	}
79dd9182 RW	54
	55	return 1;
	56	}
	57	__setup("pcie_ports=", pcie_port_setup);
	58
1da177e4	59	/* global data */
1da177e4	60
fe31e697 RW	61	/**
	62	* pcie_clear_root_pme_status - Clear root port PME interrupt status.
	63	* @dev: PCIe root port or event collector.
	64	*/
	65	void pcie_clear_root_pme_status(struct pci_dev *dev)
	66	{
	67	int rtsta_pos;
	68	u32 rtsta;
	69
	70	rtsta_pos = pci_pcie_cap(dev) + PCI_EXP_RTSTA;
	71
	72	pci_read_config_dword(dev, rtsta_pos, &rtsta);
	73	rtsta \|= PCI_EXP_RTSTA_PME;
	74	pci_write_config_dword(dev, rtsta_pos, rtsta);
	75	}
	76
4bf3392e ZY	77	static int pcie_portdrv_restore_config(struct pci_dev *dev)
	78	{
	79	int retval;
	80
4bf3392e ZY	81	retval = pci_enable_device(dev);
	82	if (retval)
	83	return retval;
	84	pci_set_master(dev);
	85	return 0;
	86	}
	87
0bed208e	88	#ifdef CONFIG_PM
fe31e697 RW	89	static int pcie_port_resume_noirq(struct device *dev)
	90	{
	91	struct pci_dev *pdev = to_pci_dev(dev);
	92
	93	/*
	94	* Some BIOSes forget to clear Root PME Status bits after system wakeup
	95	* which breaks ACPI-based runtime wakeup on PCI Express, so clear those
	96	* bits now just in case (shouldn't hurt).
	97	*/
62f87c0e	98	if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT)
fe31e697 RW	99	pcie_clear_root_pme_status(pdev);
	100	return 0;
	101	}
	102
71a83bd7	103	#ifdef CONFIG_PM_RUNTIME
448bd857 HY	104	struct d3cold_info {
	105	bool no_d3cold;
	106	unsigned int d3cold_delay;
	107	};
	108
	109	static int pci_dev_d3cold_info(struct pci_dev pdev, void data)
	110	{
	111	struct d3cold_info *info = data;
	112
	113	info->d3cold_delay = max_t(unsigned int, pdev->d3cold_delay,
	114	info->d3cold_delay);
	115	if (pdev->no_d3cold)
	116	info->no_d3cold = true;
	117	return 0;
	118	}
	119
	120	static int pcie_port_runtime_suspend(struct device *dev)
	121	{
	122	struct pci_dev *pdev = to_pci_dev(dev);
	123	struct d3cold_info d3cold_info = {
	124	.no_d3cold = false,
	125	.d3cold_delay = PCI_PM_D3_WAIT,
	126	};
	127
	128	/*
	129	* If any subordinate device disable D3cold, we should not put
	130	* the port into D3cold. The D3cold delay of port should be
	131	* the max of that of all subordinate devices.
	132	*/
	133	pci_walk_bus(pdev->subordinate, pci_dev_d3cold_info, &d3cold_info);
	134	pdev->no_d3cold = d3cold_info.no_d3cold;
	135	pdev->d3cold_delay = d3cold_info.d3cold_delay;
	136	return 0;
	137	}
	138
	139	static int pcie_port_runtime_resume(struct device *dev)
71a83bd7 ZY	140	{
	141	return 0;
	142	}
	143	#else
448bd857 HY	144	#define pcie_port_runtime_suspend NULL
448bd857 HY	145	#define pcie_port_runtime_resume NULL
71a83bd7 ZY	146	#endif
71a83bd7 ZY	147
47145210	148	static const struct dev_pm_ops pcie_portdrv_pm_ops = {
3a3c244c RW	149	.suspend = pcie_port_device_suspend,
	150	.resume = pcie_port_device_resume,
	151	.freeze = pcie_port_device_suspend,
	152	.thaw = pcie_port_device_resume,
	153	.poweroff = pcie_port_device_suspend,
	154	.restore = pcie_port_device_resume,
fe31e697	155	.resume_noirq = pcie_port_resume_noirq,
448bd857 HY	156	.runtime_suspend = pcie_port_runtime_suspend,
448bd857 HY	157	.runtime_resume = pcie_port_runtime_resume,
3a3c244c	158	};
4bf3392e	159
3a3c244c	160	#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)
a79d682f	161
3a3c244c RW	162	#else /* !PM */
	163
	164	#define PCIE_PORTDRV_PM_OPS NULL
	165	#endif /* !PM */
4bf3392e	166
71a83bd7 ZY	167	/*
	168	* PCIe port runtime suspend is broken for some chipsets, so use a
	169	* black list to disable runtime PM for these chipsets.
	170	*/
	171	static const struct pci_device_id port_runtime_pm_black_list[] = {
	172	{ /* end: all zeroes */ }
	173	};
	174
1da177e4 LT	175	/*
	176	* pcie_portdrv_probe - Probe PCI-Express port devices
	177	* @dev: PCI-Express port device being probed
	178	*
40da4186	179	* If detected invokes the pcie_port_device_register() method for
1da177e4 LT	180	* this port device.
	181	*
	182	*/
898294c9 KK	183	static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
898294c9 KK	184	const struct pci_device_id *id)
1da177e4	185	{
898294c9	186	int status;
1da177e4	187
898294c9	188	if (!pci_is_pcie(dev) \|\|
62f87c0e YW	189	((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) &&
	190	(pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) &&
	191	(pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM)))
898294c9	192	return -ENODEV;
1da177e4	193
40da4186	194	if (!dev->irq && dev->pin) {
34a2e15e	195	dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
34438ba6	196	"check vendor BIOS\n", dev->vendor, dev->device);
1da177e4	197	}
f118c0c3 RW	198	status = pcie_port_device_register(dev);
	199	if (status)
	200	return status;
1da177e4	201
87d2e2ec	202	pci_save_state(dev);
71a83bd7 ZY	203	if (!pci_match_id(port_runtime_pm_black_list, dev))
71a83bd7 ZY	204	pm_runtime_put_noidle(&dev->dev);
4bf3392e	205
1da177e4 LT	206	return 0;
	207	}
	208
40da4186	209	static void pcie_portdrv_remove(struct pci_dev *dev)
1da177e4	210	{
71a83bd7 ZY	211	if (!pci_match_id(port_runtime_pm_black_list, dev))
71a83bd7 ZY	212	pm_runtime_get_noresume(&dev->dev);
1da177e4	213	pcie_port_device_remove(dev);
d8998719	214	pci_disable_device(dev);
1da177e4 LT	215	}
1da177e4 LT	216
4bf3392e	217	static int error_detected_iter(struct device device, void data)
60854838	218	{
4bf3392e ZY	219	struct pcie_device *pcie_device;
	220	struct pcie_port_service_driver *driver;
	221	struct aer_broadcast_data *result_data;
	222	pci_ers_result_t status;
	223
	224	result_data = (struct aer_broadcast_data *) data;
	225
	226	if (device->bus == &pcie_port_bus_type && device->driver) {
	227	driver = to_service_driver(device->driver);
	228	if (!driver \|\|
	229	!driver->err_handler \|\|
	230	!driver->err_handler->error_detected)
	231	return 0;
	232
	233	pcie_device = to_pcie_device(device);
	234
	235	/* Forward error detected message to service drivers */
	236	status = driver->err_handler->error_detected(
	237	pcie_device->port,
	238	result_data->state);
	239	result_data->result =
	240	merge_result(result_data->result, status);
	241	}
	242
	243	return 0;
60854838 HK	244	}
60854838 HK	245
4bf3392e ZY	246	static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
4bf3392e ZY	247	enum pci_channel_state error)
60854838	248	{
40da4186 HS	249	struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
40da4186 HS	250	int ret;
4bf3392e	251
b19441af	252	/* can not fail */
40da4186	253	ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
4bf3392e	254
40da4186	255	return data.result;
4bf3392e ZY	256	}
	257
	258	static int mmio_enabled_iter(struct device device, void data)
	259	{
	260	struct pcie_device *pcie_device;
	261	struct pcie_port_service_driver *driver;
	262	pci_ers_result_t status, *result;
	263
	264	result = (pci_ers_result_t *) data;
	265
	266	if (device->bus == &pcie_port_bus_type && device->driver) {
	267	driver = to_service_driver(device->driver);
	268	if (driver &&
	269	driver->err_handler &&
	270	driver->err_handler->mmio_enabled) {
	271	pcie_device = to_pcie_device(device);
	272
	273	/* Forward error message to service drivers */
	274	status = driver->err_handler->mmio_enabled(
	275	pcie_device->port);
	276	result = merge_result(result, status);
	277	}
	278	}
60854838	279
60854838 HK	280	return 0;
	281	}
	282
4bf3392e	283	static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev)
1da177e4	284	{
4bf3392e	285	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
b19441af	286	int retval;
5823d100	287
b19441af GKH	288	/* get true return value from &status */
b19441af GKH	289	retval = device_for_each_child(&dev->dev, &status, mmio_enabled_iter);
4bf3392e	290	return status;
1da177e4 LT	291	}
1da177e4 LT	292
4bf3392e	293	static int slot_reset_iter(struct device device, void data)
1da177e4	294	{
4bf3392e ZY	295	struct pcie_device *pcie_device;
	296	struct pcie_port_service_driver *driver;
	297	pci_ers_result_t status, *result;
	298
	299	result = (pci_ers_result_t *) data;
	300
	301	if (device->bus == &pcie_port_bus_type && device->driver) {
	302	driver = to_service_driver(device->driver);
	303	if (driver &&
	304	driver->err_handler &&
	305	driver->err_handler->slot_reset) {
	306	pcie_device = to_pcie_device(device);
	307
	308	/* Forward error message to service drivers */
	309	status = driver->err_handler->slot_reset(
	310	pcie_device->port);
	311	result = merge_result(result, status);
	312	}
	313	}
	314
	315	return 0;
	316	}
	317
	318	static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev)
	319	{
029091df	320	pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
b19441af	321	int retval;
4bf3392e ZY	322
	323	/* If fatal, restore cfg space for possible link reset at upstream */
	324	if (dev->error_state == pci_channel_io_frozen) {
e9d82888	325	dev->state_saved = true;
a79d682f	326	pci_restore_state(dev);
4bf3392e ZY	327	pcie_portdrv_restore_config(dev);
	328	pci_enable_pcie_error_reporting(dev);
	329	}
	330
b19441af GKH	331	/* get true return value from &status */
b19441af GKH	332	retval = device_for_each_child(&dev->dev, &status, slot_reset_iter);
4bf3392e ZY	333
	334	return status;
	335	}
	336
	337	static int resume_iter(struct device device, void data)
	338	{
	339	struct pcie_device *pcie_device;
	340	struct pcie_port_service_driver *driver;
	341
	342	if (device->bus == &pcie_port_bus_type && device->driver) {
	343	driver = to_service_driver(device->driver);
	344	if (driver &&
	345	driver->err_handler &&
	346	driver->err_handler->resume) {
	347	pcie_device = to_pcie_device(device);
	348
	349	/* Forward error message to service drivers */
	350	driver->err_handler->resume(pcie_device->port);
	351	}
	352	}
	353
	354	return 0;
	355	}
	356
	357	static void pcie_portdrv_err_resume(struct pci_dev *dev)
	358	{
b19441af GKH	359	int retval;
	360	/* nothing to do with error value, if it ever happens */
	361	retval = device_for_each_child(&dev->dev, NULL, resume_iter);
1da177e4	362	}
1da177e4 LT	363
	364	/*
	365	* LINUX Device Driver Model
	366	*/
	367	static const struct pci_device_id port_pci_ids[] = { {
	368	/* handle any PCI-Express port */
	369	PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) \| 0x00), ~0),
	370	}, { /* end: all zeroes */ }
	371	};
	372	MODULE_DEVICE_TABLE(pci, port_pci_ids);
	373
4bf3392e ZY	374	static struct pci_error_handlers pcie_portdrv_err_handler = {
	375	.error_detected = pcie_portdrv_error_detected,
	376	.mmio_enabled = pcie_portdrv_mmio_enabled,
	377	.slot_reset = pcie_portdrv_slot_reset,
	378	.resume = pcie_portdrv_err_resume,
	379	};
	380
3603a6a3	381	static struct pci_driver pcie_portdriver = {
e3fb20f9	382	.name = "pcieport",
1da177e4 LT	383	.id_table = &port_pci_ids[0],
	384
	385	.probe = pcie_portdrv_probe,
	386	.remove = pcie_portdrv_remove,
	387
4bf3392e	388	.err_handler = &pcie_portdrv_err_handler,
3a3c244c RW	389
3a3c244c RW	390	.driver.pm = PCIE_PORTDRV_PM_OPS,
1da177e4 LT	391	};
1da177e4 LT	392
c39fae14 RW	393	static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d)
	394	{
	395	pr_notice("%s detected: will not use MSI for PCIe PME signaling\n",
	396	d->ident);
	397	pcie_pme_disable_msi();
	398	return 0;
	399	}
	400
	401	static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = {
	402	/*
	403	* Boxes that should not use MSI for PCIe PME signaling.
	404	*/
	405	{
	406	.callback = dmi_pcie_pme_disable_msi,
	407	.ident = "MSI Wind U-100",
	408	.matches = {
	409	DMI_MATCH(DMI_SYS_VENDOR,
	410	"MICRO-STAR INTERNATIONAL CO., LTD"),
	411	DMI_MATCH(DMI_PRODUCT_NAME, "U-100"),
	412	},
	413	},
	414	{}
	415	};
	416
1da177e4 LT	417	static int __init pcie_portdrv_init(void)
1da177e4 LT	418	{
20d51660	419	int retval;
1da177e4	420
fe31e697 RW	421	if (pcie_ports_disabled)
fe31e697 RW	422	return pci_register_driver(&pcie_portdriver);
79dd9182	423
c39fae14 RW	424	dmi_check_system(pcie_portdrv_dmi_table);
c39fae14 RW	425
20d51660 RD	426	retval = pcie_port_bus_register();
	427	if (retval) {
	428	printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval);
	429	goto out;
	430	}
3603a6a3	431	retval = pci_register_driver(&pcie_portdriver);
1da177e4 LT	432	if (retval)
1da177e4 LT	433	pcie_port_bus_unregister();
20d51660	434	out:
1da177e4 LT	435	return retval;
	436	}
	437
1da177e4	438	module_init(pcie_portdrv_init);