Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * File: portdrv_pci.c | |
3 | * Purpose: PCI Express Port Bus Driver | |
4 | * | |
5 | * Copyright (C) 2004 Intel | |
6 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
7 | */ | |
8 | ||
9 | #include <linux/module.h> | |
10 | #include <linux/pci.h> | |
11 | #include <linux/kernel.h> | |
12 | #include <linux/errno.h> | |
13 | #include <linux/pm.h> | |
71a83bd7 | 14 | #include <linux/pm_runtime.h> |
1da177e4 LT |
15 | #include <linux/init.h> |
16 | #include <linux/pcieport_if.h> | |
4bf3392e | 17 | #include <linux/aer.h> |
c39fae14 | 18 | #include <linux/dmi.h> |
28eb5f27 | 19 | #include <linux/pci-aspm.h> |
1da177e4 LT |
20 | |
21 | #include "portdrv.h" | |
4bf3392e | 22 | #include "aer/aerdrv.h" |
1da177e4 LT |
23 | |
24 | /* | |
25 | * Version Information | |
26 | */ | |
27 | #define DRIVER_VERSION "v1.0" | |
28 | #define DRIVER_AUTHOR "tom.l.nguyen@intel.com" | |
7e8af37a | 29 | #define DRIVER_DESC "PCIe Port Bus Driver" |
1da177e4 LT |
30 | MODULE_AUTHOR(DRIVER_AUTHOR); |
31 | MODULE_DESCRIPTION(DRIVER_DESC); | |
32 | MODULE_LICENSE("GPL"); | |
33 | ||
79dd9182 RW |
34 | /* If this switch is set, PCIe port native services should not be enabled. */ |
35 | bool pcie_ports_disabled; | |
36 | ||
28eb5f27 RW |
37 | /* |
38 | * If this switch is set, ACPI _OSC will be used to determine whether or not to | |
39 | * enable PCIe port native services. | |
40 | */ | |
41 | bool pcie_ports_auto = true; | |
42 | ||
79dd9182 RW |
43 | static int __init pcie_port_setup(char *str) |
44 | { | |
28eb5f27 | 45 | if (!strncmp(str, "compat", 6)) { |
79dd9182 | 46 | pcie_ports_disabled = true; |
28eb5f27 RW |
47 | } else if (!strncmp(str, "native", 6)) { |
48 | pcie_ports_disabled = false; | |
49 | pcie_ports_auto = false; | |
50 | } else if (!strncmp(str, "auto", 4)) { | |
51 | pcie_ports_disabled = false; | |
52 | pcie_ports_auto = true; | |
53 | } | |
79dd9182 RW |
54 | |
55 | return 1; | |
56 | } | |
57 | __setup("pcie_ports=", pcie_port_setup); | |
58 | ||
1da177e4 | 59 | /* global data */ |
1da177e4 | 60 | |
fe31e697 RW |
61 | /** |
62 | * pcie_clear_root_pme_status - Clear root port PME interrupt status. | |
63 | * @dev: PCIe root port or event collector. | |
64 | */ | |
65 | void pcie_clear_root_pme_status(struct pci_dev *dev) | |
66 | { | |
2dcfaf85 | 67 | pcie_capability_set_dword(dev, PCI_EXP_RTSTA, PCI_EXP_RTSTA_PME); |
fe31e697 RW |
68 | } |
69 | ||
4bf3392e ZY |
70 | static int pcie_portdrv_restore_config(struct pci_dev *dev) |
71 | { | |
72 | int retval; | |
73 | ||
4bf3392e ZY |
74 | retval = pci_enable_device(dev); |
75 | if (retval) | |
76 | return retval; | |
77 | pci_set_master(dev); | |
78 | return 0; | |
79 | } | |
80 | ||
0bed208e | 81 | #ifdef CONFIG_PM |
fe31e697 RW |
82 | static int pcie_port_resume_noirq(struct device *dev) |
83 | { | |
84 | struct pci_dev *pdev = to_pci_dev(dev); | |
85 | ||
86 | /* | |
87 | * Some BIOSes forget to clear Root PME Status bits after system wakeup | |
88 | * which breaks ACPI-based runtime wakeup on PCI Express, so clear those | |
89 | * bits now just in case (shouldn't hurt). | |
90 | */ | |
62f87c0e | 91 | if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) |
fe31e697 RW |
92 | pcie_clear_root_pme_status(pdev); |
93 | return 0; | |
94 | } | |
95 | ||
006d44e4 MW |
96 | static int pcie_port_runtime_suspend(struct device *dev) |
97 | { | |
98 | return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY; | |
99 | } | |
100 | ||
101 | static int pcie_port_runtime_resume(struct device *dev) | |
102 | { | |
103 | return 0; | |
104 | } | |
105 | ||
106 | static int pcie_port_runtime_idle(struct device *dev) | |
107 | { | |
108 | /* | |
109 | * Assume the PCI core has set bridge_d3 whenever it thinks the port | |
110 | * should be good to go to D3. Everything else, including moving | |
111 | * the port to D3, is handled by the PCI core. | |
112 | */ | |
113 | return to_pci_dev(dev)->bridge_d3 ? 0 : -EBUSY; | |
114 | } | |
115 | ||
47145210 | 116 | static const struct dev_pm_ops pcie_portdrv_pm_ops = { |
3a3c244c RW |
117 | .suspend = pcie_port_device_suspend, |
118 | .resume = pcie_port_device_resume, | |
119 | .freeze = pcie_port_device_suspend, | |
120 | .thaw = pcie_port_device_resume, | |
121 | .poweroff = pcie_port_device_suspend, | |
122 | .restore = pcie_port_device_resume, | |
fe31e697 | 123 | .resume_noirq = pcie_port_resume_noirq, |
006d44e4 MW |
124 | .runtime_suspend = pcie_port_runtime_suspend, |
125 | .runtime_resume = pcie_port_runtime_resume, | |
126 | .runtime_idle = pcie_port_runtime_idle, | |
3a3c244c | 127 | }; |
4bf3392e | 128 | |
3a3c244c | 129 | #define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops) |
a79d682f | 130 | |
3a3c244c RW |
131 | #else /* !PM */ |
132 | ||
133 | #define PCIE_PORTDRV_PM_OPS NULL | |
134 | #endif /* !PM */ | |
4bf3392e | 135 | |
1da177e4 LT |
136 | /* |
137 | * pcie_portdrv_probe - Probe PCI-Express port devices | |
138 | * @dev: PCI-Express port device being probed | |
139 | * | |
40da4186 | 140 | * If detected invokes the pcie_port_device_register() method for |
1da177e4 LT |
141 | * this port device. |
142 | * | |
143 | */ | |
15856ad5 | 144 | static int pcie_portdrv_probe(struct pci_dev *dev, |
898294c9 | 145 | const struct pci_device_id *id) |
1da177e4 | 146 | { |
898294c9 | 147 | int status; |
1da177e4 | 148 | |
898294c9 | 149 | if (!pci_is_pcie(dev) || |
62f87c0e YW |
150 | ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && |
151 | (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && | |
152 | (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) | |
898294c9 | 153 | return -ENODEV; |
1da177e4 | 154 | |
f118c0c3 RW |
155 | status = pcie_port_device_register(dev); |
156 | if (status) | |
157 | return status; | |
1da177e4 | 158 | |
87d2e2ec | 159 | pci_save_state(dev); |
006d44e4 MW |
160 | |
161 | /* | |
162 | * Prevent runtime PM if the port is advertising support for PCIe | |
163 | * hotplug. Otherwise the BIOS hotplug SMI code might not be able | |
164 | * to enumerate devices behind this port properly (the port is | |
165 | * powered down preventing all config space accesses to the | |
166 | * subordinate devices). We can't be sure for native PCIe hotplug | |
167 | * either so prevent that as well. | |
168 | */ | |
169 | if (!dev->is_hotplug_bridge) { | |
170 | /* | |
171 | * Keep the port resumed 100ms to make sure things like | |
172 | * config space accesses from userspace (lspci) will not | |
173 | * cause the port to repeatedly suspend and resume. | |
174 | */ | |
175 | pm_runtime_set_autosuspend_delay(&dev->dev, 100); | |
176 | pm_runtime_use_autosuspend(&dev->dev); | |
177 | pm_runtime_mark_last_busy(&dev->dev); | |
178 | pm_runtime_put_autosuspend(&dev->dev); | |
179 | pm_runtime_allow(&dev->dev); | |
180 | } | |
181 | ||
1da177e4 LT |
182 | return 0; |
183 | } | |
184 | ||
40da4186 | 185 | static void pcie_portdrv_remove(struct pci_dev *dev) |
1da177e4 | 186 | { |
006d44e4 MW |
187 | if (!dev->is_hotplug_bridge) { |
188 | pm_runtime_forbid(&dev->dev); | |
189 | pm_runtime_get_noresume(&dev->dev); | |
190 | pm_runtime_dont_use_autosuspend(&dev->dev); | |
191 | } | |
192 | ||
1da177e4 LT |
193 | pcie_port_device_remove(dev); |
194 | } | |
195 | ||
4bf3392e | 196 | static int error_detected_iter(struct device *device, void *data) |
60854838 | 197 | { |
4bf3392e ZY |
198 | struct pcie_device *pcie_device; |
199 | struct pcie_port_service_driver *driver; | |
200 | struct aer_broadcast_data *result_data; | |
201 | pci_ers_result_t status; | |
202 | ||
203 | result_data = (struct aer_broadcast_data *) data; | |
204 | ||
205 | if (device->bus == &pcie_port_bus_type && device->driver) { | |
206 | driver = to_service_driver(device->driver); | |
207 | if (!driver || | |
208 | !driver->err_handler || | |
209 | !driver->err_handler->error_detected) | |
210 | return 0; | |
211 | ||
212 | pcie_device = to_pcie_device(device); | |
213 | ||
214 | /* Forward error detected message to service drivers */ | |
215 | status = driver->err_handler->error_detected( | |
216 | pcie_device->port, | |
217 | result_data->state); | |
218 | result_data->result = | |
219 | merge_result(result_data->result, status); | |
220 | } | |
221 | ||
222 | return 0; | |
60854838 HK |
223 | } |
224 | ||
4bf3392e ZY |
225 | static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev, |
226 | enum pci_channel_state error) | |
60854838 | 227 | { |
40da4186 | 228 | struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER}; |
4bf3392e | 229 | |
b638d7e7 BH |
230 | /* get true return value from &data */ |
231 | device_for_each_child(&dev->dev, &data, error_detected_iter); | |
40da4186 | 232 | return data.result; |
4bf3392e ZY |
233 | } |
234 | ||
235 | static int mmio_enabled_iter(struct device *device, void *data) | |
236 | { | |
237 | struct pcie_device *pcie_device; | |
238 | struct pcie_port_service_driver *driver; | |
239 | pci_ers_result_t status, *result; | |
240 | ||
241 | result = (pci_ers_result_t *) data; | |
242 | ||
243 | if (device->bus == &pcie_port_bus_type && device->driver) { | |
244 | driver = to_service_driver(device->driver); | |
245 | if (driver && | |
246 | driver->err_handler && | |
247 | driver->err_handler->mmio_enabled) { | |
248 | pcie_device = to_pcie_device(device); | |
249 | ||
250 | /* Forward error message to service drivers */ | |
251 | status = driver->err_handler->mmio_enabled( | |
252 | pcie_device->port); | |
253 | *result = merge_result(*result, status); | |
254 | } | |
255 | } | |
60854838 | 256 | |
60854838 HK |
257 | return 0; |
258 | } | |
259 | ||
4bf3392e | 260 | static pci_ers_result_t pcie_portdrv_mmio_enabled(struct pci_dev *dev) |
1da177e4 | 261 | { |
4bf3392e | 262 | pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; |
5823d100 | 263 | |
b19441af | 264 | /* get true return value from &status */ |
b638d7e7 | 265 | device_for_each_child(&dev->dev, &status, mmio_enabled_iter); |
4bf3392e | 266 | return status; |
1da177e4 LT |
267 | } |
268 | ||
4bf3392e | 269 | static int slot_reset_iter(struct device *device, void *data) |
1da177e4 | 270 | { |
4bf3392e ZY |
271 | struct pcie_device *pcie_device; |
272 | struct pcie_port_service_driver *driver; | |
273 | pci_ers_result_t status, *result; | |
274 | ||
275 | result = (pci_ers_result_t *) data; | |
276 | ||
277 | if (device->bus == &pcie_port_bus_type && device->driver) { | |
278 | driver = to_service_driver(device->driver); | |
279 | if (driver && | |
280 | driver->err_handler && | |
281 | driver->err_handler->slot_reset) { | |
282 | pcie_device = to_pcie_device(device); | |
283 | ||
284 | /* Forward error message to service drivers */ | |
285 | status = driver->err_handler->slot_reset( | |
286 | pcie_device->port); | |
287 | *result = merge_result(*result, status); | |
288 | } | |
289 | } | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static pci_ers_result_t pcie_portdrv_slot_reset(struct pci_dev *dev) | |
295 | { | |
029091df | 296 | pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED; |
4bf3392e ZY |
297 | |
298 | /* If fatal, restore cfg space for possible link reset at upstream */ | |
299 | if (dev->error_state == pci_channel_io_frozen) { | |
e9d82888 | 300 | dev->state_saved = true; |
a79d682f | 301 | pci_restore_state(dev); |
4bf3392e ZY |
302 | pcie_portdrv_restore_config(dev); |
303 | pci_enable_pcie_error_reporting(dev); | |
304 | } | |
305 | ||
b19441af | 306 | /* get true return value from &status */ |
b638d7e7 | 307 | device_for_each_child(&dev->dev, &status, slot_reset_iter); |
4bf3392e ZY |
308 | return status; |
309 | } | |
310 | ||
311 | static int resume_iter(struct device *device, void *data) | |
312 | { | |
313 | struct pcie_device *pcie_device; | |
314 | struct pcie_port_service_driver *driver; | |
315 | ||
316 | if (device->bus == &pcie_port_bus_type && device->driver) { | |
317 | driver = to_service_driver(device->driver); | |
318 | if (driver && | |
319 | driver->err_handler && | |
320 | driver->err_handler->resume) { | |
321 | pcie_device = to_pcie_device(device); | |
322 | ||
323 | /* Forward error message to service drivers */ | |
324 | driver->err_handler->resume(pcie_device->port); | |
325 | } | |
326 | } | |
327 | ||
328 | return 0; | |
329 | } | |
330 | ||
331 | static void pcie_portdrv_err_resume(struct pci_dev *dev) | |
332 | { | |
b638d7e7 | 333 | device_for_each_child(&dev->dev, NULL, resume_iter); |
1da177e4 | 334 | } |
1da177e4 LT |
335 | |
336 | /* | |
337 | * LINUX Device Driver Model | |
338 | */ | |
339 | static const struct pci_device_id port_pci_ids[] = { { | |
340 | /* handle any PCI-Express port */ | |
341 | PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0), | |
342 | }, { /* end: all zeroes */ } | |
343 | }; | |
344 | MODULE_DEVICE_TABLE(pci, port_pci_ids); | |
345 | ||
49453028 SH |
346 | static const struct pci_error_handlers pcie_portdrv_err_handler = { |
347 | .error_detected = pcie_portdrv_error_detected, | |
348 | .mmio_enabled = pcie_portdrv_mmio_enabled, | |
349 | .slot_reset = pcie_portdrv_slot_reset, | |
350 | .resume = pcie_portdrv_err_resume, | |
4bf3392e ZY |
351 | }; |
352 | ||
3603a6a3 | 353 | static struct pci_driver pcie_portdriver = { |
e3fb20f9 | 354 | .name = "pcieport", |
1da177e4 LT |
355 | .id_table = &port_pci_ids[0], |
356 | ||
357 | .probe = pcie_portdrv_probe, | |
358 | .remove = pcie_portdrv_remove, | |
359 | ||
f7625980 | 360 | .err_handler = &pcie_portdrv_err_handler, |
3a3c244c | 361 | |
f7625980 | 362 | .driver.pm = PCIE_PORTDRV_PM_OPS, |
1da177e4 LT |
363 | }; |
364 | ||
c39fae14 RW |
365 | static int __init dmi_pcie_pme_disable_msi(const struct dmi_system_id *d) |
366 | { | |
367 | pr_notice("%s detected: will not use MSI for PCIe PME signaling\n", | |
227f0647 | 368 | d->ident); |
c39fae14 RW |
369 | pcie_pme_disable_msi(); |
370 | return 0; | |
371 | } | |
372 | ||
373 | static struct dmi_system_id __initdata pcie_portdrv_dmi_table[] = { | |
374 | /* | |
375 | * Boxes that should not use MSI for PCIe PME signaling. | |
376 | */ | |
377 | { | |
378 | .callback = dmi_pcie_pme_disable_msi, | |
379 | .ident = "MSI Wind U-100", | |
380 | .matches = { | |
381 | DMI_MATCH(DMI_SYS_VENDOR, | |
f7625980 | 382 | "MICRO-STAR INTERNATIONAL CO., LTD"), |
c39fae14 RW |
383 | DMI_MATCH(DMI_PRODUCT_NAME, "U-100"), |
384 | }, | |
385 | }, | |
386 | {} | |
387 | }; | |
388 | ||
1da177e4 LT |
389 | static int __init pcie_portdrv_init(void) |
390 | { | |
20d51660 | 391 | int retval; |
1da177e4 | 392 | |
fe31e697 RW |
393 | if (pcie_ports_disabled) |
394 | return pci_register_driver(&pcie_portdriver); | |
79dd9182 | 395 | |
c39fae14 RW |
396 | dmi_check_system(pcie_portdrv_dmi_table); |
397 | ||
20d51660 RD |
398 | retval = pcie_port_bus_register(); |
399 | if (retval) { | |
400 | printk(KERN_WARNING "PCIE: bus_register error: %d\n", retval); | |
401 | goto out; | |
402 | } | |
3603a6a3 | 403 | retval = pci_register_driver(&pcie_portdriver); |
1da177e4 LT |
404 | if (retval) |
405 | pcie_port_bus_unregister(); | |
20d51660 | 406 | out: |
1da177e4 LT |
407 | return retval; |
408 | } | |
409 | ||
1da177e4 | 410 | module_init(pcie_portdrv_init); |