Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Procfs interface for the PCI bus. |
3 | * | |
4 | * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz> | |
5 | */ | |
6 | ||
7 | #include <linux/init.h> | |
8 | #include <linux/pci.h> | |
5a0e3ad6 | 9 | #include <linux/slab.h> |
1da177e4 LT |
10 | #include <linux/module.h> |
11 | #include <linux/proc_fs.h> | |
12 | #include <linux/seq_file.h> | |
add77184 | 13 | #include <linux/smp_lock.h> |
aa0ac365 | 14 | #include <linux/capability.h> |
1da177e4 LT |
15 | #include <asm/uaccess.h> |
16 | #include <asm/byteorder.h> | |
bc56b9e0 | 17 | #include "pci.h" |
1da177e4 LT |
18 | |
19 | static int proc_initialized; /* = 0 */ | |
20 | ||
21 | static loff_t | |
22 | proc_bus_pci_lseek(struct file *file, loff_t off, int whence) | |
23 | { | |
24 | loff_t new = -1; | |
46cc65a7 | 25 | struct inode *inode = file->f_path.dentry->d_inode; |
1da177e4 | 26 | |
1b1dcc1b | 27 | mutex_lock(&inode->i_mutex); |
1da177e4 LT |
28 | switch (whence) { |
29 | case 0: | |
30 | new = off; | |
31 | break; | |
32 | case 1: | |
33 | new = file->f_pos + off; | |
34 | break; | |
35 | case 2: | |
36 | new = inode->i_size + off; | |
37 | break; | |
38 | } | |
39 | if (new < 0 || new > inode->i_size) | |
40 | new = -EINVAL; | |
41 | else | |
42 | file->f_pos = new; | |
1b1dcc1b | 43 | mutex_unlock(&inode->i_mutex); |
1da177e4 LT |
44 | return new; |
45 | } | |
46 | ||
47 | static ssize_t | |
48 | proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos) | |
49 | { | |
46cc65a7 | 50 | const struct inode *ino = file->f_path.dentry->d_inode; |
1da177e4 LT |
51 | const struct proc_dir_entry *dp = PDE(ino); |
52 | struct pci_dev *dev = dp->data; | |
53 | unsigned int pos = *ppos; | |
54 | unsigned int cnt, size; | |
55 | ||
56 | /* | |
57 | * Normal users can read only the standardized portion of the | |
58 | * configuration space as several chips lock up when trying to read | |
59 | * undefined locations (think of Intel PIIX4 as a typical example). | |
60 | */ | |
61 | ||
62 | if (capable(CAP_SYS_ADMIN)) | |
cd68602f | 63 | size = dp->size; |
1da177e4 LT |
64 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
65 | size = 128; | |
66 | else | |
67 | size = 64; | |
68 | ||
69 | if (pos >= size) | |
70 | return 0; | |
71 | if (nbytes >= size) | |
72 | nbytes = size; | |
73 | if (pos + nbytes > size) | |
74 | nbytes = size - pos; | |
75 | cnt = nbytes; | |
76 | ||
77 | if (!access_ok(VERIFY_WRITE, buf, cnt)) | |
78 | return -EINVAL; | |
79 | ||
80 | if ((pos & 1) && cnt) { | |
81 | unsigned char val; | |
e04b0ea2 | 82 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
83 | __put_user(val, buf); |
84 | buf++; | |
85 | pos++; | |
86 | cnt--; | |
87 | } | |
88 | ||
89 | if ((pos & 3) && cnt > 2) { | |
90 | unsigned short val; | |
e04b0ea2 | 91 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 92 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
93 | buf += 2; |
94 | pos += 2; | |
95 | cnt -= 2; | |
96 | } | |
97 | ||
98 | while (cnt >= 4) { | |
99 | unsigned int val; | |
e04b0ea2 | 100 | pci_user_read_config_dword(dev, pos, &val); |
f17a077e | 101 | __put_user(cpu_to_le32(val), (__le32 __user *) buf); |
1da177e4 LT |
102 | buf += 4; |
103 | pos += 4; | |
104 | cnt -= 4; | |
105 | } | |
106 | ||
107 | if (cnt >= 2) { | |
108 | unsigned short val; | |
e04b0ea2 | 109 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 110 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
111 | buf += 2; |
112 | pos += 2; | |
113 | cnt -= 2; | |
114 | } | |
115 | ||
116 | if (cnt) { | |
117 | unsigned char val; | |
e04b0ea2 | 118 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
119 | __put_user(val, buf); |
120 | buf++; | |
121 | pos++; | |
122 | cnt--; | |
123 | } | |
124 | ||
125 | *ppos = pos; | |
126 | return nbytes; | |
127 | } | |
128 | ||
129 | static ssize_t | |
130 | proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) | |
131 | { | |
ecb39080 | 132 | struct inode *ino = file->f_path.dentry->d_inode; |
1da177e4 LT |
133 | const struct proc_dir_entry *dp = PDE(ino); |
134 | struct pci_dev *dev = dp->data; | |
135 | int pos = *ppos; | |
cd68602f | 136 | int size = dp->size; |
1da177e4 LT |
137 | int cnt; |
138 | ||
139 | if (pos >= size) | |
140 | return 0; | |
141 | if (nbytes >= size) | |
142 | nbytes = size; | |
143 | if (pos + nbytes > size) | |
144 | nbytes = size - pos; | |
145 | cnt = nbytes; | |
146 | ||
147 | if (!access_ok(VERIFY_READ, buf, cnt)) | |
148 | return -EINVAL; | |
149 | ||
150 | if ((pos & 1) && cnt) { | |
151 | unsigned char val; | |
152 | __get_user(val, buf); | |
e04b0ea2 | 153 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
154 | buf++; |
155 | pos++; | |
156 | cnt--; | |
157 | } | |
158 | ||
159 | if ((pos & 3) && cnt > 2) { | |
f17a077e HH |
160 | __le16 val; |
161 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 162 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
163 | buf += 2; |
164 | pos += 2; | |
165 | cnt -= 2; | |
166 | } | |
167 | ||
168 | while (cnt >= 4) { | |
f17a077e HH |
169 | __le32 val; |
170 | __get_user(val, (__le32 __user *) buf); | |
e04b0ea2 | 171 | pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); |
1da177e4 LT |
172 | buf += 4; |
173 | pos += 4; | |
174 | cnt -= 4; | |
175 | } | |
176 | ||
177 | if (cnt >= 2) { | |
f17a077e HH |
178 | __le16 val; |
179 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 180 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
181 | buf += 2; |
182 | pos += 2; | |
183 | cnt -= 2; | |
184 | } | |
185 | ||
186 | if (cnt) { | |
187 | unsigned char val; | |
188 | __get_user(val, buf); | |
e04b0ea2 | 189 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
190 | buf++; |
191 | pos++; | |
192 | cnt--; | |
193 | } | |
194 | ||
195 | *ppos = pos; | |
ecb39080 | 196 | i_size_write(ino, dp->size); |
1da177e4 LT |
197 | return nbytes; |
198 | } | |
199 | ||
200 | struct pci_filp_private { | |
201 | enum pci_mmap_state mmap_state; | |
202 | int write_combine; | |
203 | }; | |
204 | ||
add77184 MS |
205 | static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, |
206 | unsigned long arg) | |
1da177e4 | 207 | { |
add77184 | 208 | const struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode); |
1da177e4 LT |
209 | struct pci_dev *dev = dp->data; |
210 | #ifdef HAVE_PCI_MMAP | |
211 | struct pci_filp_private *fpriv = file->private_data; | |
212 | #endif /* HAVE_PCI_MMAP */ | |
213 | int ret = 0; | |
214 | ||
add77184 MS |
215 | lock_kernel(); |
216 | ||
1da177e4 LT |
217 | switch (cmd) { |
218 | case PCIIOC_CONTROLLER: | |
219 | ret = pci_domain_nr(dev->bus); | |
220 | break; | |
221 | ||
222 | #ifdef HAVE_PCI_MMAP | |
223 | case PCIIOC_MMAP_IS_IO: | |
224 | fpriv->mmap_state = pci_mmap_io; | |
225 | break; | |
226 | ||
227 | case PCIIOC_MMAP_IS_MEM: | |
228 | fpriv->mmap_state = pci_mmap_mem; | |
229 | break; | |
230 | ||
231 | case PCIIOC_WRITE_COMBINE: | |
232 | if (arg) | |
233 | fpriv->write_combine = 1; | |
234 | else | |
235 | fpriv->write_combine = 0; | |
236 | break; | |
237 | ||
238 | #endif /* HAVE_PCI_MMAP */ | |
239 | ||
240 | default: | |
241 | ret = -EINVAL; | |
242 | break; | |
243 | }; | |
244 | ||
add77184 | 245 | unlock_kernel(); |
1da177e4 LT |
246 | return ret; |
247 | } | |
248 | ||
249 | #ifdef HAVE_PCI_MMAP | |
250 | static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) | |
251 | { | |
46cc65a7 | 252 | struct inode *inode = file->f_path.dentry->d_inode; |
1da177e4 LT |
253 | const struct proc_dir_entry *dp = PDE(inode); |
254 | struct pci_dev *dev = dp->data; | |
255 | struct pci_filp_private *fpriv = file->private_data; | |
9eff02e2 | 256 | int i, ret; |
1da177e4 LT |
257 | |
258 | if (!capable(CAP_SYS_RAWIO)) | |
259 | return -EPERM; | |
260 | ||
9eff02e2 JB |
261 | /* Make sure the caller is mapping a real resource for this device */ |
262 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
263 | if (pci_mmap_fits(dev, i, vma)) | |
264 | break; | |
265 | } | |
266 | ||
267 | if (i >= PCI_ROM_RESOURCE) | |
268 | return -ENODEV; | |
269 | ||
1da177e4 LT |
270 | ret = pci_mmap_page_range(dev, vma, |
271 | fpriv->mmap_state, | |
272 | fpriv->write_combine); | |
273 | if (ret < 0) | |
274 | return ret; | |
275 | ||
276 | return 0; | |
277 | } | |
278 | ||
279 | static int proc_bus_pci_open(struct inode *inode, struct file *file) | |
280 | { | |
281 | struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL); | |
282 | ||
283 | if (!fpriv) | |
284 | return -ENOMEM; | |
285 | ||
286 | fpriv->mmap_state = pci_mmap_io; | |
287 | fpriv->write_combine = 0; | |
288 | ||
289 | file->private_data = fpriv; | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static int proc_bus_pci_release(struct inode *inode, struct file *file) | |
295 | { | |
296 | kfree(file->private_data); | |
297 | file->private_data = NULL; | |
298 | ||
299 | return 0; | |
300 | } | |
301 | #endif /* HAVE_PCI_MMAP */ | |
302 | ||
d54b1fdb | 303 | static const struct file_operations proc_bus_pci_operations = { |
c7705f34 | 304 | .owner = THIS_MODULE, |
1da177e4 LT |
305 | .llseek = proc_bus_pci_lseek, |
306 | .read = proc_bus_pci_read, | |
307 | .write = proc_bus_pci_write, | |
add77184 | 308 | .unlocked_ioctl = proc_bus_pci_ioctl, |
1da177e4 LT |
309 | #ifdef HAVE_PCI_MMAP |
310 | .open = proc_bus_pci_open, | |
311 | .release = proc_bus_pci_release, | |
312 | .mmap = proc_bus_pci_mmap, | |
313 | #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA | |
314 | .get_unmapped_area = get_pci_unmapped_area, | |
315 | #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */ | |
316 | #endif /* HAVE_PCI_MMAP */ | |
317 | }; | |
318 | ||
1da177e4 LT |
319 | /* iterator */ |
320 | static void *pci_seq_start(struct seq_file *m, loff_t *pos) | |
321 | { | |
322 | struct pci_dev *dev = NULL; | |
323 | loff_t n = *pos; | |
324 | ||
325 | for_each_pci_dev(dev) { | |
326 | if (!n--) | |
327 | break; | |
328 | } | |
329 | return dev; | |
330 | } | |
331 | ||
332 | static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) | |
333 | { | |
334 | struct pci_dev *dev = v; | |
335 | ||
336 | (*pos)++; | |
337 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | |
338 | return dev; | |
339 | } | |
340 | ||
341 | static void pci_seq_stop(struct seq_file *m, void *v) | |
342 | { | |
343 | if (v) { | |
344 | struct pci_dev *dev = v; | |
345 | pci_dev_put(dev); | |
346 | } | |
347 | } | |
348 | ||
349 | static int show_device(struct seq_file *m, void *v) | |
350 | { | |
351 | const struct pci_dev *dev = v; | |
352 | const struct pci_driver *drv; | |
353 | int i; | |
354 | ||
355 | if (dev == NULL) | |
356 | return 0; | |
357 | ||
358 | drv = pci_dev_driver(dev); | |
359 | seq_printf(m, "%02x%02x\t%04x%04x\t%x", | |
360 | dev->bus->number, | |
361 | dev->devfn, | |
362 | dev->vendor, | |
363 | dev->device, | |
364 | dev->irq); | |
fde09c6d YZ |
365 | |
366 | /* only print standard and ROM resources to preserve compatibility */ | |
367 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
e31dd6e4 | 368 | resource_size_t start, end; |
2311b1f2 | 369 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 GKH |
370 | seq_printf(m, "\t%16llx", |
371 | (unsigned long long)(start | | |
372 | (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); | |
2311b1f2 | 373 | } |
fde09c6d | 374 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { |
e31dd6e4 | 375 | resource_size_t start, end; |
2311b1f2 | 376 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 | 377 | seq_printf(m, "\t%16llx", |
1da177e4 | 378 | dev->resource[i].start < dev->resource[i].end ? |
1396a8c3 | 379 | (unsigned long long)(end - start) + 1 : 0); |
2311b1f2 | 380 | } |
1da177e4 LT |
381 | seq_putc(m, '\t'); |
382 | if (drv) | |
383 | seq_printf(m, "%s", drv->name); | |
384 | seq_putc(m, '\n'); | |
385 | return 0; | |
386 | } | |
387 | ||
02d90fc3 | 388 | static const struct seq_operations proc_bus_pci_devices_op = { |
1da177e4 LT |
389 | .start = pci_seq_start, |
390 | .next = pci_seq_next, | |
391 | .stop = pci_seq_stop, | |
392 | .show = show_device | |
393 | }; | |
394 | ||
395 | static struct proc_dir_entry *proc_bus_pci_dir; | |
396 | ||
397 | int pci_proc_attach_device(struct pci_dev *dev) | |
398 | { | |
399 | struct pci_bus *bus = dev->bus; | |
400 | struct proc_dir_entry *e; | |
401 | char name[16]; | |
402 | ||
403 | if (!proc_initialized) | |
404 | return -EACCES; | |
405 | ||
406 | if (!bus->procdir) { | |
407 | if (pci_proc_domain(bus)) { | |
408 | sprintf(name, "%04x:%02x", pci_domain_nr(bus), | |
409 | bus->number); | |
410 | } else { | |
411 | sprintf(name, "%02x", bus->number); | |
412 | } | |
413 | bus->procdir = proc_mkdir(name, proc_bus_pci_dir); | |
414 | if (!bus->procdir) | |
415 | return -ENOMEM; | |
416 | } | |
417 | ||
418 | sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); | |
c7705f34 DL |
419 | e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir, |
420 | &proc_bus_pci_operations, dev); | |
1da177e4 LT |
421 | if (!e) |
422 | return -ENOMEM; | |
1da177e4 LT |
423 | e->size = dev->cfg_size; |
424 | dev->procent = e; | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
429 | int pci_proc_detach_device(struct pci_dev *dev) | |
430 | { | |
431 | struct proc_dir_entry *e; | |
432 | ||
433 | if ((e = dev->procent)) { | |
1da177e4 LT |
434 | remove_proc_entry(e->name, dev->bus->procdir); |
435 | dev->procent = NULL; | |
436 | } | |
437 | return 0; | |
438 | } | |
439 | ||
54c762fe | 440 | #if 0 |
1da177e4 LT |
441 | int pci_proc_attach_bus(struct pci_bus* bus) |
442 | { | |
443 | struct proc_dir_entry *de = bus->procdir; | |
444 | ||
445 | if (!proc_initialized) | |
446 | return -EACCES; | |
447 | ||
448 | if (!de) { | |
449 | char name[16]; | |
450 | sprintf(name, "%02x", bus->number); | |
451 | de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir); | |
452 | if (!de) | |
453 | return -ENOMEM; | |
454 | } | |
455 | return 0; | |
456 | } | |
54c762fe | 457 | #endif /* 0 */ |
1da177e4 LT |
458 | |
459 | int pci_proc_detach_bus(struct pci_bus* bus) | |
460 | { | |
461 | struct proc_dir_entry *de = bus->procdir; | |
462 | if (de) | |
463 | remove_proc_entry(de->name, proc_bus_pci_dir); | |
464 | return 0; | |
465 | } | |
466 | ||
1da177e4 LT |
467 | static int proc_bus_pci_dev_open(struct inode *inode, struct file *file) |
468 | { | |
469 | return seq_open(file, &proc_bus_pci_devices_op); | |
470 | } | |
d54b1fdb | 471 | static const struct file_operations proc_bus_pci_dev_operations = { |
c7705f34 | 472 | .owner = THIS_MODULE, |
1da177e4 LT |
473 | .open = proc_bus_pci_dev_open, |
474 | .read = seq_read, | |
475 | .llseek = seq_lseek, | |
476 | .release = seq_release, | |
477 | }; | |
478 | ||
479 | static int __init pci_proc_init(void) | |
480 | { | |
1da177e4 | 481 | struct pci_dev *dev = NULL; |
9c37066d | 482 | proc_bus_pci_dir = proc_mkdir("bus/pci", NULL); |
c7705f34 DL |
483 | proc_create("devices", 0, proc_bus_pci_dir, |
484 | &proc_bus_pci_dev_operations); | |
1da177e4 | 485 | proc_initialized = 1; |
4e344b1c | 486 | for_each_pci_dev(dev) |
1da177e4 | 487 | pci_proc_attach_device(dev); |
4e344b1c | 488 | |
1da177e4 LT |
489 | return 0; |
490 | } | |
491 | ||
eaf61142 | 492 | device_initcall(pci_proc_init); |
1da177e4 | 493 |