Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * Procfs interface for the PCI bus. |
3 | * | |
4 | * Copyright (c) 1997--1999 Martin Mares <mj@ucw.cz> | |
5 | */ | |
6 | ||
7 | #include <linux/init.h> | |
8 | #include <linux/pci.h> | |
5a0e3ad6 | 9 | #include <linux/slab.h> |
1da177e4 LT |
10 | #include <linux/module.h> |
11 | #include <linux/proc_fs.h> | |
12 | #include <linux/seq_file.h> | |
aa0ac365 | 13 | #include <linux/capability.h> |
1da177e4 LT |
14 | #include <asm/uaccess.h> |
15 | #include <asm/byteorder.h> | |
bc56b9e0 | 16 | #include "pci.h" |
1da177e4 LT |
17 | |
18 | static int proc_initialized; /* = 0 */ | |
19 | ||
20 | static loff_t | |
21 | proc_bus_pci_lseek(struct file *file, loff_t off, int whence) | |
22 | { | |
23 | loff_t new = -1; | |
46cc65a7 | 24 | struct inode *inode = file->f_path.dentry->d_inode; |
1da177e4 | 25 | |
1b1dcc1b | 26 | mutex_lock(&inode->i_mutex); |
1da177e4 LT |
27 | switch (whence) { |
28 | case 0: | |
29 | new = off; | |
30 | break; | |
31 | case 1: | |
32 | new = file->f_pos + off; | |
33 | break; | |
34 | case 2: | |
35 | new = inode->i_size + off; | |
36 | break; | |
37 | } | |
38 | if (new < 0 || new > inode->i_size) | |
39 | new = -EINVAL; | |
40 | else | |
41 | file->f_pos = new; | |
1b1dcc1b | 42 | mutex_unlock(&inode->i_mutex); |
1da177e4 LT |
43 | return new; |
44 | } | |
45 | ||
46 | static ssize_t | |
47 | proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos) | |
48 | { | |
46cc65a7 | 49 | const struct inode *ino = file->f_path.dentry->d_inode; |
1da177e4 LT |
50 | const struct proc_dir_entry *dp = PDE(ino); |
51 | struct pci_dev *dev = dp->data; | |
52 | unsigned int pos = *ppos; | |
53 | unsigned int cnt, size; | |
54 | ||
55 | /* | |
56 | * Normal users can read only the standardized portion of the | |
57 | * configuration space as several chips lock up when trying to read | |
58 | * undefined locations (think of Intel PIIX4 as a typical example). | |
59 | */ | |
60 | ||
61 | if (capable(CAP_SYS_ADMIN)) | |
cd68602f | 62 | size = dp->size; |
1da177e4 LT |
63 | else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) |
64 | size = 128; | |
65 | else | |
66 | size = 64; | |
67 | ||
68 | if (pos >= size) | |
69 | return 0; | |
70 | if (nbytes >= size) | |
71 | nbytes = size; | |
72 | if (pos + nbytes > size) | |
73 | nbytes = size - pos; | |
74 | cnt = nbytes; | |
75 | ||
76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) | |
77 | return -EINVAL; | |
78 | ||
79 | if ((pos & 1) && cnt) { | |
80 | unsigned char val; | |
e04b0ea2 | 81 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
82 | __put_user(val, buf); |
83 | buf++; | |
84 | pos++; | |
85 | cnt--; | |
86 | } | |
87 | ||
88 | if ((pos & 3) && cnt > 2) { | |
89 | unsigned short val; | |
e04b0ea2 | 90 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 91 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
92 | buf += 2; |
93 | pos += 2; | |
94 | cnt -= 2; | |
95 | } | |
96 | ||
97 | while (cnt >= 4) { | |
98 | unsigned int val; | |
e04b0ea2 | 99 | pci_user_read_config_dword(dev, pos, &val); |
f17a077e | 100 | __put_user(cpu_to_le32(val), (__le32 __user *) buf); |
1da177e4 LT |
101 | buf += 4; |
102 | pos += 4; | |
103 | cnt -= 4; | |
104 | } | |
105 | ||
106 | if (cnt >= 2) { | |
107 | unsigned short val; | |
e04b0ea2 | 108 | pci_user_read_config_word(dev, pos, &val); |
f17a077e | 109 | __put_user(cpu_to_le16(val), (__le16 __user *) buf); |
1da177e4 LT |
110 | buf += 2; |
111 | pos += 2; | |
112 | cnt -= 2; | |
113 | } | |
114 | ||
115 | if (cnt) { | |
116 | unsigned char val; | |
e04b0ea2 | 117 | pci_user_read_config_byte(dev, pos, &val); |
1da177e4 LT |
118 | __put_user(val, buf); |
119 | buf++; | |
120 | pos++; | |
121 | cnt--; | |
122 | } | |
123 | ||
124 | *ppos = pos; | |
125 | return nbytes; | |
126 | } | |
127 | ||
128 | static ssize_t | |
129 | proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos) | |
130 | { | |
ecb39080 | 131 | struct inode *ino = file->f_path.dentry->d_inode; |
1da177e4 LT |
132 | const struct proc_dir_entry *dp = PDE(ino); |
133 | struct pci_dev *dev = dp->data; | |
134 | int pos = *ppos; | |
cd68602f | 135 | int size = dp->size; |
1da177e4 LT |
136 | int cnt; |
137 | ||
138 | if (pos >= size) | |
139 | return 0; | |
140 | if (nbytes >= size) | |
141 | nbytes = size; | |
142 | if (pos + nbytes > size) | |
143 | nbytes = size - pos; | |
144 | cnt = nbytes; | |
145 | ||
146 | if (!access_ok(VERIFY_READ, buf, cnt)) | |
147 | return -EINVAL; | |
148 | ||
149 | if ((pos & 1) && cnt) { | |
150 | unsigned char val; | |
151 | __get_user(val, buf); | |
e04b0ea2 | 152 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
153 | buf++; |
154 | pos++; | |
155 | cnt--; | |
156 | } | |
157 | ||
158 | if ((pos & 3) && cnt > 2) { | |
f17a077e HH |
159 | __le16 val; |
160 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 161 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
162 | buf += 2; |
163 | pos += 2; | |
164 | cnt -= 2; | |
165 | } | |
166 | ||
167 | while (cnt >= 4) { | |
f17a077e HH |
168 | __le32 val; |
169 | __get_user(val, (__le32 __user *) buf); | |
e04b0ea2 | 170 | pci_user_write_config_dword(dev, pos, le32_to_cpu(val)); |
1da177e4 LT |
171 | buf += 4; |
172 | pos += 4; | |
173 | cnt -= 4; | |
174 | } | |
175 | ||
176 | if (cnt >= 2) { | |
f17a077e HH |
177 | __le16 val; |
178 | __get_user(val, (__le16 __user *) buf); | |
e04b0ea2 | 179 | pci_user_write_config_word(dev, pos, le16_to_cpu(val)); |
1da177e4 LT |
180 | buf += 2; |
181 | pos += 2; | |
182 | cnt -= 2; | |
183 | } | |
184 | ||
185 | if (cnt) { | |
186 | unsigned char val; | |
187 | __get_user(val, buf); | |
e04b0ea2 | 188 | pci_user_write_config_byte(dev, pos, val); |
1da177e4 LT |
189 | buf++; |
190 | pos++; | |
191 | cnt--; | |
192 | } | |
193 | ||
194 | *ppos = pos; | |
ecb39080 | 195 | i_size_write(ino, dp->size); |
1da177e4 LT |
196 | return nbytes; |
197 | } | |
198 | ||
199 | struct pci_filp_private { | |
200 | enum pci_mmap_state mmap_state; | |
201 | int write_combine; | |
202 | }; | |
203 | ||
add77184 MS |
204 | static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd, |
205 | unsigned long arg) | |
1da177e4 | 206 | { |
add77184 | 207 | const struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode); |
1da177e4 LT |
208 | struct pci_dev *dev = dp->data; |
209 | #ifdef HAVE_PCI_MMAP | |
210 | struct pci_filp_private *fpriv = file->private_data; | |
211 | #endif /* HAVE_PCI_MMAP */ | |
212 | int ret = 0; | |
213 | ||
214 | switch (cmd) { | |
215 | case PCIIOC_CONTROLLER: | |
216 | ret = pci_domain_nr(dev->bus); | |
217 | break; | |
218 | ||
219 | #ifdef HAVE_PCI_MMAP | |
220 | case PCIIOC_MMAP_IS_IO: | |
221 | fpriv->mmap_state = pci_mmap_io; | |
222 | break; | |
223 | ||
224 | case PCIIOC_MMAP_IS_MEM: | |
225 | fpriv->mmap_state = pci_mmap_mem; | |
226 | break; | |
227 | ||
228 | case PCIIOC_WRITE_COMBINE: | |
229 | if (arg) | |
230 | fpriv->write_combine = 1; | |
231 | else | |
232 | fpriv->write_combine = 0; | |
233 | break; | |
234 | ||
235 | #endif /* HAVE_PCI_MMAP */ | |
236 | ||
237 | default: | |
238 | ret = -EINVAL; | |
239 | break; | |
240 | }; | |
241 | ||
242 | return ret; | |
243 | } | |
244 | ||
245 | #ifdef HAVE_PCI_MMAP | |
246 | static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma) | |
247 | { | |
46cc65a7 | 248 | struct inode *inode = file->f_path.dentry->d_inode; |
1da177e4 LT |
249 | const struct proc_dir_entry *dp = PDE(inode); |
250 | struct pci_dev *dev = dp->data; | |
251 | struct pci_filp_private *fpriv = file->private_data; | |
9eff02e2 | 252 | int i, ret; |
1da177e4 LT |
253 | |
254 | if (!capable(CAP_SYS_RAWIO)) | |
255 | return -EPERM; | |
256 | ||
9eff02e2 JB |
257 | /* Make sure the caller is mapping a real resource for this device */ |
258 | for (i = 0; i < PCI_ROM_RESOURCE; i++) { | |
3b519e4e | 259 | if (pci_mmap_fits(dev, i, vma, PCI_MMAP_PROCFS)) |
9eff02e2 JB |
260 | break; |
261 | } | |
262 | ||
263 | if (i >= PCI_ROM_RESOURCE) | |
264 | return -ENODEV; | |
265 | ||
1da177e4 LT |
266 | ret = pci_mmap_page_range(dev, vma, |
267 | fpriv->mmap_state, | |
268 | fpriv->write_combine); | |
269 | if (ret < 0) | |
270 | return ret; | |
271 | ||
272 | return 0; | |
273 | } | |
274 | ||
275 | static int proc_bus_pci_open(struct inode *inode, struct file *file) | |
276 | { | |
277 | struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL); | |
278 | ||
279 | if (!fpriv) | |
280 | return -ENOMEM; | |
281 | ||
282 | fpriv->mmap_state = pci_mmap_io; | |
283 | fpriv->write_combine = 0; | |
284 | ||
285 | file->private_data = fpriv; | |
286 | ||
287 | return 0; | |
288 | } | |
289 | ||
290 | static int proc_bus_pci_release(struct inode *inode, struct file *file) | |
291 | { | |
292 | kfree(file->private_data); | |
293 | file->private_data = NULL; | |
294 | ||
295 | return 0; | |
296 | } | |
297 | #endif /* HAVE_PCI_MMAP */ | |
298 | ||
d54b1fdb | 299 | static const struct file_operations proc_bus_pci_operations = { |
c7705f34 | 300 | .owner = THIS_MODULE, |
1da177e4 LT |
301 | .llseek = proc_bus_pci_lseek, |
302 | .read = proc_bus_pci_read, | |
303 | .write = proc_bus_pci_write, | |
add77184 | 304 | .unlocked_ioctl = proc_bus_pci_ioctl, |
991f7395 | 305 | .compat_ioctl = proc_bus_pci_ioctl, |
1da177e4 LT |
306 | #ifdef HAVE_PCI_MMAP |
307 | .open = proc_bus_pci_open, | |
308 | .release = proc_bus_pci_release, | |
309 | .mmap = proc_bus_pci_mmap, | |
310 | #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA | |
311 | .get_unmapped_area = get_pci_unmapped_area, | |
312 | #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */ | |
313 | #endif /* HAVE_PCI_MMAP */ | |
314 | }; | |
315 | ||
1da177e4 LT |
316 | /* iterator */ |
317 | static void *pci_seq_start(struct seq_file *m, loff_t *pos) | |
318 | { | |
319 | struct pci_dev *dev = NULL; | |
320 | loff_t n = *pos; | |
321 | ||
322 | for_each_pci_dev(dev) { | |
323 | if (!n--) | |
324 | break; | |
325 | } | |
326 | return dev; | |
327 | } | |
328 | ||
329 | static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos) | |
330 | { | |
331 | struct pci_dev *dev = v; | |
332 | ||
333 | (*pos)++; | |
334 | dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev); | |
335 | return dev; | |
336 | } | |
337 | ||
338 | static void pci_seq_stop(struct seq_file *m, void *v) | |
339 | { | |
340 | if (v) { | |
341 | struct pci_dev *dev = v; | |
342 | pci_dev_put(dev); | |
343 | } | |
344 | } | |
345 | ||
346 | static int show_device(struct seq_file *m, void *v) | |
347 | { | |
348 | const struct pci_dev *dev = v; | |
349 | const struct pci_driver *drv; | |
350 | int i; | |
351 | ||
352 | if (dev == NULL) | |
353 | return 0; | |
354 | ||
355 | drv = pci_dev_driver(dev); | |
356 | seq_printf(m, "%02x%02x\t%04x%04x\t%x", | |
357 | dev->bus->number, | |
358 | dev->devfn, | |
359 | dev->vendor, | |
360 | dev->device, | |
361 | dev->irq); | |
fde09c6d YZ |
362 | |
363 | /* only print standard and ROM resources to preserve compatibility */ | |
364 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { | |
e31dd6e4 | 365 | resource_size_t start, end; |
2311b1f2 | 366 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 GKH |
367 | seq_printf(m, "\t%16llx", |
368 | (unsigned long long)(start | | |
369 | (dev->resource[i].flags & PCI_REGION_FLAG_MASK))); | |
2311b1f2 | 370 | } |
fde09c6d | 371 | for (i = 0; i <= PCI_ROM_RESOURCE; i++) { |
e31dd6e4 | 372 | resource_size_t start, end; |
2311b1f2 | 373 | pci_resource_to_user(dev, i, &dev->resource[i], &start, &end); |
1396a8c3 | 374 | seq_printf(m, "\t%16llx", |
1da177e4 | 375 | dev->resource[i].start < dev->resource[i].end ? |
1396a8c3 | 376 | (unsigned long long)(end - start) + 1 : 0); |
2311b1f2 | 377 | } |
1da177e4 LT |
378 | seq_putc(m, '\t'); |
379 | if (drv) | |
380 | seq_printf(m, "%s", drv->name); | |
381 | seq_putc(m, '\n'); | |
382 | return 0; | |
383 | } | |
384 | ||
02d90fc3 | 385 | static const struct seq_operations proc_bus_pci_devices_op = { |
1da177e4 LT |
386 | .start = pci_seq_start, |
387 | .next = pci_seq_next, | |
388 | .stop = pci_seq_stop, | |
389 | .show = show_device | |
390 | }; | |
391 | ||
392 | static struct proc_dir_entry *proc_bus_pci_dir; | |
393 | ||
394 | int pci_proc_attach_device(struct pci_dev *dev) | |
395 | { | |
396 | struct pci_bus *bus = dev->bus; | |
397 | struct proc_dir_entry *e; | |
398 | char name[16]; | |
399 | ||
400 | if (!proc_initialized) | |
401 | return -EACCES; | |
402 | ||
403 | if (!bus->procdir) { | |
404 | if (pci_proc_domain(bus)) { | |
405 | sprintf(name, "%04x:%02x", pci_domain_nr(bus), | |
406 | bus->number); | |
407 | } else { | |
408 | sprintf(name, "%02x", bus->number); | |
409 | } | |
410 | bus->procdir = proc_mkdir(name, proc_bus_pci_dir); | |
411 | if (!bus->procdir) | |
412 | return -ENOMEM; | |
413 | } | |
414 | ||
415 | sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); | |
c7705f34 DL |
416 | e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir, |
417 | &proc_bus_pci_operations, dev); | |
1da177e4 LT |
418 | if (!e) |
419 | return -ENOMEM; | |
1da177e4 LT |
420 | e->size = dev->cfg_size; |
421 | dev->procent = e; | |
422 | ||
423 | return 0; | |
424 | } | |
425 | ||
426 | int pci_proc_detach_device(struct pci_dev *dev) | |
427 | { | |
428 | struct proc_dir_entry *e; | |
429 | ||
430 | if ((e = dev->procent)) { | |
1da177e4 LT |
431 | remove_proc_entry(e->name, dev->bus->procdir); |
432 | dev->procent = NULL; | |
433 | } | |
434 | return 0; | |
435 | } | |
436 | ||
54c762fe | 437 | #if 0 |
1da177e4 LT |
438 | int pci_proc_attach_bus(struct pci_bus* bus) |
439 | { | |
440 | struct proc_dir_entry *de = bus->procdir; | |
441 | ||
442 | if (!proc_initialized) | |
443 | return -EACCES; | |
444 | ||
445 | if (!de) { | |
446 | char name[16]; | |
447 | sprintf(name, "%02x", bus->number); | |
448 | de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir); | |
449 | if (!de) | |
450 | return -ENOMEM; | |
451 | } | |
452 | return 0; | |
453 | } | |
54c762fe | 454 | #endif /* 0 */ |
1da177e4 LT |
455 | |
456 | int pci_proc_detach_bus(struct pci_bus* bus) | |
457 | { | |
458 | struct proc_dir_entry *de = bus->procdir; | |
459 | if (de) | |
460 | remove_proc_entry(de->name, proc_bus_pci_dir); | |
461 | return 0; | |
462 | } | |
463 | ||
1da177e4 LT |
464 | static int proc_bus_pci_dev_open(struct inode *inode, struct file *file) |
465 | { | |
466 | return seq_open(file, &proc_bus_pci_devices_op); | |
467 | } | |
d54b1fdb | 468 | static const struct file_operations proc_bus_pci_dev_operations = { |
c7705f34 | 469 | .owner = THIS_MODULE, |
1da177e4 LT |
470 | .open = proc_bus_pci_dev_open, |
471 | .read = seq_read, | |
472 | .llseek = seq_lseek, | |
473 | .release = seq_release, | |
474 | }; | |
475 | ||
476 | static int __init pci_proc_init(void) | |
477 | { | |
1da177e4 | 478 | struct pci_dev *dev = NULL; |
9c37066d | 479 | proc_bus_pci_dir = proc_mkdir("bus/pci", NULL); |
c7705f34 DL |
480 | proc_create("devices", 0, proc_bus_pci_dir, |
481 | &proc_bus_pci_dev_operations); | |
1da177e4 | 482 | proc_initialized = 1; |
4e344b1c | 483 | for_each_pci_dev(dev) |
1da177e4 | 484 | pci_proc_attach_device(dev); |
4e344b1c | 485 | |
1da177e4 LT |
486 | return 0; |
487 | } | |
488 | ||
eaf61142 | 489 | device_initcall(pci_proc_init); |
1da177e4 | 490 |