Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/pci/rom.c | |
3 | * | |
4 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
5 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
6 | * | |
7 | * PCI ROM access routines | |
8 | */ | |
1da177e4 | 9 | #include <linux/kernel.h> |
363c75db | 10 | #include <linux/export.h> |
1da177e4 | 11 | #include <linux/pci.h> |
4e57b681 | 12 | #include <linux/slab.h> |
1da177e4 LT |
13 | |
14 | #include "pci.h" | |
15 | ||
16 | /** | |
17 | * pci_enable_rom - enable ROM decoding for a PCI device | |
67be2dd1 | 18 | * @pdev: PCI device to enable |
1da177e4 LT |
19 | * |
20 | * Enable ROM decoding on @dev. This involves simply turning on the last | |
21 | * bit of the PCI ROM BAR. Note that some cards may share address decoders | |
22 | * between the ROM and other resources, so enabling it may disable access | |
23 | * to MMIO registers or other card memory. | |
24 | */ | |
e416de5e | 25 | int pci_enable_rom(struct pci_dev *pdev) |
1da177e4 | 26 | { |
4708f9a5 | 27 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; |
8085ce08 | 28 | struct pci_bus_region region; |
1da177e4 LT |
29 | u32 rom_addr; |
30 | ||
8085ce08 BH |
31 | if (!res->flags) |
32 | return -1; | |
33 | ||
4708f9a5 BH |
34 | /* Nothing to enable if we're using a shadow copy in RAM */ |
35 | if (res->flags & IORESOURCE_ROM_SHADOW) | |
36 | return 0; | |
37 | ||
fc279850 | 38 | pcibios_resource_to_bus(pdev->bus, ®ion, res); |
1da177e4 | 39 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
8085ce08 BH |
40 | rom_addr &= ~PCI_ROM_ADDRESS_MASK; |
41 | rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 | 42 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); |
8085ce08 | 43 | return 0; |
1da177e4 | 44 | } |
b7fe9434 | 45 | EXPORT_SYMBOL_GPL(pci_enable_rom); |
1da177e4 LT |
46 | |
47 | /** | |
48 | * pci_disable_rom - disable ROM decoding for a PCI device | |
67be2dd1 | 49 | * @pdev: PCI device to disable |
1da177e4 LT |
50 | * |
51 | * Disable ROM decoding on a PCI device by turning off the last bit in the | |
52 | * ROM BAR. | |
53 | */ | |
e416de5e | 54 | void pci_disable_rom(struct pci_dev *pdev) |
1da177e4 | 55 | { |
4708f9a5 | 56 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; |
1da177e4 | 57 | u32 rom_addr; |
4708f9a5 BH |
58 | |
59 | if (res->flags & IORESOURCE_ROM_SHADOW) | |
60 | return; | |
61 | ||
1da177e4 LT |
62 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
63 | rom_addr &= ~PCI_ROM_ADDRESS_ENABLE; | |
64 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); | |
65 | } | |
b7fe9434 | 66 | EXPORT_SYMBOL_GPL(pci_disable_rom); |
1da177e4 | 67 | |
d7ad2254 JK |
68 | /** |
69 | * pci_get_rom_size - obtain the actual size of the ROM image | |
4cc59c72 | 70 | * @pdev: target PCI device |
d7ad2254 JK |
71 | * @rom: kernel virtual pointer to image of ROM |
72 | * @size: size of PCI window | |
73 | * return: size of actual ROM image | |
74 | * | |
75 | * Determine the actual length of the ROM image. | |
76 | * The PCI window size could be much larger than the | |
77 | * actual image size. | |
78 | */ | |
97c44836 | 79 | size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size) |
d7ad2254 JK |
80 | { |
81 | void __iomem *image; | |
82 | int last_image; | |
16b036af | 83 | unsigned length; |
d7ad2254 JK |
84 | |
85 | image = rom; | |
86 | do { | |
87 | void __iomem *pds; | |
88 | /* Standard PCI ROMs start out with these bytes 55 AA */ | |
4066df63 VD |
89 | if (readw(image) != 0xAA55) { |
90 | dev_err(&pdev->dev, "Invalid PCI ROM header signature: expecting 0xaa55, got %#06x\n", | |
91 | readw(image)); | |
d7ad2254 | 92 | break; |
97c44836 | 93 | } |
4066df63 | 94 | /* get the PCI data structure and check its "PCIR" signature */ |
d7ad2254 | 95 | pds = image + readw(image + 24); |
4066df63 VD |
96 | if (readl(pds) != 0x52494350) { |
97 | dev_err(&pdev->dev, "Invalid PCI ROM data signature: expecting 0x52494350, got %#010x\n", | |
98 | readl(pds)); | |
d7ad2254 | 99 | break; |
4066df63 | 100 | } |
d7ad2254 | 101 | last_image = readb(pds + 21) & 0x80; |
16b036af MD |
102 | length = readw(pds + 16); |
103 | image += length * 512; | |
47b975d2 EC |
104 | /* Avoid iterating through memory outside the resource window */ |
105 | if (image > rom + size) | |
106 | break; | |
16b036af | 107 | } while (length && !last_image); |
d7ad2254 JK |
108 | |
109 | /* never return a size larger than the PCI resource window */ | |
110 | /* there are known ROMs that get the size wrong */ | |
111 | return min((size_t)(image - rom), size); | |
112 | } | |
113 | ||
1da177e4 LT |
114 | /** |
115 | * pci_map_rom - map a PCI ROM to kernel space | |
67be2dd1 | 116 | * @pdev: pointer to pci device struct |
1da177e4 | 117 | * @size: pointer to receive size of pci window over ROM |
f5dafca5 RD |
118 | * |
119 | * Return: kernel virtual pointer to image of ROM | |
1da177e4 LT |
120 | * |
121 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
122 | * the shadow BIOS copy will be returned instead of the | |
123 | * actual ROM. | |
124 | */ | |
125 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) | |
126 | { | |
127 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
fffe01f7 | 128 | loff_t start; |
1da177e4 | 129 | void __iomem *rom; |
1da177e4 | 130 | |
f50dd8c3 BH |
131 | /* assign the ROM an address if it doesn't have one */ |
132 | if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE)) | |
133 | return NULL; | |
134 | ||
135 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); | |
136 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
137 | if (*size == 0) | |
138 | return NULL; | |
139 | ||
140 | /* Enable ROM space decodes */ | |
141 | if (pci_enable_rom(pdev)) | |
142 | return NULL; | |
547b5246 | 143 | |
1da177e4 LT |
144 | rom = ioremap(start, *size); |
145 | if (!rom) { | |
146 | /* restore enable if ioremap fails */ | |
d9c8bea1 | 147 | if (!(res->flags & IORESOURCE_ROM_ENABLE)) |
1da177e4 LT |
148 | pci_disable_rom(pdev); |
149 | return NULL; | |
150 | } | |
151 | ||
152 | /* | |
153 | * Try to find the true size of the ROM since sometimes the PCI window | |
154 | * size is much larger than the actual size of the ROM. | |
155 | * True size is important if the ROM is going to be copied. | |
156 | */ | |
97c44836 | 157 | *size = pci_get_rom_size(pdev, rom, *size); |
1da177e4 LT |
158 | return rom; |
159 | } | |
b7fe9434 | 160 | EXPORT_SYMBOL(pci_map_rom); |
1da177e4 | 161 | |
1da177e4 LT |
162 | /** |
163 | * pci_unmap_rom - unmap the ROM from kernel space | |
67be2dd1 | 164 | * @pdev: pointer to pci device struct |
1da177e4 LT |
165 | * @rom: virtual address of the previous mapping |
166 | * | |
167 | * Remove a mapping of a previously mapped ROM | |
168 | */ | |
169 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom) | |
170 | { | |
171 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
172 | ||
fffe01f7 | 173 | iounmap(rom); |
1da177e4 | 174 | |
4708f9a5 BH |
175 | /* Disable again before continuing */ |
176 | if (!(res->flags & IORESOURCE_ROM_ENABLE)) | |
1da177e4 LT |
177 | pci_disable_rom(pdev); |
178 | } | |
b7fe9434 | 179 | EXPORT_SYMBOL(pci_unmap_rom); |
1da177e4 | 180 | |
fffe01f7 MG |
181 | /** |
182 | * pci_platform_rom - provides a pointer to any ROM image provided by the | |
183 | * platform | |
184 | * @pdev: pointer to pci device struct | |
185 | * @size: pointer to receive size of pci window over ROM | |
186 | */ | |
187 | void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size) | |
188 | { | |
189 | if (pdev->rom && pdev->romlen) { | |
190 | *size = pdev->romlen; | |
191 | return phys_to_virt((phys_addr_t)pdev->rom); | |
192 | } | |
193 | ||
194 | return NULL; | |
195 | } | |
fffe01f7 | 196 | EXPORT_SYMBOL(pci_platform_rom); |