Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * drivers/pci/rom.c | |
3 | * | |
4 | * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com> | |
5 | * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com> | |
6 | * | |
7 | * PCI ROM access routines | |
8 | */ | |
1da177e4 LT |
9 | #include <linux/kernel.h> |
10 | #include <linux/pci.h> | |
4e57b681 | 11 | #include <linux/slab.h> |
1da177e4 LT |
12 | |
13 | #include "pci.h" | |
14 | ||
15 | /** | |
16 | * pci_enable_rom - enable ROM decoding for a PCI device | |
67be2dd1 | 17 | * @pdev: PCI device to enable |
1da177e4 LT |
18 | * |
19 | * Enable ROM decoding on @dev. This involves simply turning on the last | |
20 | * bit of the PCI ROM BAR. Note that some cards may share address decoders | |
21 | * between the ROM and other resources, so enabling it may disable access | |
22 | * to MMIO registers or other card memory. | |
23 | */ | |
8085ce08 | 24 | static int pci_enable_rom(struct pci_dev *pdev) |
1da177e4 | 25 | { |
8085ce08 BH |
26 | struct resource *res = pdev->resource + PCI_ROM_RESOURCE; |
27 | struct pci_bus_region region; | |
1da177e4 LT |
28 | u32 rom_addr; |
29 | ||
8085ce08 BH |
30 | if (!res->flags) |
31 | return -1; | |
32 | ||
33 | pcibios_resource_to_bus(pdev, ®ion, res); | |
1da177e4 | 34 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); |
8085ce08 BH |
35 | rom_addr &= ~PCI_ROM_ADDRESS_MASK; |
36 | rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 | 37 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); |
8085ce08 | 38 | return 0; |
1da177e4 LT |
39 | } |
40 | ||
41 | /** | |
42 | * pci_disable_rom - disable ROM decoding for a PCI device | |
67be2dd1 | 43 | * @pdev: PCI device to disable |
1da177e4 LT |
44 | * |
45 | * Disable ROM decoding on a PCI device by turning off the last bit in the | |
46 | * ROM BAR. | |
47 | */ | |
48 | static void pci_disable_rom(struct pci_dev *pdev) | |
49 | { | |
50 | u32 rom_addr; | |
51 | pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr); | |
52 | rom_addr &= ~PCI_ROM_ADDRESS_ENABLE; | |
53 | pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr); | |
54 | } | |
55 | ||
56 | /** | |
57 | * pci_map_rom - map a PCI ROM to kernel space | |
67be2dd1 | 58 | * @pdev: pointer to pci device struct |
1da177e4 LT |
59 | * @size: pointer to receive size of pci window over ROM |
60 | * @return: kernel virtual pointer to image of ROM | |
61 | * | |
62 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
63 | * the shadow BIOS copy will be returned instead of the | |
64 | * actual ROM. | |
65 | */ | |
66 | void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size) | |
67 | { | |
68 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
69 | loff_t start; | |
70 | void __iomem *rom; | |
71 | void __iomem *image; | |
72 | int last_image; | |
73 | ||
b5e4efe7 | 74 | /* |
75 | * IORESOURCE_ROM_SHADOW set if the VGA enable bit of the Bridge Control | |
76 | * register is set for embedded VGA. | |
77 | */ | |
1da177e4 LT |
78 | if (res->flags & IORESOURCE_ROM_SHADOW) { |
79 | /* primary video rom always starts here */ | |
80 | start = (loff_t)0xC0000; | |
81 | *size = 0x20000; /* cover C000:0 through E000:0 */ | |
82 | } else { | |
83 | if (res->flags & IORESOURCE_ROM_COPY) { | |
84 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
e31dd6e4 GKH |
85 | return (void __iomem *)(unsigned long) |
86 | pci_resource_start(pdev, PCI_ROM_RESOURCE); | |
1da177e4 LT |
87 | } else { |
88 | /* assign the ROM an address if it doesn't have one */ | |
8085ce08 BH |
89 | if (res->parent == NULL && |
90 | pci_assign_resource(pdev,PCI_ROM_RESOURCE)) | |
91 | return NULL; | |
1da177e4 LT |
92 | start = pci_resource_start(pdev, PCI_ROM_RESOURCE); |
93 | *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); | |
94 | if (*size == 0) | |
95 | return NULL; | |
96 | ||
97 | /* Enable ROM space decodes */ | |
8085ce08 BH |
98 | if (pci_enable_rom(pdev)) |
99 | return NULL; | |
1da177e4 LT |
100 | } |
101 | } | |
102 | ||
103 | rom = ioremap(start, *size); | |
104 | if (!rom) { | |
105 | /* restore enable if ioremap fails */ | |
106 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | | |
107 | IORESOURCE_ROM_SHADOW | | |
108 | IORESOURCE_ROM_COPY))) | |
109 | pci_disable_rom(pdev); | |
110 | return NULL; | |
111 | } | |
112 | ||
113 | /* | |
114 | * Try to find the true size of the ROM since sometimes the PCI window | |
115 | * size is much larger than the actual size of the ROM. | |
116 | * True size is important if the ROM is going to be copied. | |
117 | */ | |
118 | image = rom; | |
119 | do { | |
120 | void __iomem *pds; | |
121 | /* Standard PCI ROMs start out with these bytes 55 AA */ | |
122 | if (readb(image) != 0x55) | |
123 | break; | |
124 | if (readb(image + 1) != 0xAA) | |
125 | break; | |
126 | /* get the PCI data structure and check its signature */ | |
127 | pds = image + readw(image + 24); | |
128 | if (readb(pds) != 'P') | |
129 | break; | |
130 | if (readb(pds + 1) != 'C') | |
131 | break; | |
132 | if (readb(pds + 2) != 'I') | |
133 | break; | |
134 | if (readb(pds + 3) != 'R') | |
135 | break; | |
136 | last_image = readb(pds + 21) & 0x80; | |
137 | /* this length is reliable */ | |
138 | image += readw(pds + 16) * 512; | |
139 | } while (!last_image); | |
140 | ||
761a3ac0 JS |
141 | /* never return a size larger than the PCI resource window */ |
142 | /* there are known ROMs that get the size wrong */ | |
143 | *size = min((size_t)(image - rom), *size); | |
1da177e4 LT |
144 | |
145 | return rom; | |
146 | } | |
147 | ||
148 | /** | |
149 | * pci_map_rom_copy - map a PCI ROM to kernel space, create a copy | |
67be2dd1 | 150 | * @pdev: pointer to pci device struct |
1da177e4 LT |
151 | * @size: pointer to receive size of pci window over ROM |
152 | * @return: kernel virtual pointer to image of ROM | |
153 | * | |
154 | * Map a PCI ROM into kernel space. If ROM is boot video ROM, | |
155 | * the shadow BIOS copy will be returned instead of the | |
156 | * actual ROM. | |
157 | */ | |
158 | void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size) | |
159 | { | |
160 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
161 | void __iomem *rom; | |
162 | ||
163 | rom = pci_map_rom(pdev, size); | |
164 | if (!rom) | |
165 | return NULL; | |
166 | ||
167 | if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW)) | |
168 | return rom; | |
169 | ||
170 | res->start = (unsigned long)kmalloc(*size, GFP_KERNEL); | |
171 | if (!res->start) | |
172 | return rom; | |
173 | ||
174 | res->end = res->start + *size; | |
e31dd6e4 | 175 | memcpy_fromio((void*)(unsigned long)res->start, rom, *size); |
1da177e4 LT |
176 | pci_unmap_rom(pdev, rom); |
177 | res->flags |= IORESOURCE_ROM_COPY; | |
178 | ||
e31dd6e4 | 179 | return (void __iomem *)(unsigned long)res->start; |
1da177e4 LT |
180 | } |
181 | ||
182 | /** | |
183 | * pci_unmap_rom - unmap the ROM from kernel space | |
67be2dd1 | 184 | * @pdev: pointer to pci device struct |
1da177e4 LT |
185 | * @rom: virtual address of the previous mapping |
186 | * | |
187 | * Remove a mapping of a previously mapped ROM | |
188 | */ | |
189 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom) | |
190 | { | |
191 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
192 | ||
193 | if (res->flags & IORESOURCE_ROM_COPY) | |
194 | return; | |
195 | ||
196 | iounmap(rom); | |
197 | ||
198 | /* Disable again before continuing, leave enabled if pci=rom */ | |
199 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW))) | |
200 | pci_disable_rom(pdev); | |
201 | } | |
202 | ||
203 | /** | |
204 | * pci_remove_rom - disable the ROM and remove its sysfs attribute | |
67be2dd1 | 205 | * @pdev: pointer to pci device struct |
1da177e4 LT |
206 | * |
207 | * Remove the rom file in sysfs and disable ROM decoding. | |
208 | */ | |
209 | void pci_remove_rom(struct pci_dev *pdev) | |
210 | { | |
211 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
212 | ||
213 | if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) | |
214 | sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); | |
215 | if (!(res->flags & (IORESOURCE_ROM_ENABLE | | |
216 | IORESOURCE_ROM_SHADOW | | |
217 | IORESOURCE_ROM_COPY))) | |
218 | pci_disable_rom(pdev); | |
219 | } | |
220 | ||
221 | /** | |
222 | * pci_cleanup_rom - internal routine for freeing the ROM copy created | |
223 | * by pci_map_rom_copy called from remove.c | |
67be2dd1 | 224 | * @pdev: pointer to pci device struct |
1da177e4 LT |
225 | * |
226 | * Free the copied ROM if we allocated one. | |
227 | */ | |
228 | void pci_cleanup_rom(struct pci_dev *pdev) | |
229 | { | |
230 | struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; | |
231 | if (res->flags & IORESOURCE_ROM_COPY) { | |
e31dd6e4 | 232 | kfree((void*)(unsigned long)res->start); |
1da177e4 LT |
233 | res->flags &= ~IORESOURCE_ROM_COPY; |
234 | res->start = 0; | |
235 | res->end = 0; | |
236 | } | |
237 | } | |
238 | ||
239 | EXPORT_SYMBOL(pci_map_rom); | |
240 | EXPORT_SYMBOL(pci_map_rom_copy); | |
241 | EXPORT_SYMBOL(pci_unmap_rom); | |
242 | EXPORT_SYMBOL(pci_remove_rom); |