Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * drivers/pci/setup-res.c | |
3 | * | |
4 | * Extruded from code written by | |
5 | * Dave Rusling (david.rusling@reo.mts.dec.com) | |
6 | * David Mosberger (davidm@cs.arizona.edu) | |
7 | * David Miller (davem@redhat.com) | |
8 | * | |
9 | * Support routines for initializing a PCI subsystem. | |
10 | */ | |
11 | ||
12 | /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */ | |
13 | ||
14 | /* | |
15 | * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru> | |
16 | * Resource sorting | |
17 | */ | |
18 | ||
19 | #include <linux/init.h> | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/pci.h> | |
22 | #include <linux/errno.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/cache.h> | |
25 | #include <linux/slab.h> | |
26 | #include "pci.h" | |
27 | ||
28 | ||
80ccba11 | 29 | void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno) |
1da177e4 LT |
30 | { |
31 | struct pci_bus_region region; | |
32 | u32 new, check, mask; | |
33 | int reg; | |
34 | ||
fb0f2b40 RB |
35 | /* |
36 | * Ignore resources for unimplemented BARs and unused resource slots | |
37 | * for 64 bit BARs. | |
38 | */ | |
cf7bee5a IK |
39 | if (!res->flags) |
40 | return; | |
41 | ||
fb0f2b40 RB |
42 | /* |
43 | * Ignore non-moveable resources. This might be legacy resources for | |
44 | * which no functional BAR register exists or another important | |
80ccba11 | 45 | * system resource we shouldn't move around. |
fb0f2b40 RB |
46 | */ |
47 | if (res->flags & IORESOURCE_PCI_FIXED) | |
48 | return; | |
49 | ||
1da177e4 LT |
50 | pcibios_resource_to_bus(dev, ®ion, res); |
51 | ||
80ccba11 BH |
52 | dev_dbg(&dev->dev, "BAR %d: got res [%#llx-%#llx] bus [%#llx-%#llx] " |
53 | "flags %#lx\n", resno, | |
54 | (unsigned long long)res->start, | |
1396a8c3 | 55 | (unsigned long long)res->end, |
6015fbef BH |
56 | (unsigned long long)region.start, |
57 | (unsigned long long)region.end, | |
80ccba11 | 58 | (unsigned long)res->flags); |
1da177e4 LT |
59 | |
60 | new = region.start | (res->flags & PCI_REGION_FLAG_MASK); | |
61 | if (res->flags & IORESOURCE_IO) | |
62 | mask = (u32)PCI_BASE_ADDRESS_IO_MASK; | |
63 | else | |
64 | mask = (u32)PCI_BASE_ADDRESS_MEM_MASK; | |
65 | ||
66 | if (resno < 6) { | |
67 | reg = PCI_BASE_ADDRESS_0 + 4 * resno; | |
68 | } else if (resno == PCI_ROM_RESOURCE) { | |
755528c8 LT |
69 | if (!(res->flags & IORESOURCE_ROM_ENABLE)) |
70 | return; | |
71 | new |= PCI_ROM_ADDRESS_ENABLE; | |
1da177e4 LT |
72 | reg = dev->rom_base_reg; |
73 | } else { | |
74 | /* Hmm, non-standard resource. */ | |
75 | ||
76 | return; /* kill uninitialised var warning */ | |
77 | } | |
78 | ||
79 | pci_write_config_dword(dev, reg, new); | |
80 | pci_read_config_dword(dev, reg, &check); | |
81 | ||
82 | if ((new ^ check) & mask) { | |
80ccba11 BH |
83 | dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n", |
84 | resno, new, check); | |
1da177e4 LT |
85 | } |
86 | ||
87 | if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == | |
88 | (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) { | |
cf7bee5a | 89 | new = region.start >> 16 >> 16; |
1da177e4 LT |
90 | pci_write_config_dword(dev, reg + 4, new); |
91 | pci_read_config_dword(dev, reg + 4, &check); | |
92 | if (check != new) { | |
80ccba11 BH |
93 | dev_err(&dev->dev, "BAR %d: error updating " |
94 | "(high %#08x != %#08x)\n", resno, new, check); | |
1da177e4 LT |
95 | } |
96 | } | |
97 | res->flags &= ~IORESOURCE_UNSET; | |
80ccba11 BH |
98 | dev_dbg(&dev->dev, "BAR %d: moved to bus [%#llx-%#llx] flags %#lx\n", |
99 | resno, (unsigned long long)region.start, | |
100 | (unsigned long long)region.end, res->flags); | |
1da177e4 LT |
101 | } |
102 | ||
96bde06a | 103 | int pci_claim_resource(struct pci_dev *dev, int resource) |
1da177e4 LT |
104 | { |
105 | struct resource *res = &dev->resource[resource]; | |
106 | struct resource *root = NULL; | |
107 | char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge"; | |
108 | int err; | |
109 | ||
085ae41f | 110 | root = pcibios_select_root(dev, res); |
1da177e4 LT |
111 | |
112 | err = -EINVAL; | |
113 | if (root != NULL) | |
114 | err = insert_resource(root, res); | |
115 | ||
116 | if (err) { | |
80ccba11 BH |
117 | dev_err(&dev->dev, "BAR %d: %s of %s [%#llx-%#llx]\n", |
118 | resource, | |
119 | root ? "address space collision on" : | |
120 | "no parent found for", | |
121 | dtype, | |
1396a8c3 GKH |
122 | (unsigned long long)res->start, |
123 | (unsigned long long)res->end); | |
1da177e4 LT |
124 | } |
125 | ||
126 | return err; | |
127 | } | |
128 | ||
129 | int pci_assign_resource(struct pci_dev *dev, int resno) | |
130 | { | |
131 | struct pci_bus *bus = dev->bus; | |
132 | struct resource *res = dev->resource + resno; | |
e31dd6e4 | 133 | resource_size_t size, min, align; |
1da177e4 LT |
134 | int ret; |
135 | ||
136 | size = res->end - res->start + 1; | |
137 | min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM; | |
88452565 IK |
138 | |
139 | align = resource_alignment(res); | |
140 | if (!align) { | |
80ccba11 BH |
141 | dev_err(&dev->dev, "BAR %d: can't allocate resource (bogus " |
142 | "alignment) [%#llx-%#llx] flags %#lx\n", | |
88452565 | 143 | resno, (unsigned long long)res->start, |
80ccba11 | 144 | (unsigned long long)res->end, res->flags); |
88452565 IK |
145 | return -EINVAL; |
146 | } | |
1da177e4 LT |
147 | |
148 | /* First, try exact prefetching match.. */ | |
149 | ret = pci_bus_alloc_resource(bus, res, size, align, min, | |
150 | IORESOURCE_PREFETCH, | |
151 | pcibios_align_resource, dev); | |
152 | ||
153 | if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) { | |
154 | /* | |
155 | * That failed. | |
156 | * | |
157 | * But a prefetching area can handle a non-prefetching | |
158 | * window (it will just not perform as well). | |
159 | */ | |
160 | ret = pci_bus_alloc_resource(bus, res, size, align, min, 0, | |
161 | pcibios_align_resource, dev); | |
162 | } | |
163 | ||
164 | if (ret) { | |
80ccba11 BH |
165 | dev_err(&dev->dev, "BAR %d: can't allocate %s resource " |
166 | "[%#llx-%#llx]\n", resno, | |
1396a8c3 | 167 | res->flags & IORESOURCE_IO ? "I/O" : "mem", |
80ccba11 BH |
168 | (unsigned long long)res->start, |
169 | (unsigned long long)res->end); | |
88452565 IK |
170 | } else { |
171 | res->flags &= ~IORESOURCE_STARTALIGN; | |
172 | if (resno < PCI_BRIDGE_RESOURCES) | |
173 | pci_update_resource(dev, res, resno); | |
1da177e4 LT |
174 | } |
175 | ||
176 | return ret; | |
177 | } | |
178 | ||
2baad5f9 | 179 | #if 0 |
75acfeca KG |
180 | int pci_assign_resource_fixed(struct pci_dev *dev, int resno) |
181 | { | |
182 | struct pci_bus *bus = dev->bus; | |
183 | struct resource *res = dev->resource + resno; | |
184 | unsigned int type_mask; | |
185 | int i, ret = -EBUSY; | |
186 | ||
187 | type_mask = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH; | |
188 | ||
189 | for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) { | |
190 | struct resource *r = bus->resource[i]; | |
191 | if (!r) | |
192 | continue; | |
193 | ||
194 | /* type_mask must match */ | |
195 | if ((res->flags ^ r->flags) & type_mask) | |
196 | continue; | |
197 | ||
198 | ret = request_resource(r, res); | |
199 | ||
200 | if (ret == 0) | |
201 | break; | |
202 | } | |
203 | ||
204 | if (ret) { | |
80ccba11 BH |
205 | dev_err(&dev->dev, "BAR %d: can't allocate %s resource " |
206 | "[%#llx-%#llx\n]", resno, | |
75acfeca | 207 | res->flags & IORESOURCE_IO ? "I/O" : "mem", |
80ccba11 BH |
208 | (unsigned long long)res->start, |
209 | (unsigned long long)res->end); | |
75acfeca KG |
210 | } else if (resno < PCI_BRIDGE_RESOURCES) { |
211 | pci_update_resource(dev, res, resno); | |
212 | } | |
213 | ||
214 | return ret; | |
215 | } | |
216 | EXPORT_SYMBOL_GPL(pci_assign_resource_fixed); | |
217 | #endif | |
218 | ||
1da177e4 | 219 | /* Sort resources by alignment */ |
96bde06a | 220 | void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) |
1da177e4 LT |
221 | { |
222 | int i; | |
223 | ||
224 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
225 | struct resource *r; | |
226 | struct resource_list *list, *tmp; | |
e31dd6e4 | 227 | resource_size_t r_align; |
1da177e4 LT |
228 | |
229 | r = &dev->resource[i]; | |
fb0f2b40 RB |
230 | |
231 | if (r->flags & IORESOURCE_PCI_FIXED) | |
232 | continue; | |
233 | ||
1da177e4 LT |
234 | if (!(r->flags) || r->parent) |
235 | continue; | |
88452565 IK |
236 | |
237 | r_align = resource_alignment(r); | |
1da177e4 | 238 | if (!r_align) { |
80ccba11 BH |
239 | dev_warn(&dev->dev, "BAR %d: bogus alignment " |
240 | "[%#llx-%#llx] flags %#lx\n", | |
1396a8c3 | 241 | i, (unsigned long long)r->start, |
80ccba11 | 242 | (unsigned long long)r->end, r->flags); |
1da177e4 LT |
243 | continue; |
244 | } | |
1da177e4 | 245 | for (list = head; ; list = list->next) { |
e31dd6e4 | 246 | resource_size_t align = 0; |
1da177e4 | 247 | struct resource_list *ln = list->next; |
88452565 IK |
248 | |
249 | if (ln) | |
250 | align = resource_alignment(ln->res); | |
251 | ||
1da177e4 LT |
252 | if (r_align > align) { |
253 | tmp = kmalloc(sizeof(*tmp), GFP_KERNEL); | |
254 | if (!tmp) | |
255 | panic("pdev_sort_resources(): " | |
256 | "kmalloc() failed!\n"); | |
257 | tmp->next = ln; | |
258 | tmp->res = r; | |
259 | tmp->dev = dev; | |
260 | list->next = tmp; | |
261 | break; | |
262 | } | |
263 | } | |
264 | } | |
265 | } | |
842de40d BH |
266 | |
267 | int pci_enable_resources(struct pci_dev *dev, int mask) | |
268 | { | |
269 | u16 cmd, old_cmd; | |
270 | int i; | |
271 | struct resource *r; | |
272 | ||
273 | pci_read_config_word(dev, PCI_COMMAND, &cmd); | |
274 | old_cmd = cmd; | |
275 | ||
276 | for (i = 0; i < PCI_NUM_RESOURCES; i++) { | |
277 | if (!(mask & (1 << i))) | |
278 | continue; | |
279 | ||
280 | r = &dev->resource[i]; | |
281 | ||
282 | if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM))) | |
283 | continue; | |
284 | if ((i == PCI_ROM_RESOURCE) && | |
285 | (!(r->flags & IORESOURCE_ROM_ENABLE))) | |
286 | continue; | |
287 | ||
288 | if (!r->parent) { | |
289 | dev_err(&dev->dev, "device not available because of " | |
80ccba11 | 290 | "BAR %d [%#llx-%#llx] collisions\n", i, |
842de40d BH |
291 | (unsigned long long) r->start, |
292 | (unsigned long long) r->end); | |
293 | return -EINVAL; | |
294 | } | |
295 | ||
296 | if (r->flags & IORESOURCE_IO) | |
297 | cmd |= PCI_COMMAND_IO; | |
298 | if (r->flags & IORESOURCE_MEM) | |
299 | cmd |= PCI_COMMAND_MEMORY; | |
300 | } | |
301 | ||
302 | if (cmd != old_cmd) { | |
303 | dev_info(&dev->dev, "enabling device (%04x -> %04x)\n", | |
304 | old_cmd, cmd); | |
305 | pci_write_config_word(dev, PCI_COMMAND, cmd); | |
306 | } | |
307 | return 0; | |
308 | } |