OneNAND: Write oob area with aligned size, mtd->oobsize
[deliverable/linux.git] / drivers / pcmcia / au1000_generic.h
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1/*
2 * Alchemy Semi Au1000 pcmcia driver include file
3 *
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * ppopov@mvista.com or source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21#ifndef __ASM_AU1000_PCMCIA_H
22#define __ASM_AU1000_PCMCIA_H
23
24/* include the world */
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25#include <linux/config.h>
26
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27#include <pcmcia/cs_types.h>
28#include <pcmcia/cs.h>
29#include <pcmcia/ss.h>
30#include <pcmcia/bulkmem.h>
31#include <pcmcia/cistpl.h>
32#include "cs_internal.h"
33
34#define AU1000_PCMCIA_POLL_PERIOD (2*HZ)
35#define AU1000_PCMCIA_IO_SPEED (255)
36#define AU1000_PCMCIA_MEM_SPEED (300)
37
38#define AU1X_SOCK0_IO 0xF00000000
39#define AU1X_SOCK0_PHYS_ATTR 0xF40000000
40#define AU1X_SOCK0_PHYS_MEM 0xF80000000
41/* pseudo 32 bit phys addresses, which get fixed up to the
42 * real 36 bit address in fixup_bigphys_addr() */
43#define AU1X_SOCK0_PSEUDO_PHYS_ATTR 0xF4000000
44#define AU1X_SOCK0_PSEUDO_PHYS_MEM 0xF8000000
45
46/* pcmcia socket 1 needs external glue logic so the memory map
47 * differs from board to board.
48 */
d6460827 49#if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100) || defined(CONFIG_MIPS_PB1500) || defined(CONFIG_MIPS_PB1550) || defined(CONFIG_MIPS_PB1200)
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50#define AU1X_SOCK1_IO 0xF08000000
51#define AU1X_SOCK1_PHYS_ATTR 0xF48000000
52#define AU1X_SOCK1_PHYS_MEM 0xF88000000
53#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4800000
54#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8800000
d6460827 55#elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100) || defined(CONFIG_MIPS_DB1500) || defined(CONFIG_MIPS_DB1550) || defined(CONFIG_MIPS_DB1200)
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56#define AU1X_SOCK1_IO 0xF04000000
57#define AU1X_SOCK1_PHYS_ATTR 0xF44000000
58#define AU1X_SOCK1_PHYS_MEM 0xF84000000
59#define AU1X_SOCK1_PSEUDO_PHYS_ATTR 0xF4400000
60#define AU1X_SOCK1_PSEUDO_PHYS_MEM 0xF8400000
61#endif
62
63struct pcmcia_state {
64 unsigned detect: 1,
65 ready: 1,
66 wrprot: 1,
67 bvd1: 1,
68 bvd2: 1,
69 vs_3v: 1,
70 vs_Xv: 1;
71};
72
73struct pcmcia_configure {
74 unsigned sock: 8,
75 vcc: 8,
76 vpp: 8,
77 output: 1,
78 speaker: 1,
79 reset: 1;
80};
81
82struct pcmcia_irqs {
83 int sock;
84 int irq;
85 const char *str;
86};
87
88
89struct au1000_pcmcia_socket {
90 struct pcmcia_socket socket;
91
92 /*
93 * Info from low level handler
94 */
95 struct device *dev;
96 unsigned int nr;
97 unsigned int irq;
98
99 /*
100 * Core PCMCIA state
101 */
102 struct pcmcia_low_level *ops;
103
104 unsigned int status;
105 socket_state_t cs_state;
106
107 unsigned short spd_io[MAX_IO_WIN];
108 unsigned short spd_mem[MAX_WIN];
109 unsigned short spd_attr[MAX_WIN];
110
111 struct resource res_skt;
112 struct resource res_io;
113 struct resource res_mem;
114 struct resource res_attr;
115
116 void * virt_io;
117 ioaddr_t phys_io;
118 unsigned int phys_attr;
119 unsigned int phys_mem;
120 unsigned short speed_io, speed_attr, speed_mem;
121
122 unsigned int irq_state;
123
124 struct timer_list poll_timer;
125};
126
127struct pcmcia_low_level {
128 struct module *owner;
129
130 int (*hw_init)(struct au1000_pcmcia_socket *);
131 void (*hw_shutdown)(struct au1000_pcmcia_socket *);
132
133 void (*socket_state)(struct au1000_pcmcia_socket *, struct pcmcia_state *);
134 int (*configure_socket)(struct au1000_pcmcia_socket *, struct socket_state_t *);
135
136 /*
137 * Enable card status IRQs on (re-)initialisation. This can
138 * be called at initialisation, power management event, or
139 * pcmcia event.
140 */
141 void (*socket_init)(struct au1000_pcmcia_socket *);
142
143 /*
144 * Disable card status IRQs and PCMCIA bus on suspend.
145 */
146 void (*socket_suspend)(struct au1000_pcmcia_socket *);
147};
148
149extern int au1x_board_init(struct device *dev);
150
151#endif /* __ASM_AU1000_PCMCIA_H */
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