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1da177e4 LT |
1 | /*====================================================================== |
2 | ||
3 | Device driver for the PCMCIA control functionality of PXA2xx | |
4 | microprocessors. | |
5 | ||
6 | The contents of this file may be used under the | |
7 | terms of the GNU Public License version 2 (the "GPL") | |
8 | ||
9 | (c) Ian Molton (spyro@f2s.com) 2003 | |
10 | (c) Stefan Eletzhofer (stefan.eletzhofer@inquant.de) 2003,4 | |
11 | ||
12 | derived from sa11xx_base.c | |
13 | ||
14 | Portions created by John G. Dorsey are | |
15 | Copyright (C) 1999 John G. Dorsey. | |
16 | ||
17 | ======================================================================*/ | |
18 | ||
19 | #include <linux/module.h> | |
20 | #include <linux/init.h> | |
1da177e4 LT |
21 | #include <linux/cpufreq.h> |
22 | #include <linux/ioport.h> | |
23 | #include <linux/kernel.h> | |
24 | #include <linux/spinlock.h> | |
d052d1be | 25 | #include <linux/platform_device.h> |
1da177e4 LT |
26 | |
27 | #include <asm/hardware.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/irq.h> | |
30 | #include <asm/system.h> | |
31 | #include <asm/arch/pxa-regs.h> | |
8785a8fb | 32 | #include <asm/arch/pxa2xx-regs.h> |
1da177e4 LT |
33 | |
34 | #include <pcmcia/cs_types.h> | |
35 | #include <pcmcia/ss.h> | |
36 | #include <pcmcia/bulkmem.h> | |
37 | #include <pcmcia/cistpl.h> | |
38 | ||
39 | #include "cs_internal.h" | |
40 | #include "soc_common.h" | |
41 | #include "pxa2xx_base.h" | |
42 | ||
43 | ||
44 | #define MCXX_SETUP_MASK (0x7f) | |
45 | #define MCXX_ASST_MASK (0x1f) | |
46 | #define MCXX_HOLD_MASK (0x3f) | |
47 | #define MCXX_SETUP_SHIFT (0) | |
48 | #define MCXX_ASST_SHIFT (7) | |
49 | #define MCXX_HOLD_SHIFT (14) | |
50 | ||
51 | static inline u_int pxa2xx_mcxx_hold(u_int pcmcia_cycle_ns, | |
52 | u_int mem_clk_10khz) | |
53 | { | |
54 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; | |
55 | return (code / 300000) + ((code % 300000) ? 1 : 0) - 1; | |
56 | } | |
57 | ||
58 | static inline u_int pxa2xx_mcxx_asst(u_int pcmcia_cycle_ns, | |
59 | u_int mem_clk_10khz) | |
60 | { | |
61 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; | |
24d6572b | 62 | return (code / 300000) + ((code % 300000) ? 1 : 0) + 1; |
1da177e4 LT |
63 | } |
64 | ||
65 | static inline u_int pxa2xx_mcxx_setup(u_int pcmcia_cycle_ns, | |
66 | u_int mem_clk_10khz) | |
67 | { | |
68 | u_int code = pcmcia_cycle_ns * mem_clk_10khz; | |
69 | return (code / 100000) + ((code % 100000) ? 1 : 0) - 1; | |
70 | } | |
71 | ||
72 | /* This function returns the (approximate) command assertion period, in | |
73 | * nanoseconds, for a given CPU clock frequency and MCXX_ASST value: | |
74 | */ | |
75 | static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, | |
76 | u_int pcmcia_mcxx_asst) | |
77 | { | |
78 | return (300000 * (pcmcia_mcxx_asst + 1) / mem_clk_10khz); | |
79 | } | |
80 | ||
81 | static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) | |
82 | { | |
83 | MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock) | |
84 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | |
85 | | ((pxa2xx_mcxx_asst(speed, clock) | |
86 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | |
87 | | ((pxa2xx_mcxx_hold(speed, clock) | |
88 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | |
89 | ||
90 | return 0; | |
91 | } | |
92 | ||
93 | static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) | |
94 | { | |
95 | MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock) | |
96 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | |
97 | | ((pxa2xx_mcxx_asst(speed, clock) | |
98 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | |
99 | | ((pxa2xx_mcxx_hold(speed, clock) | |
100 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | |
101 | ||
102 | return 0; | |
103 | } | |
104 | ||
105 | static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) | |
106 | { | |
107 | MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock) | |
108 | & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | |
109 | | ((pxa2xx_mcxx_asst(speed, clock) | |
110 | & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | |
111 | | ((pxa2xx_mcxx_hold(speed, clock) | |
112 | & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); | |
113 | ||
114 | return 0; | |
115 | } | |
116 | ||
117 | static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int clk) | |
118 | { | |
119 | struct soc_pcmcia_timing timing; | |
120 | int sock = skt->nr; | |
121 | ||
122 | soc_common_pcmcia_get_timing(skt, &timing); | |
123 | ||
124 | pxa2xx_pcmcia_set_mcmem(sock, timing.mem, clk); | |
125 | pxa2xx_pcmcia_set_mcatt(sock, timing.attr, clk); | |
126 | pxa2xx_pcmcia_set_mcio(sock, timing.io, clk); | |
127 | ||
128 | return 0; | |
129 | } | |
130 | ||
131 | static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) | |
132 | { | |
133 | unsigned int clk = get_memclk_frequency_10khz(); | |
134 | return pxa2xx_pcmcia_set_mcxx(skt, clk); | |
135 | } | |
136 | ||
137 | #ifdef CONFIG_CPU_FREQ | |
138 | ||
139 | static int | |
140 | pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, | |
141 | unsigned long val, | |
142 | struct cpufreq_freqs *freqs) | |
143 | { | |
144 | #warning "it's not clear if this is right since the core CPU (N) clock has no effect on the memory (L) clock" | |
145 | switch (val) { | |
146 | case CPUFREQ_PRECHANGE: | |
147 | if (freqs->new > freqs->old) { | |
148 | debug(skt, 2, "new frequency %u.%uMHz > %u.%uMHz, " | |
149 | "pre-updating\n", | |
150 | freqs->new / 1000, (freqs->new / 100) % 10, | |
151 | freqs->old / 1000, (freqs->old / 100) % 10); | |
152 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); | |
153 | } | |
154 | break; | |
155 | ||
156 | case CPUFREQ_POSTCHANGE: | |
157 | if (freqs->new < freqs->old) { | |
158 | debug(skt, 2, "new frequency %u.%uMHz < %u.%uMHz, " | |
159 | "post-updating\n", | |
160 | freqs->new / 1000, (freqs->new / 100) % 10, | |
161 | freqs->old / 1000, (freqs->old / 100) % 10); | |
162 | pxa2xx_pcmcia_set_mcxx(skt, freqs->new); | |
163 | } | |
164 | break; | |
165 | } | |
166 | return 0; | |
167 | } | |
168 | #endif | |
169 | ||
9468613b | 170 | int __pxa2xx_drv_pcmcia_probe(struct device *dev) |
1da177e4 LT |
171 | { |
172 | int ret; | |
173 | struct pcmcia_low_level *ops; | |
174 | int first, nr; | |
175 | ||
176 | if (!dev || !dev->platform_data) | |
177 | return -ENODEV; | |
178 | ||
179 | ops = (struct pcmcia_low_level *)dev->platform_data; | |
180 | first = ops->first; | |
181 | nr = ops->nr; | |
182 | ||
183 | /* Provide our PXA2xx specific timing routines. */ | |
184 | ops->set_timing = pxa2xx_pcmcia_set_timing; | |
185 | #ifdef CONFIG_CPU_FREQ | |
186 | ops->frequency_change = pxa2xx_pcmcia_frequency_change; | |
187 | #endif | |
188 | ||
189 | ret = soc_common_drv_pcmcia_probe(dev, ops, first, nr); | |
190 | ||
191 | if (ret == 0) { | |
192 | /* | |
193 | * We have at least one socket, so set MECR:CIT | |
194 | * (Card Is There) | |
195 | */ | |
196 | MECR |= MECR_CIT; | |
197 | ||
198 | /* Set MECR:NOS (Number Of Sockets) */ | |
199 | if (nr > 1) | |
200 | MECR |= MECR_NOS; | |
201 | else | |
202 | MECR &= ~MECR_NOS; | |
203 | } | |
204 | ||
205 | return ret; | |
206 | } | |
9468613b | 207 | EXPORT_SYMBOL(__pxa2xx_drv_pcmcia_probe); |
1da177e4 | 208 | |
9468613b RK |
209 | |
210 | static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) | |
211 | { | |
212 | return __pxa2xx_drv_pcmcia_probe(&dev->dev); | |
213 | } | |
214 | ||
215 | static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev) | |
216 | { | |
217 | return soc_common_drv_pcmcia_remove(&dev->dev); | |
218 | } | |
219 | ||
220 | static int pxa2xx_drv_pcmcia_suspend(struct platform_device *dev, pm_message_t state) | |
221 | { | |
222 | return pcmcia_socket_dev_suspend(&dev->dev, state); | |
223 | } | |
224 | ||
225 | static int pxa2xx_drv_pcmcia_resume(struct platform_device *dev) | |
1da177e4 | 226 | { |
9468613b | 227 | struct pcmcia_low_level *ops = dev->dev.platform_data; |
9480e307 | 228 | int nr = ops ? ops->nr : 0; |
1da177e4 | 229 | |
9480e307 RK |
230 | MECR = nr > 1 ? MECR_CIT | MECR_NOS : (nr > 0 ? MECR_CIT : 0); |
231 | ||
9468613b | 232 | return pcmcia_socket_dev_resume(&dev->dev); |
1da177e4 LT |
233 | } |
234 | ||
9468613b | 235 | static struct platform_driver pxa2xx_pcmcia_driver = { |
1da177e4 | 236 | .probe = pxa2xx_drv_pcmcia_probe, |
9468613b RK |
237 | .remove = pxa2xx_drv_pcmcia_remove, |
238 | .suspend = pxa2xx_drv_pcmcia_suspend, | |
1da177e4 | 239 | .resume = pxa2xx_drv_pcmcia_resume, |
9468613b RK |
240 | .driver = { |
241 | .name = "pxa2xx-pcmcia", | |
242 | }, | |
1da177e4 LT |
243 | }; |
244 | ||
245 | static int __init pxa2xx_pcmcia_init(void) | |
246 | { | |
9468613b | 247 | return platform_driver_register(&pxa2xx_pcmcia_driver); |
1da177e4 LT |
248 | } |
249 | ||
250 | static void __exit pxa2xx_pcmcia_exit(void) | |
251 | { | |
9468613b | 252 | platform_driver_unregister(&pxa2xx_pcmcia_driver); |
1da177e4 LT |
253 | } |
254 | ||
f36598ae | 255 | fs_initcall(pxa2xx_pcmcia_init); |
1da177e4 LT |
256 | module_exit(pxa2xx_pcmcia_exit); |
257 | ||
258 | MODULE_AUTHOR("Stefan Eletzhofer <stefan.eletzhofer@inquant.de> and Ian Molton <spyro@f2s.com>"); | |
259 | MODULE_DESCRIPTION("Linux PCMCIA Card Services: PXA2xx core socket driver"); | |
260 | MODULE_LICENSE("GPL"); |