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1 | /* |
2 | * drivers/pcmcia/sa1100_nanoengine.c | |
3 | * | |
4 | * PCMCIA implementation routines for BSI nanoEngine. | |
5 | * | |
6 | * In order to have a fully functional pcmcia subsystem in a BSE nanoEngine | |
7 | * board you should carefully read this: | |
8 | * http://cambuca.ldhs.cetuc.puc-rio.br/nanoengine/ | |
9 | * | |
10 | * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> | |
11 | * | |
12 | * Based on original work for kernel 2.4 by | |
13 | * Miguel Freitas <miguel@cpti.cetuc.puc-rio.br> | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or modify | |
16 | * it under the terms of the GNU General Public License version 2 as | |
17 | * published by the Free Software Foundation. | |
18 | * | |
19 | */ | |
20 | #include <linux/device.h> | |
21 | #include <linux/errno.h> | |
76346a4e | 22 | #include <linux/gpio.h> |
fa87672a MRJ |
23 | #include <linux/interrupt.h> |
24 | #include <linux/irq.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/signal.h> | |
29 | ||
30 | #include <asm/mach-types.h> | |
31 | #include <asm/irq.h> | |
32 | ||
33 | #include <mach/hardware.h> | |
34 | #include <mach/nanoengine.h> | |
35 | ||
36 | #include "sa1100_generic.h" | |
37 | ||
fa87672a | 38 | struct nanoengine_pins { |
fa87672a MRJ |
39 | unsigned output_pins; |
40 | unsigned clear_outputs; | |
76346a4e | 41 | int gpio_rst; |
7cf779cb RK |
42 | int gpio_cd; |
43 | int gpio_rdy; | |
fa87672a MRJ |
44 | }; |
45 | ||
46 | static struct nanoengine_pins nano_skts[] = { | |
47 | { | |
76346a4e | 48 | .gpio_rst = GPIO_PC_RESET0, |
7cf779cb RK |
49 | .gpio_cd = GPIO_PC_CD0, |
50 | .gpio_rdy = GPIO_PC_READY0, | |
fa87672a | 51 | }, { |
76346a4e | 52 | .gpio_rst = GPIO_PC_RESET1, |
7cf779cb RK |
53 | .gpio_cd = GPIO_PC_CD1, |
54 | .gpio_rdy = GPIO_PC_READY1, | |
fa87672a MRJ |
55 | } |
56 | }; | |
57 | ||
58 | unsigned num_nano_pcmcia_sockets = ARRAY_SIZE(nano_skts); | |
59 | ||
60 | static int nanoengine_pcmcia_hw_init(struct soc_pcmcia_socket *skt) | |
61 | { | |
62 | unsigned i = skt->nr; | |
76346a4e | 63 | int ret; |
fa87672a MRJ |
64 | |
65 | if (i >= num_nano_pcmcia_sockets) | |
66 | return -ENXIO; | |
67 | ||
76346a4e RK |
68 | ret = gpio_request_one(nano_skts[i].gpio_rst, GPIOF_OUT_INIT_LOW, |
69 | i ? "PC RST1" : "PC RST0"); | |
70 | if (ret) | |
71 | return ret; | |
fa87672a | 72 | |
7cf779cb RK |
73 | skt->stat[SOC_STAT_CD].gpio = nano_skts[i].gpio_cd; |
74 | skt->stat[SOC_STAT_CD].name = i ? "PC CD1" : "PC CD0"; | |
75 | skt->stat[SOC_STAT_RDY].gpio = nano_skts[i].gpio_rdy; | |
76 | skt->stat[SOC_STAT_RDY].name = i ? "PC RDY1" : "PC RDY0"; | |
fa87672a | 77 | |
7cf779cb | 78 | return 0; |
fa87672a MRJ |
79 | } |
80 | ||
76346a4e RK |
81 | static void nanoengine_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) |
82 | { | |
83 | gpio_free(nano_skts[skt->nr].gpio_rst); | |
84 | } | |
85 | ||
fa87672a MRJ |
86 | static int nanoengine_pcmcia_configure_socket( |
87 | struct soc_pcmcia_socket *skt, const socket_state_t *state) | |
88 | { | |
fa87672a MRJ |
89 | unsigned i = skt->nr; |
90 | ||
91 | if (i >= num_nano_pcmcia_sockets) | |
92 | return -ENXIO; | |
93 | ||
76346a4e | 94 | gpio_set_value(nano_skts[skt->nr].gpio_rst, !!(state->flags & SS_RESET)); |
fa87672a MRJ |
95 | |
96 | return 0; | |
97 | } | |
98 | ||
99 | static void nanoengine_pcmcia_socket_state( | |
100 | struct soc_pcmcia_socket *skt, struct pcmcia_state *state) | |
101 | { | |
fa87672a MRJ |
102 | unsigned i = skt->nr; |
103 | ||
104 | if (i >= num_nano_pcmcia_sockets) | |
105 | return; | |
106 | ||
fa87672a MRJ |
107 | state->bvd1 = 1; |
108 | state->bvd2 = 1; | |
fa87672a MRJ |
109 | state->vs_3v = 1; /* Can only apply 3.3V */ |
110 | state->vs_Xv = 0; | |
111 | } | |
112 | ||
fa87672a MRJ |
113 | static struct pcmcia_low_level nanoengine_pcmcia_ops = { |
114 | .owner = THIS_MODULE, | |
115 | ||
116 | .hw_init = nanoengine_pcmcia_hw_init, | |
76346a4e | 117 | .hw_shutdown = nanoengine_pcmcia_hw_shutdown, |
fa87672a MRJ |
118 | |
119 | .configure_socket = nanoengine_pcmcia_configure_socket, | |
120 | .socket_state = nanoengine_pcmcia_socket_state, | |
fa87672a MRJ |
121 | }; |
122 | ||
123 | int pcmcia_nanoengine_init(struct device *dev) | |
124 | { | |
125 | int ret = -ENODEV; | |
126 | ||
127 | if (machine_is_nanoengine()) | |
128 | ret = sa11xx_drv_pcmcia_probe( | |
129 | dev, &nanoengine_pcmcia_ops, 0, 2); | |
130 | ||
131 | return ret; | |
132 | } | |
133 |