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1da177e4 LT |
1 | /* |
2 | * linux/drivers/pcmcia/soc_common.h | |
3 | * | |
4 | * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu> | |
5 | * | |
6 | * This file contains definitions for the PCMCIA support code common to | |
7 | * integrated SOCs like the SA-11x0 and PXA2xx microprocessors. | |
8 | */ | |
9 | #ifndef _ASM_ARCH_PCMCIA | |
10 | #define _ASM_ARCH_PCMCIA | |
11 | ||
12 | /* include the world */ | |
13 | #include <linux/cpufreq.h> | |
1da177e4 LT |
14 | #include <pcmcia/cs_types.h> |
15 | #include <pcmcia/cs.h> | |
16 | #include <pcmcia/ss.h> | |
17 | #include <pcmcia/bulkmem.h> | |
18 | #include <pcmcia/cistpl.h> | |
19 | #include "cs_internal.h" | |
20 | ||
21 | ||
22 | struct device; | |
23 | struct pcmcia_low_level; | |
24 | ||
25 | /* | |
26 | * This structure encapsulates per-socket state which we might need to | |
27 | * use when responding to a Card Services query of some kind. | |
28 | */ | |
29 | struct soc_pcmcia_socket { | |
30 | struct pcmcia_socket socket; | |
31 | ||
32 | /* | |
33 | * Info from low level handler | |
34 | */ | |
35 | struct device *dev; | |
36 | unsigned int nr; | |
37 | unsigned int irq; | |
38 | ||
39 | /* | |
40 | * Core PCMCIA state | |
41 | */ | |
42 | struct pcmcia_low_level *ops; | |
43 | ||
44 | unsigned int status; | |
45 | socket_state_t cs_state; | |
46 | ||
47 | unsigned short spd_io[MAX_IO_WIN]; | |
48 | unsigned short spd_mem[MAX_WIN]; | |
49 | unsigned short spd_attr[MAX_WIN]; | |
50 | ||
51 | struct resource res_skt; | |
52 | struct resource res_io; | |
53 | struct resource res_mem; | |
54 | struct resource res_attr; | |
55 | void __iomem *virt_io; | |
56 | ||
57 | unsigned int irq_state; | |
58 | ||
59 | struct timer_list poll_timer; | |
60 | struct list_head node; | |
61 | }; | |
62 | ||
63 | struct pcmcia_state { | |
64 | unsigned detect: 1, | |
65 | ready: 1, | |
66 | bvd1: 1, | |
67 | bvd2: 1, | |
68 | wrprot: 1, | |
69 | vs_3v: 1, | |
70 | vs_Xv: 1; | |
71 | }; | |
72 | ||
73 | struct pcmcia_low_level { | |
74 | struct module *owner; | |
75 | ||
76 | /* first socket in system */ | |
77 | int first; | |
78 | /* nr of sockets */ | |
79 | int nr; | |
80 | ||
81 | int (*hw_init)(struct soc_pcmcia_socket *); | |
82 | void (*hw_shutdown)(struct soc_pcmcia_socket *); | |
83 | ||
84 | void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *); | |
85 | int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *); | |
86 | ||
87 | /* | |
88 | * Enable card status IRQs on (re-)initialisation. This can | |
89 | * be called at initialisation, power management event, or | |
90 | * pcmcia event. | |
91 | */ | |
92 | void (*socket_init)(struct soc_pcmcia_socket *); | |
93 | ||
94 | /* | |
95 | * Disable card status IRQs and PCMCIA bus on suspend. | |
96 | */ | |
97 | void (*socket_suspend)(struct soc_pcmcia_socket *); | |
98 | ||
99 | /* | |
100 | * Hardware specific timing routines. | |
101 | * If provided, the get_timing routine overrides the SOC default. | |
102 | */ | |
103 | unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int); | |
104 | int (*set_timing)(struct soc_pcmcia_socket *); | |
105 | int (*show_timing)(struct soc_pcmcia_socket *, char *); | |
106 | ||
107 | #ifdef CONFIG_CPU_FREQ | |
108 | /* | |
109 | * CPUFREQ support. | |
110 | */ | |
111 | int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *); | |
112 | #endif | |
113 | }; | |
114 | ||
115 | ||
116 | struct pcmcia_irqs { | |
117 | int sock; | |
118 | int irq; | |
119 | const char *str; | |
120 | }; | |
121 | ||
122 | struct soc_pcmcia_timing { | |
123 | unsigned short io; | |
124 | unsigned short mem; | |
125 | unsigned short attr; | |
126 | }; | |
127 | ||
128 | extern int soc_pcmcia_request_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
129 | extern void soc_pcmcia_free_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
130 | extern void soc_pcmcia_disable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
131 | extern void soc_pcmcia_enable_irqs(struct soc_pcmcia_socket *skt, struct pcmcia_irqs *irqs, int nr); | |
132 | extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *); | |
133 | ||
134 | ||
135 | extern struct list_head soc_pcmcia_sockets; | |
136 | extern struct semaphore soc_pcmcia_sockets_lock; | |
137 | ||
138 | extern int soc_common_drv_pcmcia_probe(struct device *dev, struct pcmcia_low_level *ops, int first, int nr); | |
139 | extern int soc_common_drv_pcmcia_remove(struct device *dev); | |
140 | ||
141 | ||
142 | #ifdef DEBUG | |
143 | ||
144 | extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func, | |
145 | int lvl, const char *fmt, ...); | |
146 | ||
147 | #define debug(skt, lvl, fmt, arg...) \ | |
148 | soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg) | |
149 | ||
150 | #else | |
151 | #define debug(skt, lvl, fmt, arg...) do { } while (0) | |
152 | #endif | |
153 | ||
154 | ||
155 | /* | |
156 | * The PC Card Standard, Release 7, section 4.13.4, says that twIORD | |
157 | * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has | |
158 | * a minimum value of 165ns, as well. Section 4.7.2 (describing | |
159 | * common and attribute memory write timing) says that twWE has a | |
160 | * minimum value of 150ns for a 250ns cycle time (for 5V operation; | |
161 | * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V | |
162 | * operation, also section 4.7.4). Section 4.7.3 says that taOE | |
163 | * has a maximum value of 150ns for a 300ns cycle time (for 5V | |
164 | * operation), or 300ns for a 600ns cycle time (for 3.3V operation). | |
165 | * | |
166 | * When configuring memory maps, Card Services appears to adopt the policy | |
167 | * that a memory access time of "0" means "use the default." The default | |
168 | * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute | |
169 | * and memory command width time is 150ns; the PCMCIA 3.3V attribute and | |
170 | * memory command width time is 300ns. | |
171 | */ | |
172 | #define SOC_PCMCIA_IO_ACCESS (165) | |
173 | #define SOC_PCMCIA_5V_MEM_ACCESS (150) | |
174 | #define SOC_PCMCIA_3V_MEM_ACCESS (300) | |
175 | #define SOC_PCMCIA_ATTR_MEM_ACCESS (300) | |
176 | ||
177 | /* | |
178 | * The socket driver actually works nicely in interrupt-driven form, | |
179 | * so the (relatively infrequent) polling is "just to be sure." | |
180 | */ | |
181 | #define SOC_PCMCIA_POLL_PERIOD (2*HZ) | |
182 | ||
183 | ||
184 | /* I/O pins replacing memory pins | |
185 | * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75) | |
186 | * | |
187 | * These signals change meaning when going from memory-only to | |
188 | * memory-or-I/O interface: | |
189 | */ | |
190 | #define iostschg bvd1 | |
191 | #define iospkr bvd2 | |
192 | ||
193 | #endif |