[NETFILTER] ip_conntrack: Update event cache when status changes
[deliverable/linux.git] / drivers / pcmcia / yenta_socket.c
CommitLineData
1da177e4
LT
1/*
2 * Regular cardbus driver ("yenta_socket")
3 *
4 * (C) Copyright 1999, 2000 Linus Torvalds
5 *
6 * Changelog:
7 * Aug 2002: Manfred Spraul <manfred@colorfullife.com>
8 * Dynamically adjust the size of the bridge resource
9 *
10 * May 2003: Dominik Brodowski <linux@brodo.de>
11 * Merge pci_socket.c and yenta.c into one file
12 */
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/sched.h>
16#include <linux/workqueue.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/module.h>
20
1da177e4
LT
21#include <pcmcia/cs_types.h>
22#include <pcmcia/ss.h>
23#include <pcmcia/cs.h>
24
25#include <asm/io.h>
26
27#include "yenta_socket.h"
28#include "i82365.h"
29
30static int disable_clkrun;
31module_param(disable_clkrun, bool, 0444);
32MODULE_PARM_DESC(disable_clkrun, "If PC card doesn't function properly, please try this option");
33
fa912bcb
DR
34static int isa_probe = 1;
35module_param(isa_probe, bool, 0444);
36MODULE_PARM_DESC(isa_probe, "If set ISA interrupts are probed (default). Set to N to disable probing");
37
38static int pwr_irqs_off;
39module_param(pwr_irqs_off, bool, 0644);
40MODULE_PARM_DESC(pwr_irqs_off, "Force IRQs off during power-on of slot. Use only when seeing IRQ storms!");
41
1da177e4
LT
42#if 0
43#define debug(x,args...) printk(KERN_DEBUG "%s: " x, __func__ , ##args)
44#else
45#define debug(x,args...)
46#endif
47
48/* Don't ask.. */
49#define to_cycles(ns) ((ns)/120)
50#define to_ns(cycles) ((cycles)*120)
51
52static int yenta_probe_cb_irq(struct yenta_socket *socket);
53
54
55static unsigned int override_bios;
56module_param(override_bios, uint, 0000);
57MODULE_PARM_DESC (override_bios, "yenta ignore bios resource allocation");
58
59/*
60 * Generate easy-to-use ways of reading a cardbus sockets
61 * regular memory space ("cb_xxx"), configuration space
62 * ("config_xxx") and compatibility space ("exca_xxxx")
63 */
64static inline u32 cb_readl(struct yenta_socket *socket, unsigned reg)
65{
66 u32 val = readl(socket->base + reg);
67 debug("%p %04x %08x\n", socket, reg, val);
68 return val;
69}
70
71static inline void cb_writel(struct yenta_socket *socket, unsigned reg, u32 val)
72{
73 debug("%p %04x %08x\n", socket, reg, val);
74 writel(val, socket->base + reg);
c8751e4c 75 readl(socket->base + reg); /* avoid problems with PCI write posting */
1da177e4
LT
76}
77
78static inline u8 config_readb(struct yenta_socket *socket, unsigned offset)
79{
80 u8 val;
81 pci_read_config_byte(socket->dev, offset, &val);
82 debug("%p %04x %02x\n", socket, offset, val);
83 return val;
84}
85
86static inline u16 config_readw(struct yenta_socket *socket, unsigned offset)
87{
88 u16 val;
89 pci_read_config_word(socket->dev, offset, &val);
90 debug("%p %04x %04x\n", socket, offset, val);
91 return val;
92}
93
94static inline u32 config_readl(struct yenta_socket *socket, unsigned offset)
95{
96 u32 val;
97 pci_read_config_dword(socket->dev, offset, &val);
98 debug("%p %04x %08x\n", socket, offset, val);
99 return val;
100}
101
102static inline void config_writeb(struct yenta_socket *socket, unsigned offset, u8 val)
103{
104 debug("%p %04x %02x\n", socket, offset, val);
105 pci_write_config_byte(socket->dev, offset, val);
106}
107
108static inline void config_writew(struct yenta_socket *socket, unsigned offset, u16 val)
109{
110 debug("%p %04x %04x\n", socket, offset, val);
111 pci_write_config_word(socket->dev, offset, val);
112}
113
114static inline void config_writel(struct yenta_socket *socket, unsigned offset, u32 val)
115{
116 debug("%p %04x %08x\n", socket, offset, val);
117 pci_write_config_dword(socket->dev, offset, val);
118}
119
120static inline u8 exca_readb(struct yenta_socket *socket, unsigned reg)
121{
122 u8 val = readb(socket->base + 0x800 + reg);
123 debug("%p %04x %02x\n", socket, reg, val);
124 return val;
125}
126
127static inline u8 exca_readw(struct yenta_socket *socket, unsigned reg)
128{
129 u16 val;
130 val = readb(socket->base + 0x800 + reg);
131 val |= readb(socket->base + 0x800 + reg + 1) << 8;
132 debug("%p %04x %04x\n", socket, reg, val);
133 return val;
134}
135
136static inline void exca_writeb(struct yenta_socket *socket, unsigned reg, u8 val)
137{
138 debug("%p %04x %02x\n", socket, reg, val);
139 writeb(val, socket->base + 0x800 + reg);
c8751e4c 140 readb(socket->base + 0x800 + reg); /* PCI write posting... */
1da177e4
LT
141}
142
143static void exca_writew(struct yenta_socket *socket, unsigned reg, u16 val)
144{
145 debug("%p %04x %04x\n", socket, reg, val);
146 writeb(val, socket->base + 0x800 + reg);
147 writeb(val >> 8, socket->base + 0x800 + reg + 1);
c8751e4c
DR
148
149 /* PCI write posting... */
150 readb(socket->base + 0x800 + reg);
151 readb(socket->base + 0x800 + reg + 1);
1da177e4
LT
152}
153
154/*
155 * Ugh, mixed-mode cardbus and 16-bit pccard state: things depend
156 * on what kind of card is inserted..
157 */
158static int yenta_get_status(struct pcmcia_socket *sock, unsigned int *value)
159{
160 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
161 unsigned int val;
162 u32 state = cb_readl(socket, CB_SOCKET_STATE);
163
164 val = (state & CB_3VCARD) ? SS_3VCARD : 0;
165 val |= (state & CB_XVCARD) ? SS_XVCARD : 0;
fa912bcb
DR
166 val |= (state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ? 0 : SS_PENDING;
167 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? SS_PENDING : 0;
168
1da177e4
LT
169
170 if (state & CB_CBCARD) {
171 val |= SS_CARDBUS;
172 val |= (state & CB_CARDSTS) ? SS_STSCHG : 0;
173 val |= (state & (CB_CDETECT1 | CB_CDETECT2)) ? 0 : SS_DETECT;
174 val |= (state & CB_PWRCYCLE) ? SS_POWERON | SS_READY : 0;
fa912bcb 175 } else if (state & CB_16BITCARD) {
1da177e4
LT
176 u8 status = exca_readb(socket, I365_STATUS);
177 val |= ((status & I365_CS_DETECT) == I365_CS_DETECT) ? SS_DETECT : 0;
178 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
179 val |= (status & I365_CS_STSCHG) ? 0 : SS_STSCHG;
180 } else {
181 val |= (status & I365_CS_BVD1) ? 0 : SS_BATDEAD;
182 val |= (status & I365_CS_BVD2) ? 0 : SS_BATWARN;
183 }
184 val |= (status & I365_CS_WRPROT) ? SS_WRPROT : 0;
185 val |= (status & I365_CS_READY) ? SS_READY : 0;
186 val |= (status & I365_CS_POWERON) ? SS_POWERON : 0;
187 }
188
189 *value = val;
190 return 0;
191}
192
ea2f1590 193static void yenta_get_power(struct yenta_socket *socket, socket_state_t *state)
1da177e4 194{
ea2f1590
DR
195 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
196 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
197 u8 reg, vcc, vpp;
198
199 reg = exca_readb(socket, I365_POWER);
200 vcc = reg & I365_VCC_MASK;
201 vpp = reg & I365_VPP1_MASK;
202 state->Vcc = state->Vpp = 0;
203
204 if (socket->flags & YENTA_16BIT_POWER_DF) {
205 if (vcc == I365_VCC_3V)
206 state->Vcc = 33;
207 if (vcc == I365_VCC_5V)
208 state->Vcc = 50;
209 if (vpp == I365_VPP1_5V)
210 state->Vpp = state->Vcc;
211 if (vpp == I365_VPP1_12V)
212 state->Vpp = 120;
213 } else {
214 if (reg & I365_VCC_5V) {
215 state->Vcc = 50;
216 if (vpp == I365_VPP1_5V)
217 state->Vpp = 50;
218 if (vpp == I365_VPP1_12V)
219 state->Vpp = 120;
220 }
221 }
222 } else {
223 u32 control;
1da177e4 224
ea2f1590
DR
225 control = cb_readl(socket, CB_SOCKET_CONTROL);
226
227 switch (control & CB_SC_VCC_MASK) {
228 case CB_SC_VCC_5V: state->Vcc = 50; break;
229 case CB_SC_VCC_3V: state->Vcc = 33; break;
230 default: state->Vcc = 0;
231 }
232
233 switch (control & CB_SC_VPP_MASK) {
234 case CB_SC_VPP_12V: state->Vpp = 120; break;
235 case CB_SC_VPP_5V: state->Vpp = 50; break;
236 case CB_SC_VPP_3V: state->Vpp = 33; break;
237 default: state->Vpp = 0;
238 }
1da177e4
LT
239 }
240}
241
242static int yenta_get_socket(struct pcmcia_socket *sock, socket_state_t *state)
243{
244 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
245 u8 reg;
246 u32 control;
247
248 control = cb_readl(socket, CB_SOCKET_CONTROL);
249
ea2f1590 250 yenta_get_power(socket, state);
1da177e4
LT
251 state->io_irq = socket->io_irq;
252
253 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
254 u16 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
255 if (bridge & CB_BRIDGE_CRST)
256 state->flags |= SS_RESET;
257 return 0;
258 }
259
260 /* 16-bit card state.. */
261 reg = exca_readb(socket, I365_POWER);
262 state->flags = (reg & I365_PWR_AUTO) ? SS_PWR_AUTO : 0;
263 state->flags |= (reg & I365_PWR_OUT) ? SS_OUTPUT_ENA : 0;
264
265 reg = exca_readb(socket, I365_INTCTL);
266 state->flags |= (reg & I365_PC_RESET) ? 0 : SS_RESET;
267 state->flags |= (reg & I365_PC_IOCARD) ? SS_IOCARD : 0;
268
269 reg = exca_readb(socket, I365_CSCINT);
270 state->csc_mask = (reg & I365_CSC_DETECT) ? SS_DETECT : 0;
271 if (state->flags & SS_IOCARD) {
272 state->csc_mask |= (reg & I365_CSC_STSCHG) ? SS_STSCHG : 0;
273 } else {
274 state->csc_mask |= (reg & I365_CSC_BVD1) ? SS_BATDEAD : 0;
275 state->csc_mask |= (reg & I365_CSC_BVD2) ? SS_BATWARN : 0;
276 state->csc_mask |= (reg & I365_CSC_READY) ? SS_READY : 0;
277 }
278
279 return 0;
280}
281
282static void yenta_set_power(struct yenta_socket *socket, socket_state_t *state)
283{
ea2f1590
DR
284 /* some birdges require to use the ExCA registers to power 16bit cards */
285 if (!(cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) &&
286 (socket->flags & YENTA_16BIT_POWER_EXCA)) {
287 u8 reg, old;
288 reg = old = exca_readb(socket, I365_POWER);
289 reg &= ~(I365_VCC_MASK | I365_VPP1_MASK | I365_VPP2_MASK);
290
291 /* i82365SL-DF style */
292 if (socket->flags & YENTA_16BIT_POWER_DF) {
293 switch (state->Vcc) {
294 case 33: reg |= I365_VCC_3V; break;
295 case 50: reg |= I365_VCC_5V; break;
296 default: reg = 0; break;
297 }
298 switch (state->Vpp) {
299 case 33:
300 case 50: reg |= I365_VPP1_5V; break;
301 case 120: reg |= I365_VPP1_12V; break;
302 }
303 } else {
304 /* i82365SL-B style */
305 switch (state->Vcc) {
306 case 50: reg |= I365_VCC_5V; break;
307 default: reg = 0; break;
308 }
309 switch (state->Vpp) {
310 case 50: reg |= I365_VPP1_5V | I365_VPP2_5V; break;
311 case 120: reg |= I365_VPP1_12V | I365_VPP2_12V; break;
312 }
313 }
314
315 if (reg != old)
316 exca_writeb(socket, I365_POWER, reg);
317 } else {
318 u32 reg = 0; /* CB_SC_STPCLK? */
319 switch (state->Vcc) {
320 case 33: reg = CB_SC_VCC_3V; break;
321 case 50: reg = CB_SC_VCC_5V; break;
322 default: reg = 0; break;
323 }
324 switch (state->Vpp) {
325 case 33: reg |= CB_SC_VPP_3V; break;
326 case 50: reg |= CB_SC_VPP_5V; break;
327 case 120: reg |= CB_SC_VPP_12V; break;
328 }
329 if (reg != cb_readl(socket, CB_SOCKET_CONTROL))
330 cb_writel(socket, CB_SOCKET_CONTROL, reg);
1da177e4 331 }
1da177e4
LT
332}
333
334static int yenta_set_socket(struct pcmcia_socket *sock, socket_state_t *state)
335{
336 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
337 u16 bridge;
338
339 yenta_set_power(socket, state);
340 socket->io_irq = state->io_irq;
341 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~(CB_BRIDGE_CRST | CB_BRIDGE_INTR);
342 if (cb_readl(socket, CB_SOCKET_STATE) & CB_CBCARD) {
343 u8 intr;
344 bridge |= (state->flags & SS_RESET) ? CB_BRIDGE_CRST : 0;
345
346 /* ISA interrupt control? */
347 intr = exca_readb(socket, I365_INTCTL);
348 intr = (intr & ~0xf);
349 if (!socket->cb_irq) {
350 intr |= state->io_irq;
351 bridge |= CB_BRIDGE_INTR;
352 }
353 exca_writeb(socket, I365_INTCTL, intr);
354 } else {
355 u8 reg;
356
357 reg = exca_readb(socket, I365_INTCTL) & (I365_RING_ENA | I365_INTR_ENA);
358 reg |= (state->flags & SS_RESET) ? 0 : I365_PC_RESET;
359 reg |= (state->flags & SS_IOCARD) ? I365_PC_IOCARD : 0;
360 if (state->io_irq != socket->cb_irq) {
361 reg |= state->io_irq;
362 bridge |= CB_BRIDGE_INTR;
363 }
364 exca_writeb(socket, I365_INTCTL, reg);
365
366 reg = exca_readb(socket, I365_POWER) & (I365_VCC_MASK|I365_VPP1_MASK);
367 reg |= I365_PWR_NORESET;
368 if (state->flags & SS_PWR_AUTO) reg |= I365_PWR_AUTO;
369 if (state->flags & SS_OUTPUT_ENA) reg |= I365_PWR_OUT;
370 if (exca_readb(socket, I365_POWER) != reg)
371 exca_writeb(socket, I365_POWER, reg);
372
373 /* CSC interrupt: no ISA irq for CSC */
374 reg = I365_CSC_DETECT;
375 if (state->flags & SS_IOCARD) {
376 if (state->csc_mask & SS_STSCHG) reg |= I365_CSC_STSCHG;
377 } else {
378 if (state->csc_mask & SS_BATDEAD) reg |= I365_CSC_BVD1;
379 if (state->csc_mask & SS_BATWARN) reg |= I365_CSC_BVD2;
380 if (state->csc_mask & SS_READY) reg |= I365_CSC_READY;
381 }
382 exca_writeb(socket, I365_CSCINT, reg);
383 exca_readb(socket, I365_CSC);
384 if(sock->zoom_video)
385 sock->zoom_video(sock, state->flags & SS_ZVCARD);
386 }
387 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
388 /* Socket event mask: get card insert/remove events.. */
389 cb_writel(socket, CB_SOCKET_EVENT, -1);
390 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
391 return 0;
392}
393
394static int yenta_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
395{
396 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
397 int map;
398 unsigned char ioctl, addr, enable;
399
400 map = io->map;
401
402 if (map > 1)
403 return -EINVAL;
404
405 enable = I365_ENA_IO(map);
406 addr = exca_readb(socket, I365_ADDRWIN);
407
408 /* Disable the window before changing it.. */
409 if (addr & enable) {
410 addr &= ~enable;
411 exca_writeb(socket, I365_ADDRWIN, addr);
412 }
413
414 exca_writew(socket, I365_IO(map)+I365_W_START, io->start);
415 exca_writew(socket, I365_IO(map)+I365_W_STOP, io->stop);
416
417 ioctl = exca_readb(socket, I365_IOCTL) & ~I365_IOCTL_MASK(map);
418 if (io->flags & MAP_0WS) ioctl |= I365_IOCTL_0WS(map);
419 if (io->flags & MAP_16BIT) ioctl |= I365_IOCTL_16BIT(map);
420 if (io->flags & MAP_AUTOSZ) ioctl |= I365_IOCTL_IOCS16(map);
421 exca_writeb(socket, I365_IOCTL, ioctl);
422
423 if (io->flags & MAP_ACTIVE)
424 exca_writeb(socket, I365_ADDRWIN, addr | enable);
425 return 0;
426}
427
428static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *mem)
429{
430 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
431 struct pci_bus_region region;
432 int map;
433 unsigned char addr, enable;
434 unsigned int start, stop, card_start;
435 unsigned short word;
436
437 pcibios_resource_to_bus(socket->dev, &region, mem->res);
438
439 map = mem->map;
440 start = region.start;
441 stop = region.end;
442 card_start = mem->card_start;
443
444 if (map > 4 || start > stop || ((start ^ stop) >> 24) ||
445 (card_start >> 26) || mem->speed > 1000)
446 return -EINVAL;
447
448 enable = I365_ENA_MEM(map);
449 addr = exca_readb(socket, I365_ADDRWIN);
450 if (addr & enable) {
451 addr &= ~enable;
452 exca_writeb(socket, I365_ADDRWIN, addr);
453 }
454
455 exca_writeb(socket, CB_MEM_PAGE(map), start >> 24);
456
457 word = (start >> 12) & 0x0fff;
458 if (mem->flags & MAP_16BIT)
459 word |= I365_MEM_16BIT;
460 if (mem->flags & MAP_0WS)
461 word |= I365_MEM_0WS;
462 exca_writew(socket, I365_MEM(map) + I365_W_START, word);
463
464 word = (stop >> 12) & 0x0fff;
465 switch (to_cycles(mem->speed)) {
466 case 0: break;
467 case 1: word |= I365_MEM_WS0; break;
468 case 2: word |= I365_MEM_WS1; break;
469 default: word |= I365_MEM_WS1 | I365_MEM_WS0; break;
470 }
471 exca_writew(socket, I365_MEM(map) + I365_W_STOP, word);
472
473 word = ((card_start - start) >> 12) & 0x3fff;
474 if (mem->flags & MAP_WRPROT)
475 word |= I365_MEM_WRPROT;
476 if (mem->flags & MAP_ATTRIB)
477 word |= I365_MEM_REG;
478 exca_writew(socket, I365_MEM(map) + I365_W_OFF, word);
479
480 if (mem->flags & MAP_ACTIVE)
481 exca_writeb(socket, I365_ADDRWIN, addr | enable);
482 return 0;
483}
484
485
fa912bcb
DR
486
487static irqreturn_t yenta_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1da177e4 488{
fa912bcb
DR
489 unsigned int events;
490 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
1da177e4
LT
491 u8 csc;
492 u32 cb_event;
1da177e4
LT
493
494 /* Clear interrupt status for the event */
495 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
496 cb_writel(socket, CB_SOCKET_EVENT, cb_event);
497
498 csc = exca_readb(socket, I365_CSC);
499
500 events = (cb_event & (CB_CD1EVENT | CB_CD2EVENT)) ? SS_DETECT : 0 ;
501 events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;
502 if (exca_readb(socket, I365_INTCTL) & I365_PC_IOCARD) {
503 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
504 } else {
505 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
506 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
507 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
508 }
1da177e4 509
fa912bcb 510 if (events)
1da177e4 511 pcmcia_parse_events(&socket->socket, events);
fa912bcb
DR
512
513 if (cb_event || csc)
1da177e4 514 return IRQ_HANDLED;
fa912bcb 515
1da177e4
LT
516 return IRQ_NONE;
517}
518
519static void yenta_interrupt_wrapper(unsigned long data)
520{
521 struct yenta_socket *socket = (struct yenta_socket *) data;
522
523 yenta_interrupt(0, (void *)socket, NULL);
524 socket->poll_timer.expires = jiffies + HZ;
525 add_timer(&socket->poll_timer);
526}
527
528static void yenta_clear_maps(struct yenta_socket *socket)
529{
530 int i;
531 struct resource res = { .start = 0, .end = 0x0fff };
532 pccard_io_map io = { 0, 0, 0, 0, 1 };
533 pccard_mem_map mem = { .res = &res, };
534
535 yenta_set_socket(&socket->socket, &dead_socket);
536 for (i = 0; i < 2; i++) {
537 io.map = i;
538 yenta_set_io_map(&socket->socket, &io);
539 }
540 for (i = 0; i < 5; i++) {
541 mem.map = i;
542 yenta_set_mem_map(&socket->socket, &mem);
543 }
544}
545
fa912bcb
DR
546/* redoes voltage interrogation if required */
547static void yenta_interrogate(struct yenta_socket *socket)
548{
549 u32 state;
550
551 state = cb_readl(socket, CB_SOCKET_STATE);
552 if (!(state & (CB_5VCARD | CB_3VCARD | CB_XVCARD | CB_YVCARD)) ||
553 (state & (CB_CDETECT1 | CB_CDETECT2 | CB_NOTACARD | CB_BADVCCREQ)) ||
554 ((state & (CB_16BITCARD | CB_CBCARD)) == (CB_16BITCARD | CB_CBCARD)))
555 cb_writel(socket, CB_SOCKET_FORCE, CB_CVSTEST);
556}
557
1da177e4
LT
558/* Called at resume and initialization events */
559static int yenta_sock_init(struct pcmcia_socket *sock)
560{
561 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
1da177e4
LT
562 u16 bridge;
563
564 bridge = config_readw(socket, CB_BRIDGE_CONTROL) & ~CB_BRIDGE_INTR;
565 if (!socket->cb_irq)
566 bridge |= CB_BRIDGE_INTR;
567 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
568
569 exca_writeb(socket, I365_GBLCTL, 0x00);
570 exca_writeb(socket, I365_GENCTL, 0x00);
571
572 /* Redo card voltage interrogation */
fa912bcb 573 yenta_interrogate(socket);
1da177e4
LT
574
575 yenta_clear_maps(socket);
576
577 if (socket->type && socket->type->sock_init)
578 socket->type->sock_init(socket);
579
580 /* Re-enable CSC interrupts */
581 cb_writel(socket, CB_SOCKET_MASK, CB_CDMASK);
582
583 return 0;
584}
585
586static int yenta_sock_suspend(struct pcmcia_socket *sock)
587{
588 struct yenta_socket *socket = container_of(sock, struct yenta_socket, socket);
589
590 /* Disable CSC interrupts */
591 cb_writel(socket, CB_SOCKET_MASK, 0x0);
592
593 return 0;
594}
595
596/*
597 * Use an adaptive allocation for the memory resource,
598 * sometimes the memory behind pci bridges is limited:
599 * 1/8 of the size of the io window of the parent.
eb0a90b4
DB
600 * max 4 MB, min 16 kB. We try very hard to not get below
601 * the "ACC" values, though.
1da177e4
LT
602 */
603#define BRIDGE_MEM_MAX 4*1024*1024
eb0a90b4 604#define BRIDGE_MEM_ACC 128*1024
1da177e4
LT
605#define BRIDGE_MEM_MIN 16*1024
606
eb0a90b4
DB
607#define BRIDGE_IO_MAX 512
608#define BRIDGE_IO_ACC 256
1da177e4
LT
609#define BRIDGE_IO_MIN 32
610
611#ifndef PCIBIOS_MIN_CARDBUS_IO
612#define PCIBIOS_MIN_CARDBUS_IO PCIBIOS_MIN_IO
613#endif
614
eb0a90b4
DB
615static int yenta_search_one_res(struct resource *root, struct resource *res,
616 u32 min)
617{
618 u32 align, size, start, end;
619
620 if (res->flags & IORESOURCE_IO) {
621 align = 1024;
622 size = BRIDGE_IO_MAX;
623 start = PCIBIOS_MIN_CARDBUS_IO;
624 end = ~0U;
625 } else {
626 unsigned long avail = root->end - root->start;
627 int i;
628 size = BRIDGE_MEM_MAX;
629 if (size > avail/8) {
630 size=(avail+1)/8;
631 /* round size down to next power of 2 */
632 i = 0;
633 while ((size /= 2) != 0)
634 i++;
635 size = 1 << i;
636 }
637 if (size < min)
638 size = min;
639 align = size;
640 start = PCIBIOS_MIN_MEM;
641 end = ~0U;
642 }
643
644 do {
645 if (allocate_resource(root, res, size, start, end, align,
646 NULL, NULL)==0) {
647 return 1;
648 }
649 size = size/2;
650 align = size;
651 } while (size >= min);
652
653 return 0;
654}
655
656
657static int yenta_search_res(struct yenta_socket *socket, struct resource *res,
658 u32 min)
659{
660 int i;
661 for (i=0; i<PCI_BUS_NUM_RESOURCES; i++) {
662 struct resource * root = socket->dev->bus->resource[i];
663 if (!root)
664 continue;
665
666 if ((res->flags ^ root->flags) &
667 (IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH))
668 continue; /* Wrong type */
669
670 if (yenta_search_one_res(root, res, min))
671 return 1;
672 }
673 return 0;
674}
675
b3743fa4 676static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type, int addr_start, int addr_end)
1da177e4 677{
1da177e4 678 struct resource *root, *res;
43c34735 679 struct pci_bus_region region;
1da177e4
LT
680 unsigned mask;
681
7925407a
IK
682 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + nr;
683 /* Already allocated? */
684 if (res->parent)
b3743fa4 685 return 0;
7925407a 686
1da177e4
LT
687 /* The granularity of the memory limit is 4kB, on IO it's 4 bytes */
688 mask = ~0xfff;
689 if (type & IORESOURCE_IO)
690 mask = ~3;
691
43c34735 692 res->name = socket->dev->subordinate->name;
1da177e4 693 res->flags = type;
1da177e4 694
43c34735
DB
695 region.start = config_readl(socket, addr_start) & mask;
696 region.end = config_readl(socket, addr_end) | ~mask;
697 if (region.start && region.end > region.start && !override_bios) {
698 pcibios_bus_to_resource(socket->dev, res, &region);
862104e5
DB
699 root = pci_find_parent_resource(socket->dev, res);
700 if (root && (request_resource(root, res) == 0))
b3743fa4 701 return 0;
862104e5 702 printk(KERN_INFO "yenta %s: Preassigned resource %d busy or not available, reconfiguring...\n",
1da177e4 703 pci_name(socket->dev), nr);
1da177e4
LT
704 }
705
706 if (type & IORESOURCE_IO) {
eb0a90b4
DB
707 if ((yenta_search_res(socket, res, BRIDGE_IO_MAX)) ||
708 (yenta_search_res(socket, res, BRIDGE_IO_ACC)) ||
b3743fa4
DB
709 (yenta_search_res(socket, res, BRIDGE_IO_MIN)))
710 return 1;
1da177e4 711 } else {
eb0a90b4
DB
712 if (type & IORESOURCE_PREFETCH) {
713 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
714 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB
715 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
716 return 1;
eb0a90b4
DB
717 /* Approximating prefetchable by non-prefetchable */
718 res->flags = IORESOURCE_MEM;
1da177e4 719 }
eb0a90b4
DB
720 if ((yenta_search_res(socket, res, BRIDGE_MEM_MAX)) ||
721 (yenta_search_res(socket, res, BRIDGE_MEM_ACC)) ||
b3743fa4
DB
722 (yenta_search_res(socket, res, BRIDGE_MEM_MIN)))
723 return 1;
eb0a90b4
DB
724 }
725
1da177e4 726 printk(KERN_INFO "yenta %s: no resource of type %x available, trying to continue...\n",
eb0a90b4
DB
727 pci_name(socket->dev), type);
728 res->start = res->end = res->flags = 0;
b3743fa4 729 return 0;
1da177e4
LT
730}
731
732/*
733 * Allocate the bridge mappings for the device..
734 */
735static void yenta_allocate_resources(struct yenta_socket *socket)
736{
b3743fa4
DB
737 int program = 0;
738 program += yenta_allocate_res(socket, 0, IORESOURCE_IO,
27879835 739 PCI_CB_IO_BASE_0, PCI_CB_IO_LIMIT_0);
b3743fa4 740 program += yenta_allocate_res(socket, 1, IORESOURCE_IO,
27879835 741 PCI_CB_IO_BASE_1, PCI_CB_IO_LIMIT_1);
b3743fa4 742 program += yenta_allocate_res(socket, 2, IORESOURCE_MEM|IORESOURCE_PREFETCH,
27879835 743 PCI_CB_MEMORY_BASE_0, PCI_CB_MEMORY_LIMIT_0);
b3743fa4 744 program += yenta_allocate_res(socket, 3, IORESOURCE_MEM,
27879835 745 PCI_CB_MEMORY_BASE_1, PCI_CB_MEMORY_LIMIT_1);
b3743fa4
DB
746 if (program)
747 pci_setup_cardbus(socket->dev->subordinate);
1da177e4
LT
748}
749
750
751/*
752 * Free the bridge mappings for the device..
753 */
754static void yenta_free_resources(struct yenta_socket *socket)
755{
756 int i;
757 for (i=0;i<4;i++) {
758 struct resource *res;
759 res = socket->dev->resource + PCI_BRIDGE_RESOURCES + i;
760 if (res->start != 0 && res->end != 0)
761 release_resource(res);
b3743fa4 762 res->start = res->end = res->flags = 0;
1da177e4
LT
763 }
764}
765
766
767/*
768 * Close it down - release our resources and go home..
769 */
770static void yenta_close(struct pci_dev *dev)
771{
772 struct yenta_socket *sock = pci_get_drvdata(dev);
773
774 /* we don't want a dying socket registered */
775 pcmcia_unregister_socket(&sock->socket);
776
777 /* Disable all events so we don't die in an IRQ storm */
778 cb_writel(sock, CB_SOCKET_MASK, 0x0);
779 exca_writeb(sock, I365_CSCINT, 0);
780
781 if (sock->cb_irq)
782 free_irq(sock->cb_irq, sock);
783 else
784 del_timer_sync(&sock->poll_timer);
785
786 if (sock->base)
787 iounmap(sock->base);
788 yenta_free_resources(sock);
789
790 pci_release_regions(dev);
791 pci_disable_device(dev);
792 pci_set_drvdata(dev, NULL);
793}
794
795
796static struct pccard_operations yenta_socket_operations = {
797 .init = yenta_sock_init,
798 .suspend = yenta_sock_suspend,
799 .get_status = yenta_get_status,
800 .get_socket = yenta_get_socket,
801 .set_socket = yenta_set_socket,
802 .set_io_map = yenta_set_io_map,
803 .set_mem_map = yenta_set_mem_map,
804};
805
806
807#include "ti113x.h"
808#include "ricoh.h"
809#include "topic.h"
810#include "o2micro.h"
811
812enum {
813 CARDBUS_TYPE_DEFAULT = -1,
814 CARDBUS_TYPE_TI,
815 CARDBUS_TYPE_TI113X,
816 CARDBUS_TYPE_TI12XX,
817 CARDBUS_TYPE_TI1250,
818 CARDBUS_TYPE_RICOH,
ea2f1590 819 CARDBUS_TYPE_TOPIC95,
1da177e4
LT
820 CARDBUS_TYPE_TOPIC97,
821 CARDBUS_TYPE_O2MICRO,
822};
823
824/*
825 * Different cardbus controllers have slightly different
826 * initialization sequences etc details. List them here..
827 */
828static struct cardbus_type cardbus_type[] = {
829 [CARDBUS_TYPE_TI] = {
830 .override = ti_override,
831 .save_state = ti_save_state,
832 .restore_state = ti_restore_state,
833 .sock_init = ti_init,
834 },
835 [CARDBUS_TYPE_TI113X] = {
836 .override = ti113x_override,
837 .save_state = ti_save_state,
838 .restore_state = ti_restore_state,
839 .sock_init = ti_init,
840 },
841 [CARDBUS_TYPE_TI12XX] = {
842 .override = ti12xx_override,
843 .save_state = ti_save_state,
844 .restore_state = ti_restore_state,
845 .sock_init = ti_init,
846 },
847 [CARDBUS_TYPE_TI1250] = {
848 .override = ti1250_override,
849 .save_state = ti_save_state,
850 .restore_state = ti_restore_state,
851 .sock_init = ti_init,
852 },
853 [CARDBUS_TYPE_RICOH] = {
854 .override = ricoh_override,
855 .save_state = ricoh_save_state,
856 .restore_state = ricoh_restore_state,
857 },
ea2f1590
DR
858 [CARDBUS_TYPE_TOPIC95] = {
859 .override = topic95_override,
860 },
1da177e4
LT
861 [CARDBUS_TYPE_TOPIC97] = {
862 .override = topic97_override,
863 },
864 [CARDBUS_TYPE_O2MICRO] = {
865 .override = o2micro_override,
866 .restore_state = o2micro_restore_state,
867 },
868};
869
870
871/*
872 * Only probe "regular" interrupts, don't
873 * touch dangerous spots like the mouse irq,
874 * because there are mice that apparently
875 * get really confused if they get fondled
876 * too intimately.
877 *
878 * Default to 11, 10, 9, 7, 6, 5, 4, 3.
879 */
880static u32 isa_interrupts = 0x0ef8;
881
882static unsigned int yenta_probe_irq(struct yenta_socket *socket, u32 isa_irq_mask)
883{
884 int i;
885 unsigned long val;
886 u16 bridge_ctrl;
887 u32 mask;
888
889 /* Set up ISA irq routing to probe the ISA irqs.. */
890 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
891 if (!(bridge_ctrl & CB_BRIDGE_INTR)) {
892 bridge_ctrl |= CB_BRIDGE_INTR;
893 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
894 }
895
896 /*
897 * Probe for usable interrupts using the force
898 * register to generate bogus card status events.
899 */
900 cb_writel(socket, CB_SOCKET_EVENT, -1);
901 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
902 exca_writeb(socket, I365_CSCINT, 0);
903 val = probe_irq_on() & isa_irq_mask;
904 for (i = 1; i < 16; i++) {
905 if (!((val >> i) & 1))
906 continue;
907 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG | (i << 4));
908 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
909 udelay(100);
910 cb_writel(socket, CB_SOCKET_EVENT, -1);
911 }
912 cb_writel(socket, CB_SOCKET_MASK, 0);
913 exca_writeb(socket, I365_CSCINT, 0);
914
915 mask = probe_irq_mask(val) & 0xffff;
916
917 bridge_ctrl &= ~CB_BRIDGE_INTR;
918 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
919
920 return mask;
921}
922
923
924/* interrupt handler, only used during probing */
925static irqreturn_t yenta_probe_handler(int irq, void *dev_id, struct pt_regs *regs)
926{
927 struct yenta_socket *socket = (struct yenta_socket *) dev_id;
928 u8 csc;
929 u32 cb_event;
930
931 /* Clear interrupt status for the event */
932 cb_event = cb_readl(socket, CB_SOCKET_EVENT);
933 cb_writel(socket, CB_SOCKET_EVENT, -1);
934 csc = exca_readb(socket, I365_CSC);
935
936 if (cb_event || csc) {
937 socket->probe_status = 1;
938 return IRQ_HANDLED;
939 }
940
941 return IRQ_NONE;
942}
943
944/* probes the PCI interrupt, use only on override functions */
945static int yenta_probe_cb_irq(struct yenta_socket *socket)
946{
947 u16 bridge_ctrl;
948
949 if (!socket->cb_irq)
950 return -1;
951
952 socket->probe_status = 0;
953
954 /* disable ISA interrupts */
955 bridge_ctrl = config_readw(socket, CB_BRIDGE_CONTROL);
956 bridge_ctrl &= ~CB_BRIDGE_INTR;
957 config_writew(socket, CB_BRIDGE_CONTROL, bridge_ctrl);
958
959 if (request_irq(socket->cb_irq, yenta_probe_handler, SA_SHIRQ, "yenta", socket)) {
960 printk(KERN_WARNING "Yenta: request_irq() in yenta_probe_cb_irq() failed!\n");
961 return -1;
962 }
963
964 /* generate interrupt, wait */
965 exca_writeb(socket, I365_CSCINT, I365_CSC_STSCHG);
966 cb_writel(socket, CB_SOCKET_EVENT, -1);
967 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
968 cb_writel(socket, CB_SOCKET_FORCE, CB_FCARDSTS);
969
970 msleep(100);
971
972 /* disable interrupts */
973 cb_writel(socket, CB_SOCKET_MASK, 0);
974 exca_writeb(socket, I365_CSCINT, 0);
975 cb_writel(socket, CB_SOCKET_EVENT, -1);
976 exca_readb(socket, I365_CSC);
977
978 free_irq(socket->cb_irq, socket);
979
980 return (int) socket->probe_status;
981}
982
983
984
985/*
986 * Set static data that doesn't need re-initializing..
987 */
988static void yenta_get_socket_capabilities(struct yenta_socket *socket, u32 isa_irq_mask)
989{
1da177e4 990 socket->socket.pci_irq = socket->cb_irq;
fa912bcb
DR
991 if (isa_probe)
992 socket->socket.irq_mask = yenta_probe_irq(socket, isa_irq_mask);
993 else
994 socket->socket.irq_mask = 0;
1da177e4
LT
995
996 printk(KERN_INFO "Yenta: ISA IRQ mask 0x%04x, PCI irq %d\n",
997 socket->socket.irq_mask, socket->cb_irq);
998}
999
1000/*
1001 * Initialize the standard cardbus registers
1002 */
1003static void yenta_config_init(struct yenta_socket *socket)
1004{
1005 u16 bridge;
1006 struct pci_dev *dev = socket->dev;
1007
1008 pci_set_power_state(socket->dev, 0);
1009
1010 config_writel(socket, CB_LEGACY_MODE_BASE, 0);
1011 config_writel(socket, PCI_BASE_ADDRESS_0, dev->resource[0].start);
1012 config_writew(socket, PCI_COMMAND,
1013 PCI_COMMAND_IO |
1014 PCI_COMMAND_MEMORY |
1015 PCI_COMMAND_MASTER |
1016 PCI_COMMAND_WAIT);
1017
1018 /* MAGIC NUMBERS! Fixme */
1019 config_writeb(socket, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES / 4);
1020 config_writeb(socket, PCI_LATENCY_TIMER, 168);
1021 config_writel(socket, PCI_PRIMARY_BUS,
1022 (176 << 24) | /* sec. latency timer */
1023 (dev->subordinate->subordinate << 16) | /* subordinate bus */
1024 (dev->subordinate->secondary << 8) | /* secondary bus */
1025 dev->subordinate->primary); /* primary bus */
1026
1027 /*
1028 * Set up the bridging state:
1029 * - enable write posting.
1030 * - memory window 0 prefetchable, window 1 non-prefetchable
1031 * - PCI interrupts enabled if a PCI interrupt exists..
1032 */
1033 bridge = config_readw(socket, CB_BRIDGE_CONTROL);
1034 bridge &= ~(CB_BRIDGE_CRST | CB_BRIDGE_PREFETCH1 | CB_BRIDGE_INTR | CB_BRIDGE_ISAEN | CB_BRIDGE_VGAEN);
1035 bridge |= CB_BRIDGE_PREFETCH0 | CB_BRIDGE_POSTEN | CB_BRIDGE_INTR;
1036 config_writew(socket, CB_BRIDGE_CONTROL, bridge);
1037}
1038
1039/*
1040 * Initialize a cardbus controller. Make sure we have a usable
1041 * interrupt, and that we can map the cardbus area. Fill in the
1042 * socket information structure..
1043 */
1044static int __devinit yenta_probe (struct pci_dev *dev, const struct pci_device_id *id)
1045{
1046 struct yenta_socket *socket;
1047 int ret;
c7fb0b35
IK
1048
1049 /*
1050 * If we failed to assign proper bus numbers for this cardbus
1051 * controller during PCI probe, its subordinate pci_bus is NULL.
1052 * Bail out if so.
1053 */
1054 if (!dev->subordinate) {
5a23f347
LT
1055 printk(KERN_ERR "Yenta: no bus associated with %s! "
1056 "(try 'pci=assign-busses')\n", pci_name(dev));
c7fb0b35
IK
1057 return -ENODEV;
1058 }
1059
1da177e4
LT
1060 socket = kmalloc(sizeof(struct yenta_socket), GFP_KERNEL);
1061 if (!socket)
1062 return -ENOMEM;
1063 memset(socket, 0, sizeof(*socket));
1064
1065 /* prepare pcmcia_socket */
1066 socket->socket.ops = &yenta_socket_operations;
1067 socket->socket.resource_ops = &pccard_nonstatic_ops;
1068 socket->socket.dev.dev = &dev->dev;
1069 socket->socket.driver_data = socket;
1070 socket->socket.owner = THIS_MODULE;
5bc6b68a
RK
1071 socket->socket.features = SS_CAP_PAGE_REGS | SS_CAP_PCCARD;
1072 socket->socket.map_size = 0x1000;
1073 socket->socket.cb_dev = dev;
1da177e4
LT
1074
1075 /* prepare struct yenta_socket */
1076 socket->dev = dev;
1077 pci_set_drvdata(dev, socket);
1078
1079 /*
1080 * Do some basic sanity checking..
1081 */
1082 if (pci_enable_device(dev)) {
1083 ret = -EBUSY;
1084 goto free;
1085 }
1086
1087 ret = pci_request_regions(dev, "yenta_socket");
1088 if (ret)
1089 goto disable;
1090
1091 if (!pci_resource_start(dev, 0)) {
1092 printk(KERN_ERR "No cardbus resource!\n");
1093 ret = -ENODEV;
1094 goto release;
1095 }
1096
1097 /*
1098 * Ok, start setup.. Map the cardbus registers,
1099 * and request the IRQ.
1100 */
1101 socket->base = ioremap(pci_resource_start(dev, 0), 0x1000);
1102 if (!socket->base) {
1103 ret = -ENOMEM;
1104 goto release;
1105 }
1106
1107 /*
1108 * report the subsystem vendor and device for help debugging
1109 * the irq stuff...
1110 */
1111 printk(KERN_INFO "Yenta: CardBus bridge found at %s [%04x:%04x]\n",
1112 pci_name(dev), dev->subsystem_vendor, dev->subsystem_device);
1113
1114 yenta_config_init(socket);
1115
1116 /* Disable all events */
1117 cb_writel(socket, CB_SOCKET_MASK, 0x0);
1118
1119 /* Set up the bridge regions.. */
1120 yenta_allocate_resources(socket);
1121
1122 socket->cb_irq = dev->irq;
1123
1124 /* Do we have special options for the device? */
1125 if (id->driver_data != CARDBUS_TYPE_DEFAULT &&
1126 id->driver_data < ARRAY_SIZE(cardbus_type)) {
1127 socket->type = &cardbus_type[id->driver_data];
1128
1129 ret = socket->type->override(socket);
1130 if (ret < 0)
1131 goto unmap;
1132 }
1133
1134 /* We must finish initialization here */
1135
1136 if (!socket->cb_irq || request_irq(socket->cb_irq, yenta_interrupt, SA_SHIRQ, "yenta", socket)) {
1137 /* No IRQ or request_irq failed. Poll */
1138 socket->cb_irq = 0; /* But zero is a valid IRQ number. */
1139 init_timer(&socket->poll_timer);
1140 socket->poll_timer.function = yenta_interrupt_wrapper;
1141 socket->poll_timer.data = (unsigned long)socket;
1142 socket->poll_timer.expires = jiffies + HZ;
1143 add_timer(&socket->poll_timer);
5bc6b68a
RK
1144 printk(KERN_INFO "Yenta: no PCI IRQ, CardBus support disabled for this socket.\n"
1145 KERN_INFO "Yenta: check your BIOS CardBus, BIOS IRQ or ACPI settings.\n");
1146 } else {
1147 socket->socket.features |= SS_CAP_CARDBUS;
1da177e4
LT
1148 }
1149
1150 /* Figure out what the dang thing can do for the PCMCIA layer... */
fa912bcb 1151 yenta_interrogate(socket);
1da177e4
LT
1152 yenta_get_socket_capabilities(socket, isa_interrupts);
1153 printk(KERN_INFO "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE));
1154
1155 /* Register it with the pcmcia layer.. */
1156 ret = pcmcia_register_socket(&socket->socket);
1157 if (ret == 0)
1158 goto out;
1159
1160 unmap:
1161 iounmap(socket->base);
1162 release:
1163 pci_release_regions(dev);
1164 disable:
1165 pci_disable_device(dev);
1166 free:
1167 kfree(socket);
1168 out:
1169 return ret;
1170}
1171
1172
1173static int yenta_dev_suspend (struct pci_dev *dev, pm_message_t state)
1174{
1175 struct yenta_socket *socket = pci_get_drvdata(dev);
1176 int ret;
1177
1178 ret = pcmcia_socket_dev_suspend(&dev->dev, state);
1179
1180 if (socket) {
1181 if (socket->type && socket->type->save_state)
1182 socket->type->save_state(socket);
1183
1184 /* FIXME: pci_save_state needs to have a better interface */
1185 pci_save_state(dev);
1186 pci_read_config_dword(dev, 16*4, &socket->saved_state[0]);
1187 pci_read_config_dword(dev, 17*4, &socket->saved_state[1]);
d58da590 1188 pci_disable_device(dev);
1da177e4
LT
1189
1190 /*
1191 * Some laptops (IBM T22) do not like us putting the Cardbus
1192 * bridge into D3. At a guess, some other laptop will
1193 * probably require this, so leave it commented out for now.
1194 */
1195 /* pci_set_power_state(dev, 3); */
1196 }
1197
1198 return ret;
1199}
1200
1201
1202static int yenta_dev_resume (struct pci_dev *dev)
1203{
1204 struct yenta_socket *socket = pci_get_drvdata(dev);
1205
1206 if (socket) {
1207 pci_set_power_state(dev, 0);
1208 /* FIXME: pci_restore_state needs to have a better interface */
1209 pci_restore_state(dev);
1210 pci_write_config_dword(dev, 16*4, socket->saved_state[0]);
1211 pci_write_config_dword(dev, 17*4, socket->saved_state[1]);
d58da590
DSL
1212 pci_enable_device(dev);
1213 pci_set_master(dev);
1da177e4
LT
1214
1215 if (socket->type && socket->type->restore_state)
1216 socket->type->restore_state(socket);
1217 }
1218
1219 return pcmcia_socket_dev_resume(&dev->dev);
1220}
1221
1222
1223#define CB_ID(vend,dev,type) \
1224 { \
1225 .vendor = vend, \
1226 .device = dev, \
1227 .subvendor = PCI_ANY_ID, \
1228 .subdevice = PCI_ANY_ID, \
1229 .class = PCI_CLASS_BRIDGE_CARDBUS << 8, \
1230 .class_mask = ~0, \
1231 .driver_data = CARDBUS_TYPE_##type, \
1232 }
1233
1234static struct pci_device_id yenta_table [] = {
1235 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1031, TI),
1236
1237 /*
1238 * TBD: Check if these TI variants can use more
1239 * advanced overrides instead. (I can't get the
1240 * data sheets for these devices. --rmk)
1241 */
1242 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1210, TI),
1243
1244 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1130, TI113X),
1245 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1131, TI113X),
1246
1247 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1211, TI12XX),
1248 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1220, TI12XX),
1249 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1221, TI12XX),
1250 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1225, TI12XX),
1251 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251A, TI12XX),
1252 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1251B, TI12XX),
1253 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420, TI12XX),
1254 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1450, TI12XX),
1255 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1451A, TI12XX),
1256 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1510, TI12XX),
1257 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520, TI12XX),
1258 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1620, TI12XX),
1259 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4410, TI12XX),
1260 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4450, TI12XX),
1261 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4451, TI12XX),
1262 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4510, TI12XX),
1263 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_4520, TI12XX),
1264
1265 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1250, TI1250),
1266 CB_ID(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1410, TI1250),
1267
1268 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1211, TI12XX),
1269 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1225, TI12XX),
1270 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1410, TI1250),
1271 CB_ID(PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_1420, TI12XX),
1272
1273 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C465, RICOH),
1274 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C466, RICOH),
1275 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C475, RICOH),
1276 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476, RICOH),
1277 CB_ID(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C478, RICOH),
1278
ea2f1590 1279 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC95, TOPIC95),
1da177e4
LT
1280 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC97, TOPIC97),
1281 CB_ID(PCI_VENDOR_ID_TOSHIBA, PCI_DEVICE_ID_TOSHIBA_TOPIC100, TOPIC97),
1282
1283 CB_ID(PCI_VENDOR_ID_O2, PCI_ANY_ID, O2MICRO),
1284
1285 /* match any cardbus bridge */
1286 CB_ID(PCI_ANY_ID, PCI_ANY_ID, DEFAULT),
1287 { /* all zeroes */ }
1288};
1289MODULE_DEVICE_TABLE(pci, yenta_table);
1290
1291
1292static struct pci_driver yenta_cardbus_driver = {
1293 .name = "yenta_cardbus",
1294 .id_table = yenta_table,
1295 .probe = yenta_probe,
1296 .remove = __devexit_p(yenta_close),
1297 .suspend = yenta_dev_suspend,
1298 .resume = yenta_dev_resume,
1299};
1300
1301
1302static int __init yenta_socket_init(void)
1303{
1304 return pci_register_driver (&yenta_cardbus_driver);
1305}
1306
1307
1308static void __exit yenta_socket_exit (void)
1309{
1310 pci_unregister_driver (&yenta_cardbus_driver);
1311}
1312
1313
1314module_init(yenta_socket_init);
1315module_exit(yenta_socket_exit);
1316
1317MODULE_LICENSE("GPL");
This page took 0.131366 seconds and 5 git commands to generate.