Commit | Line | Data |
---|---|---|
2744e8af LW |
1 | # |
2 | # PINCTRL infrastructure and drivers | |
3 | # | |
4 | ||
45f034ef LW |
5 | config PINCTRL |
6 | bool | |
2744e8af LW |
7 | |
8 | if PINCTRL | |
9 | ||
45f034ef LW |
10 | menu "Pin controllers" |
11 | depends on PINCTRL | |
12 | ||
2744e8af | 13 | config PINMUX |
ae6b4d85 LW |
14 | bool "Support pin multiplexing controllers" |
15 | ||
16 | config PINCONF | |
17 | bool "Support pin configuration controllers" | |
2744e8af | 18 | |
394349f7 LW |
19 | config GENERIC_PINCONF |
20 | bool | |
21 | select PINCONF | |
22 | ||
2744e8af LW |
23 | config DEBUG_PINCTRL |
24 | bool "Debug PINCTRL calls" | |
25 | depends on DEBUG_KERNEL | |
26 | help | |
27 | Say Y here to add some extra checks and diagnostics to PINCTRL calls. | |
28 | ||
ae75ff81 DA |
29 | config PINCTRL_IMX |
30 | bool | |
31 | select PINMUX | |
32 | select PINCONF | |
33 | ||
d8fe3572 DA |
34 | config PINCTRL_IMX6Q |
35 | bool "IMX6Q pinctrl driver" | |
36 | depends on OF | |
37 | depends on SOC_IMX6Q | |
38 | select PINCTRL_IMX | |
39 | help | |
40 | Say Y here to enable the imx6q pinctrl driver | |
41 | ||
f4e66983 HZ |
42 | config PINCTRL_PXA3xx |
43 | bool | |
44 | select PINMUX | |
45 | ||
46 | config PINCTRL_MMP2 | |
47 | bool "MMP2 pin controller driver" | |
48 | depends on ARCH_MMP | |
49 | select PINCTRL_PXA3xx | |
50 | select PINCONF | |
51 | ||
17723111 SG |
52 | config PINCTRL_MXS |
53 | bool | |
54 | ||
55 | config PINCTRL_IMX23 | |
56 | bool | |
57 | select PINMUX | |
58 | select PINCONF | |
59 | select PINCTRL_MXS | |
60 | ||
61 | config PINCTRL_IMX28 | |
62 | bool | |
63 | select PINMUX | |
64 | select PINCONF | |
65 | select PINCTRL_MXS | |
66 | ||
f4e66983 HZ |
67 | config PINCTRL_PXA168 |
68 | bool "PXA168 pin controller driver" | |
69 | depends on ARCH_MMP | |
70 | select PINCTRL_PXA3xx | |
71 | select PINCONF | |
72 | ||
73 | config PINCTRL_PXA910 | |
74 | bool "PXA910 pin controller driver" | |
75 | depends on ARCH_MMP | |
76 | select PINCTRL_PXA3xx | |
77 | select PINCONF | |
78 | ||
3bece55a LW |
79 | config PINCTRL_SIRF |
80 | bool "CSR SiRFprimaII pin controller driver" | |
393daa81 RY |
81 | depends on ARCH_PRIMA2 |
82 | select PINMUX | |
393daa81 | 83 | |
971dac71 SW |
84 | config PINCTRL_TEGRA |
85 | bool | |
86 | ||
87 | config PINCTRL_TEGRA20 | |
88 | bool | |
89 | select PINMUX | |
90 | select PINCONF | |
91 | select PINCTRL_TEGRA | |
92 | ||
93 | config PINCTRL_TEGRA30 | |
94 | bool | |
95 | select PINMUX | |
96 | select PINCONF | |
97 | select PINCTRL_TEGRA | |
98 | ||
3bece55a LW |
99 | config PINCTRL_U300 |
100 | bool "U300 pin controller driver" | |
98da3529 LW |
101 | depends on ARCH_U300 |
102 | select PINMUX | |
dc0b1aa3 | 103 | select GENERIC_PINCONF |
45f034ef | 104 | |
ca402d37 LW |
105 | config PINCTRL_COH901 |
106 | bool "ST-Ericsson U300 COH 901 335/571 GPIO" | |
b4e3ac74 | 107 | depends on GPIOLIB && ARCH_U300 && PINMUX_U300 |
ca402d37 LW |
108 | help |
109 | Say yes here to support GPIO interface on ST-Ericsson U300. | |
110 | The names of the two IP block variants supported are | |
111 | COH 901 335 and COH 901 571/3. They contain 3, 5 or 7 | |
112 | ports of 8 GPIO pins each. | |
113 | ||
45f034ef | 114 | endmenu |
98da3529 | 115 | |
2744e8af | 116 | endif |